dbffeadcfc
nv50: magic fix for "3d busted without the binary driver first" issue
...
No idea what this reg does.. NVIDIA put 0x802 into it on some chips, the
criteria aren't too clear on when they do that however. Hopefully 0x800
will work everywhere...
2009-06-02 17:06:34 +10:00
a4ac60a102
nv50: context info for chipset 0xa0
2009-02-15 21:52:19 +10:00
7bbd605a21
drm/nv50: add context info for nv98
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It won't work yet, just like the other 9xxx chips. Real soon now :)
2009-02-11 10:12:43 +10:00
efcef2c2bc
drm/nv50: use a slightly different initial context for nv96
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I'm not 100% sure that the nv94 one we were using won't work. The context
layouts are identical (well.. same ctxprog, so of course!), only a couple
of registers differ. But, be safe until we actually get some 9xxx chips
working.
2009-02-10 09:11:41 +10:00
e6a062c21a
nv50: support chipset NV96
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ctxprog seen in okias' trace identical to one we use on NV94, assuming
the initial context values for NV94 will work here too.
2009-01-27 08:36:33 +10:00
7e4e0fbbb8
nv50: support NV94 chipset
2008-11-23 18:49:09 +11:00
48b73904b4
nv50: move context-related tables a separate header file
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This turns the various nvXX_graph_init_ctxvals() methods into tables,
and speeds up compliation of nv50_graph.c quite a bit. This has bothered
me for a while, but others are complaining now so it's time to fix it :)
2008-10-28 11:56:07 +11:00
ee6bcabc50
nv50: add initial context for chipset 0xaa
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This just doesn't look right..
2008-09-17 22:18:03 +10:00
d55e8090fa
nv50: add initial context to match ctxprog for chipset 0x50
2008-09-17 22:03:38 +10:00
4d2f1257fa
nv50: add ctxprog for chipset 0x50
2008-09-17 15:13:27 +10:00
301be1dc9b
nv50: add ctxprog for chipset 0xaa
2008-09-17 15:02:54 +10:00
f152482bde
nv50: add support for chipset 0x92
2008-09-17 14:52:22 +10:00
6d8062ac1e
nouveau: guard against channels potentially not having a context, fix nv50
2008-05-02 01:36:08 +10:00
b92efd5956
nv50: I cave... Add nv84 initial context values.
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I swore I'd actually do this properly and not go the horrible route
we did with nv4x, but I won't get around to it just yet with so many
*actually* interesting things to do first.. One day.
Since someone already added nv86, why not!
2008-05-01 23:50:44 +10:00
cf3c0123a0
nouveau: forgot to add a break
2008-03-30 14:50:41 +02:00
68b83a8813
nouveau: Add ctx values for nv86.
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- Note that this may not work for all nv86.
2008-03-30 14:48:55 +02:00
0bfd09f719
nv50: more small changes
2008-01-07 18:56:44 +11:00
7a4ba7273c
nv50: abort on chips without ctx ucode
2008-01-07 17:13:22 +11:00
15f8fd34df
nv50: some needed ctx vals
2008-01-07 17:09:00 +11:00
3d3d509dca
nv50: some cleanups + small changes
2008-01-07 17:08:59 +11:00
bd5d760a10
nouveau: Add ctx_voodoo for NV86
2008-01-06 10:09:47 -05:00
7f6bf84c23
drm: remove lots of spurious whitespace.
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Kernel "cleanfile" script run.
2007-11-05 12:42:22 +10:00
296050eee6
nouveau/nv50: hack up initial channel context from current state
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We really should be providing static values like the nv40 PGRAPH code does,
however, this will do for now to keep X at least working.
2007-08-08 13:01:29 +10:00
4ad487190d
nouveau: enable/disable engine-specific interrupts in _init()/_takedown()
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All interrupts are still masked by PMC until init is finished.
2007-08-08 10:49:05 +10:00
beaa0c9a28
nouveau: Pass channel struct around instead of channel id.
2007-08-06 03:40:43 +10:00
e39286eb5e
Remove DRM_ERR OS macro.
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This was used to make all ioctl handlers return -errno on linux and errno on
*BSD. Instead, just return -errno in shared code, and flip sign on return from
shared code to *BSD code.
2007-07-20 12:53:52 -07:00
ec67c2def9
nouveau: G8x PCIEGART
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Actually a NV04-NV50 ttm backend for both PCI and PCIEGART, but PCIGART
support for G8X using the current mm has been hacked on top of it.
2007-07-17 13:51:14 +10:00
0029713451
nouveau: nuke internal typedefs, and drm_device_t use.
2007-07-13 15:09:31 +10:00
c806bba466
nouveau/nv50: Initial channel/object support
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Should be OK on G84 for a single channel, multiple channels *almost* work.
Untested on G80.
2007-07-09 16:16:44 +10:00
ce0d528d3c
nouveau/nv50: skeletal backend
2007-06-28 03:26:43 +10:00
Ben Skeggs
Ben Skeggs
Maarten Maathuis
Jeremy Kolb
Dave Airlie
Eric Anholt