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28 Commits (1b4ce02506afa65494956468afb0eb7f93b74fbc)

Author SHA1 Message Date
Roland Scheidegger 34563921dd add R200_EMIT_PP_TRI_PERF_CNTL packet to support brilinear filtering on 
r200
 2005-03-15 22:12:30 +00:00
Roland Scheidegger 732cdc5cef add support for texture micro tiling on radeon/r200. Add support for r100 
cube maps (since it also requires a version bump) at the same time.
 2005-02-10 19:22:43 +00:00
Roland Scheidegger 43c3223de6 (Stephane Marchesin,me) Add radeon framebuffer tiling support to radeon 
drm. Add new ioctls to manage surfaces which cover the tiled areas
 2005-01-26 17:48:59 +00:00
Roland Scheidegger c4a87c6883 (Stephane Marchesin, me) add hyperz support to radeon drm. Only fast z 
clear and z buffer compression are working correctly, hierarchical-z is
    not.
 2004-12-08 16:43:00 +00:00
Dave Airlie 3f02a79351 Vladimir requested support so we can at least load r300 microcode for 
helping
2D operations.
Ups radeon to version 1.12.0, Vladimir, you might want to add any extra
    pciids...
Approved-by: Dave Airlie <airlied@linux.ie>
 2004-10-10 05:52:19 +00:00
Jon Smirl 9f9a8f1382 Lindent of core build. Drivers checked for no binary diffs. A few files 
weren't Lindent's because their comments didn't convert very well. A
    bunch of other minor clean up with no code implact included.
 2004-09-30 21:12:10 +00:00
Dave Airlie 93e8c201af preparation patch for radeon permanent mapping registers/framebuffer makes 
dev_priv live always, and add AGP detection in kernel patch:
    radeon-pre-2.patch From: Jon Smirl
 2004-08-17 11:24:50 +00:00
Dave Airlie 02df04d71d sync up with current 2.6 kernel bk tree - mostly __user annotations 2004-07-25 08:47:38 +00:00
Roland Scheidegger aa142ff1b5 add R200_EMIT_RB3D_BLENDCOLOR state packet to support GL_EXT_blend_color, 
GL_EXT_blend_func_separate and GL_EXT_blend_equation_separate on r200
 2004-05-18 23:03:22 +00:00
Dave Airlie 3306abbde7 white space changes to align with kernel 2004-04-10 13:52:43 +00:00
Jon Smirl 24115068e4 Fixes need to clean up the mess I made with the mesa merge. This code 
allows the mesa drivers to use a single definition of the DRM
    sarea/IOCTLS located in the drm driver directory. Adjustments were made
    to the 2D drivers to not include these changes. Changes to the mesa
    copy of DRM were copied to the DRI copy. XFree86 bug: Reported by:
    Submitted by: Reviewed by: Obtained from:
 2004-03-12 21:22:52 +00:00
Michel Daenzer 2655ccddf4 Memory layout transition: 
the 2D driver initializes MC_FB_LOCATION and related registers sanely
the DRM deduces the layout from these registers
clients use the new SETPARAM ioctl to tell the DRM where they think the
    framebuffer is located in the card's address space
the DRM uses all this information to check client state and fix it up if
    necessary
This is a prerequisite for things like direct rendering with IGP chips and
    video capturing.
 2003-11-04 00:46:05 +00:00
Michel Daenzer 062751ac47 Remove artificial PCI GART limitations, rename AGP to GART where 
appropriate
 2003-08-26 15:44:01 +00:00
Ian Romanick c99acb597f Added some information as to when (which DRM version) various queries were 
added.
 2003-08-08 21:06:44 +00:00
Keith Whitwell 0b01c70d59 Texture rectangle support for r100 2003-06-10 18:54:17 +00:00
David Dawes c0efa1a777 DRM part of Radeon DRI suspend/resume support (Charl Botha). 2003-05-20 22:43:39 +00:00
Ian Romanick 285b1cdc39 Merged texmem-0-0-1 2003-04-30 01:51:00 +00:00
Keith Whitwell 13211ad82c add more get_param queries for embedded project 2003-04-22 09:49:14 +00:00
Eric Anholt cfa778af9c Merge from bsd-4-0-0-branch. 2003-02-21 23:23:09 +00:00
Keith Whitwell f3751850c8 Fix size of VERTEX2 ioctl struct (Egbert Eich) 2003-02-03 14:30:32 +00:00
Jens Owen 344c7f6b41 updated e-mail addresses for Keith, Alan and Jens 2002-10-29 20:29:05 +00:00
Michel Daenzer 5e1b8ed88a preserve CRTC{,2}_OFFSET_CNTL in 2D driver to avoid bad effects when 
pageflipping after a mode switch
take current page into account in AdjustFrame(); writing the CRTC offset
    via the CP was probably a bad idea as this can happen asynchronously,
    reverted
take frame offset into account when flipping pages
handle CRTC2 as well for pageflipping (untested)
preserve GEN_INT_CNTL on mode switches to prevent interrupts from getting
    disabled
 2002-10-29 13:49:26 +00:00
Brian Paul ff25e7016c merge from mesa-4-1-branch to get cube-map registers. bumped version to 1.7 2002-10-28 19:05:40 +00:00
Michel Daenzer f40674ea9f change RADEON_PARAM_IRQ_ACTIVE to RADEON_PARAM_IRQ_NR 2002-09-25 19:48:51 +00:00
Keith Whitwell f1c8fe9557 merged r200-0-2-branch to trunk 2002-09-23 17:26:43 +00:00
Keith Whitwell 48cc350e21 merged r200-0-1-branch 2002-08-26 22:16:18 +00:00
Michel Daenzer fd86ac9561 Don't read scratch registers directly, obtain the values via the GET_PARAM 
ioctl. The DRM reads them from memory addresses the chip writes to on
    updates. Fall back to reading the registers directly with an old DRM.
(Tim Smith, cleanups by myself)
 2002-07-11 20:31:12 +00:00
Alan Hourihane 74ef13fd00 merged bsd-3-0-0-branch 2002-07-05 08:31:11 +00:00