02c4e0e757
nouveau/nv40: Fix channel scheduling.
...
Ensure NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLE gets set, otherwise channels
will appear to "freeze" in some circumstances.
2007-08-15 01:04:41 +10:00
a46104674f
nouveau/nv50: demagic instmem setup.
2007-08-10 14:22:50 +10:00
beaa0c9a28
nouveau: Pass channel struct around instead of channel id.
2007-08-06 03:40:43 +10:00
0029713451
nouveau: nuke internal typedefs, and drm_device_t use.
2007-07-13 15:09:31 +10:00
c806bba466
nouveau/nv50: Initial channel/object support
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Should be OK on G84 for a single channel, multiple channels *almost* work.
Untested on G80.
2007-07-09 16:16:44 +10:00
163f852612
nouveau: rewrite gpu object code
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Allows multiple references to a single object, needed to support PCI(E)GART
scatter-gather DMA objects which would quickly fill PRAMIN if each channel
had its own.
Handle per-channel private instmem areas. This is needed to support NV50,
but might be something we want to do on earlier chipsets at some point?
Everything that touches PRAMIN is a GPU object.
2007-07-09 16:16:44 +10:00
e26ec51146
nouveau: small RAMFC cleanups
2007-06-29 14:20:50 +10:00
68ecf61647
nouveau: never touch PRAMIN with NV_WRITE, cleanup RAMHT code a bit
2007-06-28 03:26:44 +10:00
05d86d950a
nouveau: NV04 PFIFO engtab functions
2007-06-24 18:57:09 +10:00
f2e64d5276
nouveau: NV4X PFIFO engtab functions
2007-06-24 18:56:01 +10:00
Ben Skeggs