e183a091ff
Initialize the hw lock waitqueue so we don't hang in drm_lastclose.
2007-04-12 11:40:12 -07:00
2160e267ff
Don't use drm_setup, do SAREA allocation and mapping directly instead.
2007-04-12 09:01:53 -07:00
e7b97f5523
Merge branch 'modesetting-101' of git+ssh://git.freedesktop.org/git/mesa/drm into origin/modesetting-101
2007-04-12 08:55:51 -07:00
9420ab4b41
Merge remote branch 'origin/modesetting-101' into modesetting-101
2007-04-12 15:10:08 +01:00
e8bd9fdf31
Merge branch 'modesetting-101' of git+ssh://git.freedesktop.org/git/mesa/drm into origin/modesetting-101
2007-04-11 20:41:54 -07:00
0430a80fc7
Remove debug statement about buffer objects
2007-04-11 20:41:27 -07:00
fb6c5aacb9
only initialise modes when fbcon or fbset asks for it
2007-04-12 11:54:49 +10:00
a81558d8b3
add getfb ioctl
2007-04-12 08:45:40 +10:00
9d7160c43a
Use new kernel buffer object type and cleanup agp probing.
2007-04-11 12:52:57 -07:00
2e21779992
Add new buffer object type for kernel allocations that don't initially have a user mapping.
2007-04-11 12:51:52 -07:00
8dd75bd601
Add aperture size and preallocation probing (from intelfb), cleanup load code to be more general.
2007-04-11 11:47:58 -07:00
cc7faa4de8
fix modeset cleanup for LVDS and reenable it in i915.
2007-04-11 07:21:24 -07:00
78598fdaa8
Various changes for in-kernel modesetting:
...
- allow drm_buffer_object_create to be called w/o dev_mapping
- fixup i915 init code to allocate memory, fb and set modes right
- pass fb to drm_initial_config for setup
- change some debug output to make it easier to spot
- fixup lvds code to use DDC probing correctly
2007-04-11 07:07:54 -07:00
a6cc6a778f
add support for setting a framebuffer depth
2007-04-11 17:13:45 +10:00
32f6a58db2
add initial drm_fb framebuffer
...
So far I can load fbcon, once I use my miniglx to add a framebuffer.
fbcon doesn't show anything on screen but baby steps and all that.
2007-04-11 16:33:03 +10:00
add7a928ad
comment out unworkable code
2007-04-11 14:43:02 +10:00
3dd5dc5728
only init at driver load
2007-04-11 14:34:43 +10:00
b329f91502
use the baseaddr at least
2007-04-11 14:04:18 +10:00
44be9c9d59
add an fb count + id get to the get resources code path
2007-04-11 13:26:21 +10:00
9b7211dd67
nouveau: nv10 per channel init from ddx
2007-04-10 23:20:13 +02:00
44a8761302
Merge branch 'modesetting-101' of git+ssh://git.freedesktop.org/git/mesa/drm into origin/modesetting-101
...
Conflicts:
linux-core/drm_crtc.c - trivial merge
linux-core/drm_crtc.h - trivial merge
linux-core/intel_display.c - crtc_config -> mode_config
shared-core/i915_dma.c - accommodate new init code in i915_init.c
2007-04-10 10:45:55 -07:00
b59285d738
Move i915 init code to new file, i915_init.c, and create a new high level
...
init routine that runs at driver load time.
2007-04-10 10:31:10 -07:00
5130918e25
Add save/restore state for LVDS code, along with a few other LVDS related
...
items to i915 private structure.
2007-04-10 09:51:17 -07:00
1e39dc4323
export output name to userspace
2007-04-10 16:25:31 +10:00
40bd6dcd86
set the base address of the CRTC correctly
2007-04-10 15:20:50 +10:00
65f465ed5a
fixup numerous issues with adding framebuffer support
...
This still isn't perfect but it fixes a few oopses and cleans up
some of the tabs and bugs in the original fb limit code
2007-04-10 14:49:49 +10:00
b50bda002b
add addfb/rmfb ioctls
...
Originally from Jakob, cleaned up by airlied.
2007-04-10 18:44:47 +10:00
059b5d9077
rs480: Renamed some unknown registers. See dri-devel list.
2007-04-09 23:23:40 +00:00
2d7f9f59c3
nouveau: NV46 support
2007-04-09 23:20:26 +10:00
29f8fe8046
radeon: bump version for IGPGART support
2007-04-09 22:00:34 +10:00
a70f8e0ab2
radeon: add support for reverse engineered xpress200m
...
The IGPGART setup code was traced using mmio-trace on fglrx by myself
and Phillip Ezolt <phillipezolt@gmail.com> on dri-devel.
This code doesn't let the 3D driver work properly as the card has no
vertex shader support.
Thanks to Matthew Garrett + Ubuntu for providing me some hardware to do this
work on.
2007-04-09 21:52:59 +10:00
46257c51c1
i915: use breadcrumb macro everywhere
2007-04-06 20:21:44 +10:00
78034c06df
nouveau: make a note about a bit that breaks some cards
2007-04-06 03:27:55 +10:00
38f52402a8
nouveau: Power up all card units by default on startup.
2007-04-06 03:26:19 +10:00
b4094864f1
checkpoint commit: implement SetCrtc so modes can in theory be set from user
...
This hooks up the userspace mode set it "seems" to work.
2007-04-05 18:01:02 +10:00
7bb112feca
checkpoint commit: added getresources, crtc and output
...
This adds the user interfaces from Jakob and hooks them up for 3 ioctls
GetResources, GetCrtc and GetOutput.
I've made the ids for everything fbs, crtcs, outputs and modes go via idr as
per krh's suggestion on irc as it make the code nice and consistent.
2007-04-05 17:06:42 +10:00
5bffbd6e27
initial userspace interface to get modes
2007-04-05 13:34:50 +10:00
52f9028c84
Initial import of modesetting for intel driver in DRM
2007-04-05 11:21:06 +10:00
139e4bbc73
Make sure we ack irqs before we read a breadcrumb so that
...
breadcrumb updates that occur _AFTER_ we've read the breadcrumb really
generates a new IRQ.
2007-04-03 10:29:15 +02:00
5395a92d40
r300: Synchronize the register header file again.
...
It's a good idea to keep these synchronized; even though the DRM doesn't use all
the defines, maintaining two different copies is prone to errors when the diff
gets bigger.
2007-04-02 19:45:10 +00:00
cbbdbd5e65
nouveau: fix usage of PGRAPH_CTX_CONTROL on nv20+
...
http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=17985f07d68322519919a7f629a6d2d9bf3916ed could have broken some nvxx_graph code : it rename NV03_PGRAPH_CTX_CONTROL to NV10_PGRAPH_CTX_CONTROL, but forgot to update it in nvxx_graph file.
Also when migrating init stuff in http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=674cefd4fe4b537a20a10edcb4ec5df55facca8e , NV04_PGRAPH_CTX_CONTROL is used everywhere but the old ddx code use NV_PGRAPH_CTX_CONTROL_NV04 or NV_PGRAPH_CTX_CONTROL.
2007-04-01 14:31:41 +02:00
25cedcf76f
nouveau : nv10 ctx switch fix
...
restoring NV10_PGRAPH_CTX_SWITCH1 now works
2007-04-01 14:21:29 +02:00
223061e084
nouveau : set the correct PGRAPH_CTX_CONTROL register
...
"5a072f32 (Stephane Marchesin 2007-02-03 04:57:06 +0100" broke nv10 ctx switch by setting wrong PGRAPH_CTX_CONTROL reg
2007-04-01 00:44:11 +02:00
ddb1715e06
Merge branch 'crestline-qa', adding support for the 965GM chipset.
2007-03-30 13:11:39 -07:00
bdabc8f998
nouveau: fix nv04 context switches.
2007-03-29 00:54:18 +02:00
81b811da37
drm/i915: set the bo up at firstopen time not after DMA init
...
This is required to use TTM to allocate the ring buffer.
2007-03-27 18:01:31 +10:00
406a894e52
Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline
2007-03-27 12:53:13 +08:00
674cefd4fe
nouveau: move card initialisation into the drm
...
The PGRAPH init for the various cards will need cleaning up at some point,
a lot of the values written there are per-context state left over from the
all the hardcoding done in the ddx.
It's possible some cards get broken by this commit, let me know.
Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
2007-03-26 20:59:37 +10:00
e7cd5a1e2d
Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline
2007-03-23 17:00:41 +08:00
4988fa4886
nouveau: rework nouveau_fifo_alloc() so the drm can create internal FIFOs
2007-03-23 15:25:37 +11:00
Jesse Barnes
Alan Hourihane
Dave Airlie
David Airlie
Dave Airlie
Matthieu Castet
Jakob Bornecrantz
Oliver McFadden
Ben Skeggs
Thomas Hellstrom
Eric Anholt
Stephane Marchesin
Nian Wu