All nv30 functions in nv30_graph.c that can be used on nv20 are renamed
as accordingly. nv20 specific parts from nv20_graph.c are moved into
nv30_graph.c.
Conflicts:
linux-core/drmP.h
linux-core/drm_bo.c
linux-core/drm_drv.c
linux-core/drm_objects.h
shared-core/drm.h
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
Mostly removing typedefs that snuck into the modesetting code and
updating to the latest TTM APIs. As of today, the i915 driver builds,
but there are likely to be problems, so debugging and bugfixes will
come next.
For various reasons, this ioctl was a bad idea.
At channel creation we now automatically create DMA objects covering
available VRAM and GART memory, where the client used to do this themselves.
However, there is still a need to be able to create DMA objects pointing at
specific areas of memory (ie. notifiers). Each channel is now allocated a
small amount of memory from which a client can suballocate things (such as
notifiers), and have a DMA object created which covers the suballocated area.
The NOTIFIER_ALLOC ioctl exposes this functionality.
places).
Add new FB hooks to the drm driver structure and make i915 use them for an
Intel specific FB driver. This will allow acceleration and better handling
of the command stream.
- move EDID structures to drm_edid.h
- add EDID info structure to drm_output
- add a few routines to intel_display for getting current mode info
- add some prototypes to intel_drv.h and drm_crtc.h
The PGRAPH init for the various cards will need cleaning up at some point,
a lot of the values written there are per-context state left over from the
all the hardcoding done in the ddx.
It's possible some cards get broken by this commit, let me know.
Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
* Pulled in some registers from nv10reg.h. Needed for context switching.
* Filled in nv30 graphics context (based on nv40_graph.c).
* Figure out nv30 context table, set up on context creation. Allows the cards automatic switching to work.
0x00 EXE fence. Signals when command stream interpreter has reached the point
where the fence was emitted.
0x01 FLUSH fence. Signals when command stream interpreter has reached the point
where the fence was emitted, and all previous drawing operations have been
completed and flushed.
Implements busy wait (for fastest response time / high CPU) and
lazy wait (User interrupt or timer driven).
There's two choices when fb is or isn't loaded as we treat ourselves as a
PCI driver in the latter case.
If we are a PCI driver, then register the suspend/resume functions
directly. If not, then we register as a sysdev and pick up the
suspend/resume actions and pump them down into a generic *power
function.
It'll be nice when this little mess is sorted out with regard to being a
real PCI driver ;-/
New PCI command parser. Moved from via_dma.c to via_verifier.c so functions
with similar functionality are close to eachother.
Moved video related functions to via_video.c, which might be extended in
the future, as new video functionality is added.
New device-specific generic IRQ IOCTL, similar to the general VBLANK IOCTL,
but with support for multiple device IRQ sources and functionality.
Support for Unichrome Pro PM800/CN400 video DMA commands in verifier and
PCI parser.
Support for Unichrome Pro PM800/CN400 HQV IRQs in the new generic IRQ
IOCTL.
Bumped minor. New version 2.6.0.
implementation errors). Direct hardware (MMIO, BCI) access is no longer
needed in the Mesa driver. Bumped version to 2.0.0. Corresponding
changes to the DDX and Mesa drivers are being committed.
DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH
The first ioctl sets up an area in AGP memory that will be used as the ring
buffer. The second ioctl copies a command buffer from user space memory
to the ring buffer. The third ioctl waits for engine idle until it
returns.
The motivation for this patch is to avoid the wait for engine idle call
before each buffer flush in the current DRI driver. With this patch,
the DRI driver can continue to flush its buffer as long as there is
free space in the ring buffer.
This patch adds an additional copy operation on the command buffer. This
buffer copying is necessary to support multiple DRI clients rendering
simultaneously. Otherwise, more CPU time will be spent in the busy loop
waiting for engine idle between DRI context switch. Even in the single
client case, the tradeoff is reasonable in comparision to the kernel
call to check for free buffer space for the client to render directly
to the ring buffer.
kernel build system. This is based on suggestions and examples from
David Woodhouse. This approach has the advantage that the build
requirements of a wider range of standard kernels are now supported
transparently, but the disadvantage of some extra complexity to handle
building against clean vendor-distributed kernel source trees. This has
been tested with some recent Red Hat and SuSE distributions.
be ported, rolled back r128 and i810 version bumps so 4.1.0 works with
cvs kernel modules, added Config.in and updated Makefile.kernel,
incorporated lots of drm fixes inspired by patches sent by Redhat, made
DRM(realloc) usage check for NULL allocations, restructure driver init
routines to export dev_priv only when initialized and to check for all
error conditions.
Jerome Glisse
Thomas Hellstrom
Alan Hourihane
Arthur Huillet
Pekka Paalanen
Jesse Barnes
Ian Romanick
Ben Skeggs
Alan Hourihane
Jesse Barnes
Dave Airlie
Dave Airlie
Stephane Marchesin
Matthieu Castet
Jeremy Kolb
Ben Skeggs
Dave Airlie
Thomas Hellstrom
Adam Jackson
Thomas Hellstrom
Eric Anholt
Jon Smirl
Felix Kuehling
Erdi Chen
Keith Whitwell
Michel Daenzer
David Dawes
Leif Delgass
Jeff Hartmann
Gareth Hughes
Kevin E Martin
Rik Faith