Commit Graph

60 Commits (597725e9511f8c0405fdd8d92d749bce58c0bce3)

Author SHA1 Message Date
Qiang Yu 580bd83fb4 amdgpu: amdgpu_bo_inc_ref don't return dummy int
Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-09-03 12:37:32 +02:00
Qiang Yu 937d62ea69 amdgpu: add amdgpu_bo_inc_ref() function.
For Pro OGL be able to work with upstream libdrm.

Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2018-09-03 10:55:53 +02:00
Junwei Zhang 4d454424e1 amdgpu: add a function to find bo by cpu mapping (v2)
Userspace needs to know if the user memory is from BO or malloc.

v2: update mutex range and rebase

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-08-08 12:37:49 +02:00
Marek Olšák 9c979e0ec4 amdgpu: add amdgpu_bo_handle_type_kms_noimport
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-07-25 17:21:44 -04:00
Marek Olšák 666d59d86b Revert "amdgpu:support 16 ibs per submit for PAL/SRIOV"
This reverts commit 924f856a90.

Wrong patch.
2018-03-08 20:04:01 -05:00
Qiang Yu 924f856a90 amdgpu:support 16 ibs per submit for PAL/SRIOV
to support SRIOV and MCBP, need 16 IBs per submit

Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-08 15:01:23 -05:00
Christian König ff0da7b323 amdgpu: add AMDGPU_VA_RANGE_HIGH
Return high addresses if requested and available.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-02-28 13:27:43 +01:00
Marek Olšák ad5b702fec amdgpu: add amdgpu_query_sw_info for querying high bits of 32-bit address space
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-02-09 20:30:16 +01:00
Bas Nieuwenhuizen 5889f6ba1a amdgpu: Add syncobj reset & signal wrappers.
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-18 09:51:50 +10:00
David Mao 1749d56ea0 amdgpu: Adding amdgpu_cs_create_syncobj2 to create syncobj as signaled initially
Signed-off-by: David Mao <david.mao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-11-29 22:05:25 -05:00
Andrey Grodzovsky f3091bac21 amdgpu: Fix wrappers for AMDGPU_VM IOCTL.
Rmove amdgpu_context_handle from the interface and use
amdgpu_device_handle instead. Uupdate VMID reservation test
accordingly.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-11-03 13:07:30 +01:00
Andrey Grodzovsky 9b38ea82fc amdgpu: Add wrappers for AMDGPU_VM IOCTL.
v2:
Rename wrappers to match the IOCTL naming, fix
identation and fix make check error.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-10-27 18:25:53 +02:00
Andres Rodriguez 35bc82cee9 amdgpu: implement context priority for amdgpu_cs_ctx_create2 v3
Add a new context creation function that allows specifying the context
priority.

A high priority context has the potential of starving lower priority
contexts. The current kernel driver implementation allows only apps
that hold CAP_SYS_NICE or DRM_MASTER to acquire a priority above
AMDGPU_CTX_PRIORITY_NORMAL.

v2: corresponding changes for kernel patch v2
v3: Fixed 'make check' symbol error

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-20 21:51:02 +02:00
Marek Olšák c74d461404 amdgpu: add amdgpu_cs_fence_to_handle
v2: update amdgpu-symbol-check

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2017-10-12 20:35:57 +02:00
Marek Olšák 59aa57b363 amdgpu: add amdgpu_cs_syncobj_wait
v2: update amdgpu-symbol-check

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2017-10-12 20:35:57 +02:00
Marek Olšák b6e24501a1 amdgpu: add sync_file import and export functions
v2: update amdgpu-symbol-check

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2017-10-12 20:35:57 +02:00
Dave Airlie 22790a65d4 drm/amdgpu: add new low overhead command submission API. (v2)
This just sends chunks to the kernel API for a single command
stream.

This should provide a more future proof and extensible API
for command submission.

v2: use amdgpu_bo_list_handle, add two helper functions to
access bo and context internals.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-07-19 00:33:14 +01:00
Dave Airlie 69532d0188 drm/amdgpu: add syncobj create/destroy/import/export apis
These are just wrappers using the amdgpu device handle.

Acked-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-07-19 00:32:53 +01:00
Nicolai Hähnle 41be41f99e amdgpu: add missing extern "C" headers
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
2017-05-16 15:45:45 +02:00
Nicolai Hähnle d8d45a4938 amdgpu: add the interface of waiting multiple fences
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
[v2: allow returning the first signaled fence index]
Signed-off-by: monk.liu <Monk.Liu@amd.com>
[v3:
 - cleanup *status setting
 - fix amdgpu symbols check
v4: simplify return from amdgpu_cs_wait_fences (suggested
    by Edward O'Callaghan)]
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com> (v1)
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> (v1)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-18 21:05:00 +02:00
Samuel Pitoiset 047aba1697 amdgpu: allow to query GPU sensor related information
This exposes amdgpu_query_sensor_info().

v2: - add amdgpu_query_sensor_info() to the symbols list

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-07 17:58:54 +02:00
Nicolai Hähnle 4e369f25a9 amdgpu: add amdgpu_bo_va_op_raw
This variant allows the caller full control over flags and size, and
allows passing a NULL bo (for PRT support).

Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: Jerry Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-04-03 10:11:24 +02:00
Junwei Zhang 670f1e4fda amdgpu: add the function to get the marketing name (v4)
This function is used to look up the marking name
for a specific board.

v2: agd: Squash in subsequent updates to the table.
v3: [Michel Dänzer]
* Make amdgpu_asic_id_table static, so it's not exported from
  libdrm_amdgpu.so.1
* Add amdgpu_get_marketing_name to amdgpu-symbols-check
* Fix indentation of second line of if statement
* Squash in another change removing redundant entries
* Change spelling of "RADEON" -> "Radeon"
* Remove "(TM)" from a minority of entries
v4: [Michel Dänzer]
* Use const char* instead of fixed size array for marketing_name (Emil
  Velikov)

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Flora Cui <Flora.Cui@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-07 17:44:27 +09:00
Eric Engestrom 0b3f9783df amdgpu: Fix spelling mistakes
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-04-07 18:15:45 +01:00
Marek Olšák 6afadeaf13 amdgpu: add semaphore support
the semaphore is a binary semaphore. the work flow is:
1. create sem
2. signal sem
3. wait sem, reset sem after signalled
4. destroy sem.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-20 02:14:46 +01:00
Jammy Zhou ffa305d0fc amdgpu: add flag to support 32bit VA address v4
The AMDGPU_VA_RANGE_32_BIT flag is added to request VA range in the
32bit address space for amdgpu_va_range_alloc.

The 32bit address space is reserved at initialization time, and managed
with a separate VAMGR as part of the global VAMGR. And if no enough VA
space available in range above 4GB, this reserved range can be used as
fallback.

v2: add comment for AMDGPU_VA_RANGE_32_BIT, and add vamgr to va_range
v3: rebase to Emil's drm_private series
v4: fix one warning

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:26:26 -04:00
Emil Velikov c19fa2b1ca amdgpu: squash trivial documentation typo
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-13 17:43:30 +01:00
Emil Velikov a30da8e9b3 amdgpu: cosmetic chances in license boilerplate
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-13 17:43:27 +01:00
Jammy Zhou d01c361af5 amdgpu: expose the PCI revision ID
The PCI revision ID can be used to differentiate ASICs.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:50:29 -04:00
Leo Liu d2cbe9ecbe amdgpu: add VCE harvesting instance query
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:52 -04:00
Jammy Zhou 8aeffcc1cf amdgpu: add amdgpu_bo_va_op for va map/unmap support v3
The following interfaces are changed accordingly:
- amdgpu_bo_alloc
- amdgpu_create_bo_from_user_mem

v2: update the interfaces
v3: remove virtual_mc_base_address from amdgpu_bo

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:52 -04:00
Jammy Zhou 95d0f35daf amdgpu: add flags parameter for amdgpu_va_range_alloc
The flags is added for extensibility to cover some special requirements
in the future, i.e, request VA range in the first 4GB of address space

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:52 -04:00
Ken Wang 926c805686 amdgpu : move management of user fence from libdrm to UMD
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:52 -04:00
Christian König 5463d2e83a amdgpu: use common fence structure for dependencies as well.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:52 -04:00
Jammy Zhou f91b56dc8c amdgpu: improve the amdgpu_cs_query_fence_status interface
make amdgpu_cs_query_fence reusable to support multi-fence query

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:52 -04:00
Sabre Shao 12802da74f amdgpu: add va range query interface
amdgpu_va_range_query interface is added so that client can query va
range supported by specific device.

Signed-off-by: Sabre Shao <Sabre.Shao@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:52 -04:00
Sabre Shao 23fab59ba5 amdgpu: add va allocation intefaces
Two new interfaces are added to support client request for
allocate virtual address without physical memory committed to.
The virtual address space can be managed by client itself.

Signed-off-by: Sabre Shao <Sabre.Shao@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:52 -04:00
Marek Olšák 67c994f057 drm/amdgpu: allow passing absolute timeouts to amdgpu_cs_query_fence_status
Useful when Mesa wants to wait for a lot of fences at the same time and
doesn't want to recalculate the relative timeout after every call.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:52 -04:00
Christian König 28462ebd25 amdgpu: remove reference to AMD specific error codes
We just have never defined any.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:51 -04:00
Christian König 558e1294f2 amdgpu: cleanup public interface style
Fix some style problems, adjust to a common indentation, reorder two
function definitions and remove stale comments.

No intended functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:51 -04:00
Christian König 0f37bc9029 amdgpu: add CS dependencies v2
This allows the driver to specify on which previous CS to wait.

v2: fix spelling in comment

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-08-05 13:47:51 -04:00
Jammy Zhou 7bbc1debaf amdgpu: cleanup gds specific alloc/free functions
amdgpu_bo_alloc/free can be used with GDS/OA/QWS domains specified

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:51 -04:00
Jammy Zhou 657245f7a3 amdgpu: add amdgpu_query_gds_info
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:51 -04:00
Marek Olšák 76af5c249f amdgpu: remove bo_handle from amdgpu_cs_ib_info, IBs should be in buffer list
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:51 -04:00
Marek Olšák 646f5411cf amdgpu: remove amdgpu_ib helpers
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:50 -04:00
Marek Olšák 194d5c2ee4 amdgpu: remove amdgpu_ib
Not useful if we're gonna use BO handles directly.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:50 -04:00
Jammy Zhou 40c5336043 amdgpu: get rid of IB pool management v3
v1: by Jammy Zhou
v2: remove bo wait when destroy IB by Jammy Zhou
v3: more cleanups by Marek

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:50 -04:00
Ken Wang cdd1edcae0 amdgpu: add ce_ram_size for interface query
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:50 -04:00
Ken Wang 4bf29413a3 amdgpu: add vram_type and vram_bit_width for interface query
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:50 -04:00
Ken Wang fc9fc7dd11 amdgpu: add max_memory_clock for interface query
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:50 -04:00