Commit Graph

75 Commits (71b1623e22c54d42837840a1d0479127a5049caf)

Author SHA1 Message Date
Keith Packard 71b1623e22 [intel-gem] Add intel-specific /proc entries to help monitor gem operation
This adds gem_active, gem_flushing, gem_inactive, gem_request and gem_seqno
entries to monitor gem operation and help debug issues.
2008-06-20 21:07:46 -07:00
Eric Anholt e7424e4580 [intel] Quirk away MSI support on 945G/GM.
The PCI caps register reports MSI support even though it isn't really there.
2008-06-16 15:15:02 -07:00
Keith Packard ced9ebf645 [intel-gem] throttle based on frames rather than time. Reduces jitter.
Record the last execbuffer sequence for each client.
Record that sequence in the throttle ioctl as the 'throttle sequence'.
Wait for the last throttle sequence in the throttle ioctl.
2008-06-13 14:29:46 -07:00
Keith Packard 3762c9ea67 [intel] Enable MSI for i915 IRQ 2008-06-13 14:29:46 -07:00
Eric Anholt 2655005762 [gem] Move potentially device-specific ioctls to the intel driver.
This is the create (may want location flags), pread/pwrite/mmap
(performance tuning hints), and set_domain (will 32 bits be enough for
everyone?) ioctls.  Left in the generic set are just flink/open/close.

The 2D driver must be updated for this change, and API but not ABI is broken
for 3D.  The driver version is bumped to mark this.
2008-06-11 14:42:40 -07:00
Eric Anholt 461bfa3da6 Merge commit 'origin/master' into drm-gem
Conflicts:

	linux-core/Makefile.kernel
	shared-core/i915_drv.h
	shared-core/nouveau_state.c
2008-05-30 14:42:08 -07:00
Eric Anholt 7dced2f33a [gem] Hold dev->struct_mutex to protect structure data. 2008-05-15 18:45:23 -07:00
Keith Packard ff39db099b [GEM] Make pread/pwrite manage memory domains. No luck with movnti though.
pread and pwrite must update the memory domains to ensure consistency with
the GPU. At some point, it should be possible to avoid clflush through this
path, but that isn't working for me.
2008-05-11 00:10:16 -07:00
Keith Packard 9af4c49743 [intel-gem] Move domains to relocation records. add set_domain ioctl.
Domain information is about buffer relationships, not buffer contents. That
means a relocation contains the domain information as it knows how the
source buffer references the target buffer.

This also adds the set_domain ioctl so that user space can move buffers to
the cpu domain.
2008-05-08 10:44:02 -07:00
Keith Packard ab3549d133 Add a bit of /proc/dri/*/gem support. Clean up some refcount/pagelock issues.
Track named objects in /proc/dri/0/gem_names.
Track total object count in /proc/dri/0/gem_objects.
Initialize device gem data.
return -ENODEV for gem ioctls if the driver doesn't support gem.
Call unlock_page when unbinding from gtt.
Add numerous misssing calls to drm_gem_object_unreference.
2008-05-02 16:34:16 -07:00
Eric Anholt 2140e102f9 checkpoint: rename to GEM and a few more i915 bits. 2008-05-01 11:39:20 -07:00
Jesse Barnes cb33133ef3 i915: fix off by one in VGA save/restore of AR & CR regs
Turns out it's important to save/restore AR14 in particular.
2008-04-29 12:39:38 -07:00
Keith Packard b986d7d2c9 Save and restore dsparb and d_state regs 2008-04-11 20:31:07 -07:00
Jesse Barnes 20d0e53916 i915: put ARX back into index mode before doing restore
Fixes resume from hibernate in some configurations.
2008-02-22 13:57:38 -08:00
Dave Airlie 6c41e5381f drm: add support for passing state into the suspend hooks.
fix i915 driver to use state for hibernate save avoidance.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-02-20 10:02:20 +10:00
Keith Packard 5d8c754bc2 [915]: more registers for S3 (DSPCLK_GATE_D, CACHE_MODE_0, MI_ARB_STATE)
Failing to preserve the MI_ARB_STATE register was causing FIFO underruns on
the VGA output on my HP 2510p after resume.
2008-02-16 20:14:49 -08:00
Jesse Barnes d63b57749f Restore pipeconf regs unconditionally
On many chipsets, the checks for DPLL enable or VGA mode will prevent the
pipeconf regs from being restored, which could result in a blank display or X
failing to come back after resume.  So restore them unconditionally along with
actually restoring pipe B's palette correctly.
2008-02-07 17:33:28 -08:00
Jesse Barnes 8b6c96dedd i915: save/restore interrupt state
On resume, if the interrupt state isn't restored correctly, we may end
up with a flood of unexpected or ill-timed interrupts, which could cause
the kernel to disable the interrupt or vblank events to happen at the
wrong time.  So save/restore them properly.
2008-02-07 10:48:08 -08:00
Thomas Hellstrom f1edb7ad91 Simplify the fencing code and differentiate between flushes and
waiting types.
Add a "command_stream_barrier" method to the bo driver.
2008-01-30 22:06:02 +01:00
Jesse Barnes 01f6afcfea Fix hibernate save/restore of VGA attribute regs
In hibernate, we may end up calling the VGA save regs function twice, so we
need to make sure it's idempotent.  That means leaving ARX in index mode after
the first save operation.  Fixes hibernate on 965.
2008-01-28 21:05:22 -08:00
Jesse Barnes 0cd4cbc9a6 Merge branch 'master' into vblank-rework, including mach64 support
Conflicts:

	linux-core/drmP.h
	linux-core/drm_drv.c
	shared-core/i915_drv.h
	shared-core/i915_irq.c
	shared-core/mga_irq.c
	shared-core/radeon_irq.c
	shared-core/via_irq.c

Mostly trivial conflicts.

mach64 support from Mathieu Bérard.
2008-01-22 09:42:37 -08:00
Zhenyu Wang ac6b3780c8 i915: Add chipset id for Intel Integrated Graphics Device
This adds new chipset id in drm.

Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-01-15 13:06:09 -05:00
Keith Packard d1187641d6 Rename inappropriately named 'mask' fields to 'proposed_flags' instead.
Flags pending validation were stored in a misleadingly named field, 'mask'.
As 'mask' is already used to indicate pieces of a flags field which are
changing, it seems better to use a name reflecting the actual purpose of
this field. I chose 'proposed_flags' as they may not actually end up in
'flags', and in an case will be modified when they are moved over.

This affects the API, but not ABI of the user-mode interface.
2007-12-21 12:16:29 -08:00
Jesse Barnes 793cd1dad5 Make sure PLLs are enabled before writing pipe configuration regs
Fix from the X driver.  Make sure the PLLs are enabled and not in VGA mode
before writing PIPE(A|B)CONF regs to avoid hangs or crashes.
2007-11-10 14:39:36 -08:00
Dave Airlie 7f6bf84c23 drm: remove lots of spurious whitespace.
Kernel "cleanfile" script run.
2007-11-05 12:42:22 +10:00
Jesse Barnes 91aae7e683 Merge branch 'master' into vblank-rework, fixup remaining drivers
Conflicts:

	linux-core/drmP.h
	linux-core/drm_drv.c
	linux-core/drm_irq.c
	shared-core/i915_drv.h
	shared-core/i915_irq.c
	shared-core/mga_drv.h
	shared-core/mga_irq.c
	shared-core/radeon_drv.h
	shared-core/radeon_irq.c

Merge in the latest master bits and update the remaining drivers (except
mach64 which math_b is working on).  Also remove the 9xx hack from the i915
driver; it seems to be correct.
2007-10-30 12:52:46 -07:00
Dave Airlie 50dec29c80 drm/i915: add driver cache flush entry point
Use clflush on Intel hardware to flush cached objects.
2007-10-30 17:52:13 +10:00
Jesse Barnes 1e2a2babab i915: suspend/resume support
Add suspend/resume support to the i915 driver.  Moves some of the
initialization into the driver load routine, and fixes up places where we
assumed no dev_private existed in some of the cleanup paths.  This allows
us to suspend/resume properly even if X isn't running.
2007-10-26 16:10:02 -07:00
Dave Airlie be85ad0333 drm: detypedef ttm/bo/fence code 2007-07-16 13:37:02 +10:00
Michel Dänzer 3d5d41fa98 i915: Fix handling of breadcrumb counter wraparounds. 2007-06-15 17:13:11 +02:00
Michel Dänzer 0f5334be2b Remove DRIVER_IRQ_VBL(2).
If the driver doesn't support vertical blank interrupts, it won't call
drm_vblank_init(), and dev->num_crtcs will be 0.

Also fix an off-by-one test against dev->num_crtcs.
2007-06-15 11:01:51 +02:00
Thomas Hellstrom 84bea38353 Fix i915 sequence mask. 2007-06-15 10:35:52 +02:00
Jesse Barnes db689c7b95 Initial checkin of vblank rework. Code attempts to reduce the number
of vblank interrupt in order to save power.
2007-06-12 10:44:21 -07:00
Dave Airlie 81b811da37 drm/i915: set the bo up at firstopen time not after DMA init
This is required to use TTM to allocate the ring buffer.
2007-03-27 18:01:31 +10:00
Thomas Hellstrom e0f53e59be Simple fence object sample driver for via, based on idling the GPU.
Buffer object driver for via.
Some changes to buffer object driver callbacks.
Improve fence flushing.
2007-02-16 20:22:24 +01:00
Thomas Hellstrom 7766378d97 Initial support for fence object classes.
(Fence objects belonging to different command submission mechanisms).
2007-02-15 12:11:38 +01:00
Thomas Hellstrom 5c9a7b0f94 Remove an intel-specific hack and replace it with a fence driver callback. 2007-02-14 13:31:35 +01:00
Thomas Hellstrom 53aee3122a I915 accelerated blit copy functional.
Fixed - to System memory copies are implemented by
flipping in a cache-coherent TTM,
blitting to it, and then flipping it out.
2007-02-09 16:36:53 +01:00
Thomas Hellstrom af24465b2e Fix a stray unlock_kernel() in drm_vm.c
Add a file for memory move helpers, drm_bo_move.c
Implement generic memory move.
Cached, no_move and unmapped memory temporarily broken.
2007-02-07 12:52:23 +01:00
Thomas Hellstrom 609e3b0375 Implement a policy for selecting memory types. 2007-02-06 14:20:33 +01:00
Thomas Hellstrom 3024f23c65 memory manager: Make device driver aware of different memory types.
Memory types are either fixed (on-card or pre-bound AGP) or not fixed
(dynamically bound) to an aperture. They also carry information about:

1) Whether they can be mapped cached.
2) Whether they are at all mappable.
3) Whether they need an ioremap to be accessible from kernel space.

In this way VRAM memory and, for example, pre-bound AGP appear
identical to the memory manager.

This also makes support for unmappable VRAM simple to implement.
2007-01-31 14:50:57 +01:00
Thomas Hellstrom 5881ce1b91 Extend generality for more memory types.
Fix up init and destruction code.
2006-10-17 11:05:37 +02:00
Michel Dänzer 596d7e9984 Add support for secondary vertical blank interrupt to i915 driver.
When the vertical blank interrupt is enabled for both pipes, pipe A is
considered primary and pipe B secondary. When it's only enabled for one pipe,
it's always considered primary for backwards compatibility.
(cherry picked from 0c7d7f4361 commit)
2006-09-29 12:55:08 +02:00
Thomas Hellstrom c52fafa628 Don't enable fence / buffer objects on non-linux systems.
Bump driver minor and date.
2006-09-28 11:33:03 +02:00
Thomas Hellstrom 49fbeb339c Some bugfixes.
Change the fence object interface somewhat to allow some more flexibility.
Make list IOCTLS really restartable.
Try to avoid busy-waits in the kernel using immediate return to user-space with an -EAGAIN.
2006-09-15 11:18:35 +02:00
Thomas Hellstrom 44f6d08988 Validation and fencing. 2006-08-31 21:42:29 +02:00
Thomas Hellstrom 23f01c9fe8 Checkpoint commit. Buffer object flags and IOCTL argument list. 2006-08-29 18:40:08 +02:00
Thomas Hellstrom 7058d06317 Initial i915 buffer object driver 2006-08-22 10:24:48 +02:00
Thomas Hellstrom 8d5b7c77f9 Allow longer sequence lifetimes. 2006-08-21 21:37:43 +02:00
Thomas Hellstrom e089de33e8 i915 fence object driver implementing 2 fence object types:
0x00 EXE fence. Signals when command stream interpreter has reached the point
where the fence was emitted.
0x01 FLUSH fence. Signals when command stream interpreter has reached the point
where the fence was emitted, and all previous drawing operations have been
completed and flushed.
Implements busy wait (for fastest response time / high CPU) and
lazy wait (User interrupt or timer driven).
2006-08-21 21:36:00 +02:00