Amber Lake uses the same gen graphics as Kaby Lake, including a id
that were previously marked as reserved on Kaby Lake, but that now is
moved to AML page.
So, let's just move it to AML macro that will feed into KBL macro
just to keep it better organized to make easier future code review
but it will be handled as a KBL.
This is a copy of merged i915's
commit e364672477a1 ("drm/i915/aml: Introducing Amber Lake platform")
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Whiskey Lake uses the same gen graphics as Coffe Lake, including some
ids that were previously marked as reserved on Coffe Lake, but that
now are moved to WHL page.
So, let's just move them to WHL macros that will feed into CFL macro
just to keep it better organized to make easier future code review
but it will be handled as a CFL.
This is a copy of merged i915's
commit b9be78531d27 ("drm/i915/whl: Introducing Whiskey Lake platform")
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Add the PCI IDs and the basic code to enable ICL. This is the current
PCI ID list in our documentation.
Kernel commit: d55cb4fa2cf0 ("drm/i915/icl: Add the ICL PCI IDs")
v2: Michel provided a fix to IS_9XX that was broken by rebase bot.
v3: Fix double definition of PCI IDs, update IDs according to bspec
and keep them in the same order and rebase (Lucas)
Cc: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
This reverts commit ed07718ae7.
The commit added a guard since libpciaccess may be missing on some
setups. As of last commit there are no traces of the project, from
Android POV.
Hence, we can revert this workaround - which caused similar breakage to
the one it's trying to fix. This time in Mesa.
Cc: Rob Herring <rob.herring@linaro.org>
Acked-by: John Stultz <john.stultz@linaro.org>
This patch makes the code not rely anymore on libpciaccess when compiled
for Android to eliminate ioperm() and iopl() syscalls required by that
library. As a side effect, the mappable aperture size is hardcoded to 64
MiB on Android, however nothing seems to rely on this value anyway, as
checked be grepping relevant code in drm_gralloc and Mesa.
Cc: Rob Herring <rob.herring@linaro.org>
Signed-off-by: Tomasz Figa <tfiga@google.com>
[Emil Velikov: rebase against master. add missing __func__, Eric]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: John Stultz <john.stultz@linaro.org>
This will prevent any more missing `#include "config.h"` bug, at the
cost of having to recompile some files that didn't need to be when
changing build options.
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
When building AOSP after updating libdrm project to the
freedesktop/master branch, I've seen the following build errors:
external/libdrm/intel/Android.mk: error: libdrm_intel
(SHARED_LIBRARIES android-arm64) missing libpciaccess
(SHARED_LIBRARIES android-arm64) You can set
ALLOW_MISSING_DEPENDENCIES=true in your environment if this is
intentional, but that may defer real problems until later in the
build.
Using ALLOW_MISSING_DEPENDENCIES=true when building allows
things to function properly, but is not ideal.
So basically, while I'm not including the libdrm_intel package
into the build, just the fact that the Android.mk file references
libpciaccess which isn't a repo included in AOSP causes the build
failure.
So it seems we need some sort of conditional filter in the
Android.mk to skip over it if we're not building for intel.
Cc: Chad Versace <chad.versace@linux.intel.com>
Cc: Marissa Wall <marissaw@google.com>
Cc: Sean Paul <seanpaul@google.com>
Cc: Dan Willemsen <dwillemsen@google.com>
Cc: Tomasz Figa <tfiga@google.com>
Cc: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Let's sync CNL ids with Spec and kernel.
Sync with kernel commit '3f43031b1693 ("drm/i915/cnl:
Add Cannonlake PCI IDs for another SKU.")' and
commit 'e3890d05b342 ("drm/i915/cnl: Sync PCI ID with Spec.")'
Cc: James Ausmus <james.ausmus@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Helpful if your nm executable has a prefix based on the
architecture, for example.
Signed-off-by: Heiko Becker <heirecka@exherbo.org>
Cc: Timo Gurr <timo.gurr@gmail.com>
[Eric: v2: rebase and add Meson support]
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
This patch adds a complete meson build system, including tests and
install. It has the necessary hooks to allow it be used as a subproject
for other meson based builds such as mesa.
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-and-tested-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
No functional change. Just organizing the code
so it gets clear for future platforms.
Paulo deserves credits becuase he was the one
that just noticed this IS_9XX was in the wrong position
after CNL patches got introduced.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
As far as I understand, IS_9XX should return true for it.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
By the Spec all CNL Y skus are 2+2, i.e. GT2.
This is a copy of merged i915's
commit 95578277cbdb ("drm/i915/cnl: Add Cannonlake PCI IDs for Y-skus.")
v2: Add kernel commit id for reference.
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Platform enabling and its power-on are organized in different
skus (U x Y x S x H, etc). So instead of organizing it in
GT1 x GT2 x GT3 let's also use the platform sku.
This is a copy of merged i915's
commit e918d79a5d0a ("drm/i915/cnl: Add Cannonlake PCI IDs for U-skus.")
v2: Remove PCI IDs for SKU not mentioned in spec.
v3: Add kernel commit id for reference.
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Add the PCI IDs for U SKU IN CFL by following the spec.
v2: Update IDs
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Add the PCI IDs for H SKU IN CFL by following the spec.
v2: Update IDs
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Add the PCI IDs for S SKU IN CFL by following the spec.
v2: Update IDs.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drm_intel_gem_bo_free() unconditionally attempts to remove the handle
from the hashtable. This goes horribly wrong if we haven't already added
the bo to the hashtable.
Reported-by: Michael Thayer <michael.thayer@oracle.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Move the dereference after the null check.
Fixes: 028715ee70 ("intel: Avoid the need for most overflow
checks by using a scratch page.")
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Use obj->kflags to set EXEC_OBJECT_PINNED when the object is softpinned,
and so remember to clear the softpin status when the object is freed
(and reused).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Implicit synchronisation is the default behaviour of the kernel when
rendering with an execobject. It may be disabled with
drm_intel_gem_bo_disable_implicit_sync(), and then to restore it use
drm_intel_gem_bo_enable_implicit_sync().
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Allow the caller to pass in an fd to an array of fences to control
serialisation of the execbuf in the kernel and on the GPU, and in return
allow creation of a fence fd for signaling the completion (and flushing)
of the batch. When the returned fence is signaled, all writes to the
buffers inside the batch will be complete and coherent from the cpu, or
other consumers. The return fence is a sync_file object and can be
passed to other users (such as atomic modesetting, or other drivers).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
The kernel allows implicit synchronisation to be disabled on individual
buffers. Use at your own risk.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
... across the makefiles. Currently this isn't much but that will change
shortly.
As an added bonus this fixes all present and future cases where we've
forgotten to strip out the headers from LOCAL_SRC_FILES.
In a couple of cases (the tests) we start setting
LOCAL_EXPORT_C_INCLUDE_DIRS, which shouldn't be an issue.
Cc: Chih-Wei Huang <cwhuang@android-x86.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Seems to be the default option since ~2009 with commit 2f31293ba78 "auto
import from //branches/cupcake/...@137197". Fleshed out from a larger
commit in the AOSP repo/fork.
Cc: Dan Willemsen <dwillemsen@google.com>
Cc: Chih-Wei Huang <cwhuang@android-x86.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
bo->global_name should be updated first before a hash value
for the entry is calculated with it by HASH_ADD macro.
Signed-off-by: Dongwon Kim <dongwon.kim@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Just some trivial boring typo fixes all over the tree.
READMEs and comments only.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Exposing the u32 context ID makes it possible to define new drm kernel
interfaces based on the same IDs that e.g. execbuf uses to identify a
gem context, that aren't themselves abstracted by libdrm but need to be
used by libdrm/drm_intel_context based clients such as (parts of) i-g-t
or Mesa.
For example this can be used to configure an i915-perf stream to collect
metrics for a specific context.
v2: s/drm_intel_gem_context_get_context_id/drm_intel_gem_context_get_id/
Signed-off-by: Robert Bragg <robert@sixbynine.org>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
As well as allowing a hexadecimal PCI ID number, the
INTEL_DEVID_OVERRIDE environment variable can now contain one of a few
short codenames. The codenames are stored in a small table to map them
to a corresponding PCI ID. This makes it easier to use without having
to look up the PCI IDs manually.
The PCI IDs used are the same as those chosen for the -p option of
run.c in shader-db but SKL has been added as well.
Reviewed-by: Matt Turner <mattst88@gmail.com>
A slightly confused copy'n'paste from the open path where we pass in
handle but use it as a global name, in the prime handle-from-fd pass we
pass in handle and do mean handle!
References: https://bugs.freedesktop.org/show_bug.cgi?id=98416
Fixes: 2f23bf1b7b89 ("intel: Migrate handle/name lookups from linear lists...")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Walking a linear list to find a matching PRIME handle or flinked name
does not scale and becomes a major burden with just a few objects.
That said, the fixed size hash is not much better, it just buckets the
look into a few separate chains rather than one long one.
References: https://bugs.freedesktop.org/show_bug.cgi?id=94631
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Export a set of interfaces to allow the caller to have precise control
over mapping the buffer - but still provide caching of the mmaps between
callers.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Update kernel interface with new I915_GETPARAM ioctl entries for
pooled EU and min no. of eus in a pool. Add a wrapping function
for each parameter. Userspace drivers need these values when decide
the thread count. This kernel enabled pooled eu by default for BXT
and for fused down 2x6 parts it is advised to turn it off.
But there is another HW issue in these parts (fused
down 2x6 parts) before C0 that requires Pooled EU to be enabled as a
workaround. In this case the pool configuration changes depending upon
which subslice is disabled and the no. of eus in a pool is different,
So userspace need to know min no. of eus in a pool.
V2: use return value as the query results.
ret < 0 when error, ret = 0 when not support, and ret > 0 indicate
query results.(Chris)
V3: Correct V2 errors.
Signed-off-by: Yang Rong <rong.r.yang@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Currently only some Android Makefiles are included in the release tarball.
To be more consistent one could either add the remaining files or don't
ship Android Makefiles altogether.
According to Emil the Android folk doesn't use our release tarballs.
Thus it makes sense to remove those files from distribution which also
means less work for maintenance in the future.
Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
José Roberto de Souza
Paulo Zanoni
Matt Atwood
Emil Velikov
Tomasz Figa
Eric Engestrom
John Stultz
Rodrigo Vivi
Heiko Becker
Dylan Baker
Anuj Phogat
Ben Widawsky
Anusha Srivatsa
Eric Engestrom
Chris Wilson
Thomas Hindoe Paaboel Andersen
Dave Airlie
Dongwon Kim
Grazvydas Ignotas
Michel Dänzer
Robert Bragg
Matt Turner
Neil Roberts
Yang Rong
Andreas Boll