7fbd10d933
nouveau: nv2a drm context switch support.
2007-10-04 03:44:23 +02:00
0379919e99
Use 'ifdef __BIG_ENDIAN' instead of 'if __BIG_ENDIAN'
2007-10-03 14:12:16 -07:00
7f99fd5d7a
First round of byte-ordering fixes for PowerPC.
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This isn't 100% as command submission via PCI-e GART buffers doesn't work.
I've hacked around that for the time being. This is essentially the code
that was used at the POWER.org event to show Bimini.
2007-10-03 14:08:29 -07:00
a72eb27fbc
nouveau: nv20 graph_create_context difference
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nv20 writes the chan->id to a different place than nv28.
This still does not make nv20 run nv10_demo.
2007-10-02 22:18:47 +03:00
afc57ef1df
nouveau: fix nv25_graph_context_init
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It was writing 4x the data in a loop.
2007-10-02 22:18:47 +03:00
ffa3173ec4
nouveau: nv20 graph context init
2007-10-02 22:18:46 +03:00
69fcfb413e
nouveau: Fix dereferencing a NULL pointer when erroring out during initialization.
2007-10-01 22:21:23 +02:00
e1600646a9
nouveau: flip the ctx switch bit on. it seems to be ignored on nv34 but causes nv30 issues.
2007-10-01 03:28:10 +02:00
75e8f4b5cf
nouveau : nv30 remove harcoded NV20_PGRAPH_CHANNEL_CTX_TABLE
2007-09-30 23:19:39 +02:00
9cd6ece307
nouveau : nv20_graph replace nouveau_graph_wait_idle by nouveau_wait_for_idle
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Also clean PGRAPH_CHANNEL macros
2007-09-30 23:09:30 +02:00
aa135ba8e8
nouveau: rename nv30_graph.c to nv20_graph.c
2007-09-30 22:16:01 +03:00
205403aea8
nouveau: nv30 graph function renames, removed nv20_graph.c
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All nv30 functions in nv30_graph.c that can be used on nv20 are renamed
as accordingly. nv20 specific parts from nv20_graph.c are moved into
nv30_graph.c.
2007-09-30 22:16:01 +03:00
a67060c810
nouveau: graph ctx init nv25
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According to mmio_trace_900XGL.tar.bz2 by Evan Fraser the nv25 init is
exactly the same as nv28 init.
2007-09-30 22:16:01 +03:00
aa2c337991
nouveau: nv28 graph context init
2007-09-30 22:16:01 +03:00
8ad605a264
nouveau: let nv20 hardware do ctx switching automatically.
2007-09-30 22:16:01 +03:00
dc592c8b7b
nouveau: Make nv20 use the nv30 PGRAPH ctx functions.
2007-09-30 22:16:01 +03:00
88bdb38cea
nouveau: Change couple constants to symbols.
2007-09-30 22:16:01 +03:00
a45fce7712
nouveau: NV30 should never call nouveau_nv20_context_switch().
2007-09-30 22:16:01 +03:00
fb3ed99fb1
nouveau : pgraph_ctx dynamic alloc for nv04, nv10
2007-09-30 14:50:22 +02:00
c76e04828b
nouveau : nv04 don't use chan->pgraph_ctx array
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This commit is a first step to dynamic alloc pgraph context on nv04, nv10.
2007-09-30 14:21:47 +02:00
f8f31f0457
nouveau : stop the fifo of the channel we are deleting
2007-09-29 23:07:29 +02:00
097db7a9b0
nouveau : nv1x fix strange corruption
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that appears when running glxgears and nouveau demo
2007-09-29 23:07:29 +02:00
f863d23e01
radeon: Commit the ring after each partial texture upload blit.
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This makes sure each blit starts as early as possible, which may improve
texture upload performance in some cases.
2007-09-29 18:08:04 +02:00
215eab6ccf
Don't build without any optimization on Linux.
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Building without optimization causes the drm module not to link correctly on
ppc.
2007-09-29 18:07:55 +02:00
72134e939e
nouveau : clean chan->pgraph_ctx stuff. We now do a static init of the array.
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This avoid hardcoding pgraph_ctx size and potential buffer overflow.
2007-09-28 21:29:58 +02:00
0bb2395a8b
Revert drm_i915_flip_t braindamage
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I should not have renamed this field.
I should not have renamed this field.
I should not have renamed this field.
On the plus side, it was at least binary compatible.
2007-09-28 10:10:08 -07:00
24cdd2f8c4
Allow parallel module compile
2007-09-26 14:25:13 -07:00
b44925b2a5
Add brackets
2007-09-26 16:18:19 +01:00
6671ad1917
don't copy back if an error was returned.
2007-09-26 15:38:54 +01:00
03c47f1420
drm: use fence_class as name instead of class
2007-09-25 16:17:17 +10:00
bb5516f4f4
drm/ttm: fixup fence class naming and interfaces
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This is some code for nouveau that Ben Skeggs worked on, and also
fixes the naming (having class in a system header file == C++ keyword == bad plan)
2007-09-25 16:17:17 +10:00
54df1b9ff3
Fix pinned buffer fence class.
2007-09-22 14:30:55 +02:00
24e33627c5
Merge branch 'bo-set-pin'
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This branch replaces the NO_MOVE/NO_EVICT flags to buffer validation with a
separate privileged ioctl to pin buffers like NO_EVICT meant before. The
functionality that was supposed to be covered by NO_MOVE may be reintroduced
later, possibly in a different way, after the superioctl branch is merged.
2007-09-21 17:12:19 -07:00
e7bfeb3031
Add some more verbosity to drm_bo_set_pin_req comments.
2007-09-21 16:14:22 -07:00
3c995c2c4d
Fix mapCount refcounting on unmap, even though the value is unused.
2007-09-21 15:58:02 -07:00
7587e9682c
nouveau: fix ppc and get it right this time.
2007-09-21 22:42:39 +02:00
dc60c452e6
nouveau: fix notifiers on PPC.
2007-09-21 22:27:53 +02:00
74c6f2f47a
nouveau: add some checks to the nv04 graph switching code.
2007-09-21 22:04:50 +02:00
bc5423f168
drm_sysfs: update sysfs code from kernel
2007-09-20 14:01:29 +10:00
3d3a96ad4e
Merge branch 'origin' into bo-set-pin
2007-09-19 15:55:58 -07:00
e349b58b4a
i915: Reinstate check that drawable has valid information in i915_vblank_swap.
2007-09-18 21:06:55 +01:00
78d111fa96
i915: Fix scheduled buffer swaps.
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One instance of unlocking a spinlock was converted incorrectly when this code
was fixed to build on BSD.
2007-09-18 21:06:55 +01:00
a3881ad2fe
Add ioc32 compat layer for XGI DRM.
2007-09-18 11:03:49 -07:00
e7d4a26913
Fix ioc32 compat layer
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Previously any ioctls that weren't explicitly listed in the compat ioctl
table would fail with ENOTTY. If the incoming ioctl number is outside the
range of the table, assume that it Just Works, and pass it off to drm_ioctl.
This make the fence related ioctls work on 64-bit PowerPC.
2007-09-18 11:03:08 -07:00
41345b95a2
Added bool typedef added in kernel 2.6.19
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This allows the xgi code to compile with older kernels.
2007-09-12 12:05:15 -06:00
c453135789
Added idr_replace() function which was apparently added in Linux 2.6.18
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Someone should probably double-check my work here since this is the
first time I've touched drm_compat.[ch]
2007-09-12 11:49:51 -06:00
852232fb80
Remove plane->pipe mapping from SAREA private after all
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We can figure out which pipe a given plane is mapped to by looking at the
display control registers instead of tracking it in a new SAREA private field.
If this becomes a performance problem, we could move to an ioctl based solution
by adding a new parameter for the DDX to set (defaulting to the old behavior if
the param was never set of course).
2007-09-12 08:55:33 -07:00
7fdf98051a
Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/drm
2007-09-11 03:50:17 -07:00
3cb8acd5ab
Disambiguate planes & pipes for swap operations
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This mod makes the SAREA track plane to pipe mappings and corrects the name of
the plane info variables (they were mislabeled as pipe info since until now all
code assumed a direct mapping between planes and pipes).
It also updates the flip ioctl argument to take a set of planes rather than
pipes, since planes are flipped while pipes generate vblank events.
2007-09-11 03:48:46 -07:00
0bd8752a0c
nouveau: nv10: add combiner registers
2007-09-10 18:53:48 +02:00
Stephane Marchesin
Ian Romanick
Pekka Paalanen
Stuart Bennett
Maarten Maathuis
Matthieu Castet
chaohong guo
Michel Dänzer
Jesse Barnes
Keith Packard
Alan Hourihane
Dave Airlie
Thomas Hellstrom
Eric Anholt
Dave Airlie
Brian
Patrice Mandin