Zhenyu Wang
00f549bd5f
i915: Add support for Intel 4 series chipsets
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Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-06-18 14:19:38 +08:00
Jerome Glisse
59112c9e52
radeon: *really* fix screen corruption thanks to Lukasz Krotowski
2008-06-15 20:18:29 +02:00
Jerome Glisse
6f8cc95703
radeon: actualy try to fix the corruption
2008-06-15 19:31:02 +02:00
Jerome Glisse
9dd58d6568
radeon: fix screen corruption introduced by last patch
2008-06-15 18:49:47 +02:00
Jerome Glisse
00b4063906
radeon: bump driver date to know if lockup fix is in
2008-06-13 10:02:41 +02:00
Jerome Glisse
1aafbb83d9
radeon: r345xx fixe hard lockup
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This patch should fixe hard lockup and convert them in
softlockup (ie you can ssh the box but the gpu is busted
and we are waiting in loop for it to come back to reason).
2008-06-13 09:54:05 +02:00
Alex Deucher
a07c82183a
RADEON: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTAT
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According to the hw guys, you should use DSTCACHE_CTLSTAT to flush
the 2D dst cache rather than RB2D_DSTCACHE_CTLSTAT.
2008-06-11 18:25:47 -04:00
Ian Romanick
b535567ee9
xgixp: Remove dependency on TTM fences
2008-06-10 22:18:14 -07:00
Alex Deucher
4b8aecbde8
RADEON: Add untested support for RS400 chips
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GART setup appears to work the same as RS480 chips.
Also RC4xx chips are actually RS400 based, not RS480 based.
2008-06-09 16:58:06 -04:00
Alex Deucher
f6982b54c9
RADEON: switch IGP gart to use radeon_write_agp_base()
2008-06-09 16:28:35 -04:00
Robert Noland
63eb58040d
Fix typo in i915_suspend
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Reported by vehemens
2008-06-08 23:46:14 -04:00
Robert Noland
116870a908
I915 suspend/resume for FreeBSD
2008-06-08 13:56:14 -04:00
Dave Airlie
d43f3cb097
r300/r500: add hier-z regs
2008-06-09 05:32:41 +10:00
Dennis Kasprzyk
6905c7a29d
radeon: Restore software interrupt on resume.
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Fixes performance drop after suspend/resume on some systems.
2008-06-05 18:23:37 +02:00
Dave Airlie
d5ae19ebcf
drm: sg alloc should write back the handle to userspace
2008-06-03 12:44:06 +10:00
Alex Deucher
a12cbf8aa5
RADEON: fix typo in last commit
2008-05-30 18:20:01 -04:00
Dave Airlie
6e8a2cff66
r500: attempt to make AGP work by programming agp base in the MC correctly
2008-05-30 20:27:31 +10:00
Dave Airlie
5b86823fa3
radeon: split microcode out into a separate header file.
2008-05-28 11:12:57 +10:00
Dave Airlie
0c8a8db1b6
i915: fix BSD bh, DRI2 not uses anywhere else
2008-05-28 10:28:13 +10:00
Dave Airlie
c06096d34f
radeon: bump release date/version for r500 3D support
2008-05-28 10:02:20 +10:00
Alex Deucher
59c953245c
RADEON: add get_param for number of GB pipes
2008-05-27 18:34:33 -04:00
Jie Luo
e45f95a03b
[i915] Fix typo in (unused) START_ADDR definition.
2008-05-27 14:55:01 -07:00
Robert Noland
8cd045079e
[FreeBSD] Add vblank-rework support and get drivers building.
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The i915 driver now works again.
2008-05-27 14:25:20 -07:00
Dave Airlie
49075b678f
r500: add two more register ranges for mesa driver to setup
2008-05-23 09:40:26 +10:00
Dave Airlie
74a9ea896e
drm: fix nouveau warning
2008-05-23 09:40:26 +10:00
Dave Airlie
91c6c4b240
rs690/r500: vblank support.
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The new display controller has the vblank interrupts in a different place.
Add support for vbl interrupts for these chips
2008-05-21 21:27:33 +10:00
Dave Airlie
8399656106
r500: add more register ranges for Mesa driver
2008-05-17 10:22:12 +10:00
Alex Deucher
caace3692f
RS4xx: separate out RS400 and RS480 IGP chips
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RS400 (intel based IGP) and RS480 (AMD based IGP) have
different MC and GART setups. Currently we only support
RS480.
2008-05-13 21:02:17 -04:00
Alex Deucher
10d754f0a2
RADEON: fix copy/pasto in last commit
2008-05-12 14:49:43 -04:00
Alex Deucher
75bc739bee
R3/4/5: init pipe setup in drm
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Similar (broken) code in mesa needs to be removed
2008-05-12 09:44:20 -04:00
Alex Deucher
e16a7101e8
RADEON: cleanup radeon_do_engine_reset()
2008-05-12 09:35:06 -04:00
Alex Deucher
5532b8d2a0
R300+: fixup pixcache flush
2008-05-12 09:30:47 -04:00
Alex Deucher
3582e82f14
RS4xx: fix MCIND index mask
2008-05-12 09:24:13 -04:00
Alex Deucher
d26af273f8
RADEON: write AGP_BASE_2 on chips that support it
2008-05-12 09:21:45 -04:00
Alex Deucher
c307e50724
R300+: fixup PURGE/FLUSH macros
2008-05-12 09:18:28 -04:00
Alex Deucher
fb9eaff747
Radeon IGP: merge RS4xx/RS6xx gart setup
2008-05-12 09:13:44 -04:00
Alex Deucher
68b7f550ba
Radeon IGP: wrap MCIND access
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first step in merging rs4xx/rs6xx gart setup
2008-05-12 09:00:40 -04:00
Alex Deucher
a34025ce22
Radeon IGP: clean up registers and magic numbers
2008-05-12 08:56:11 -04:00
Dave Airlie
d015219bd0
r500: add allowed range for us config/pixsize
2008-05-05 17:03:27 +10:00
Ben Skeggs
3ac74f3208
nv50: enable 0x400500 bit 0 after PGRAPH exception also
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No solid idea about what these 2 bits do, but nv50 can now survive a few
PGRAPH exceptions just as nv40 does :)
2008-05-02 01:36:30 +10:00
Ben Skeggs
6d8062ac1e
nouveau: guard against channels potentially not having a context, fix nv50
2008-05-02 01:36:08 +10:00
Ben Skeggs
77d20928b3
nouveau: disable all card interrupts when unknown PFIFO IRQ occurs.
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This is possibly temporary. I can trigger an unending IRQ storm on G8x
in some circumstances, and have no idea how to handle that particular PFIFO
exception correctly yet.
2008-05-02 00:53:42 +10:00
Ben Skeggs
5c4c778c0d
nouveau: restore original NV_PFIFO_CACHES_REASSIGN value in fifo handler
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Doesn't fix any issue I've seen, but is a potential issue if a FIFO IRQ
occurs during channel creation/takedown.
2008-05-02 00:52:21 +10:00
Ben Skeggs
bfbe4ade32
nouveau: gather nsource in trap_info()
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The IRQ handling stuff really is a mess.. On the TODO :)
2008-05-02 00:51:00 +10:00
Ben Skeggs
e317dfdabf
nv50: PGRAPH exception handling completely different from earlier chips
2008-05-02 00:06:22 +10:00
Ben Skeggs
b92efd5956
nv50: I cave... Add nv84 initial context values.
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I swore I'd actually do this properly and not go the horrible route
we did with nv4x, but I won't get around to it just yet with so many
*actually* interesting things to do first.. One day.
Since someone already added nv86, why not!
2008-05-01 23:50:44 +10:00
Jesse Barnes
cb33133ef3
i915: fix off by one in VGA save/restore of AR & CR regs
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Turns out it's important to save/restore AR14 in particular.
2008-04-29 12:39:38 -07:00
Maarten Maathuis
f31e04a960
nouveau: NV9x cards exist as well.
2008-04-29 19:34:22 +02:00
Jesse Barnes
7f8e406085
Use fixed sized types in new ioctls
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Make both crtc and the command argument 32 bits to avoid any 32-on-64 compat
issues.
2008-04-27 09:42:17 -07:00
Jesse Barnes
b45fe49bcd
Enum-ectomy of vblank modesetting ioctl
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Enum can be of pretty much any size since C leaves the choice of size up to the implementation. So avoid using it in new interfaces like the vblank pre- & post-modeset ioctl. Thanks to hch for spotting this.
2008-04-26 17:11:18 -07:00