Commit Graph

74 Commits (8a78dead291ffdb5a8774419cdca369a1e27cad9)

Author SHA1 Message Date
Alan Hourihane 8a78dead29 Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
Conflicts:

	linux-core/drm_drv.c
	linux-core/drm_fops.c
	linux-core/drm_objects.h
	linux-core/drm_stub.c
	shared-core/i915_dma.c
2007-06-29 20:09:44 +01:00
Michel Dänzer 3d5d41fa98 i915: Fix handling of breadcrumb counter wraparounds. 2007-06-15 17:13:11 +02:00
Wang Zhenyu 109e2a10f2 Add support for the G33, Q33, and Q35 chipsets.
These require that the status page be referenced by a pointer in GTT, rather
than phsyical memory.  So, we have the X Server allocate that memory and tell
us the address, instead.
2007-06-05 11:15:29 -07:00
Jesse Barnes 462d5a0dfc Suspend/resume support (incomplete). 2007-05-22 17:49:04 -07:00
Jesse Barnes b7bf317f42 Merge branch 'modesetting-101' of git+ssh://git.freedesktop.org/git/mesa/drm into origin/modesetting-101
Conflicts:

	linux-core/drm_crtc.c
	linux-core/drm_fb.c

Lots of changes to merge with alanh's latest stuff:
  o fix use of fb->pitch now that it has the right value
  o add new helper for finding the CRTC given an FB
  o fix new fb_probe/fb_remove functions to take a CRTC
  o fixup callers of new FB routines
  o port drm_fb changes to intel_fb
  o check for errors after creating fb buffer object
  o go back to using cfb_imageblit since the accel stubs aren't ready
2007-05-17 10:35:07 -07:00
Jesse Barnes a18b4befb9 Fix FB pitch value (we had it wrong and were working around it in a few
places).
Add new FB hooks to the drm driver structure and make i915 use them for an
Intel specific FB driver.  This will allow acceleration and better handling
of the command stream.
2007-05-17 09:00:06 -07:00
Alan Hourihane eba00df120 Just some minor cleanups. 2007-05-10 13:16:05 +01:00
Dave Airlie 34be91fe4e i915: fix vblank pipe setup 2007-04-26 14:50:00 +10:00
Jesse Barnes 1c7f895fa6 Merge branch 'modesetting-101' of git+ssh://git.freedesktop.org/git/mesa/drm into origin/modesetting-101
Conflicts:

	shared-core/i915_init.c - reconcile with airlied's new code
2007-04-17 10:14:18 -07:00
Jesse Barnes eeb5de0594 Cleanup whitespace, rename macro argument. 2007-04-17 09:59:21 -07:00
Dave Airlie 79aa1d5474 another large overhaul of interactions with userspace...
We need to keep a list of user created fbs to nuke on master exit.
We also need to use the bo properly.
2007-04-17 18:16:38 +10:00
David Airlie cc471a361f i915/drm: clean up a lot of the i915/drm startup/teardown sequences
When the kernel driver is loaded it sets up a lot of stuff..
it tears down the same stuff on unload.

This add a new map type called DRM_DRIVER which means the driver will clean the mapping up
and fix up the map cleaner
2007-04-13 14:51:16 +10:00
Jesse Barnes 8dd75bd601 Add aperture size and preallocation probing (from intelfb), cleanup load code to be more general. 2007-04-11 11:47:58 -07:00
Jesse Barnes 44a8761302 Merge branch 'modesetting-101' of git+ssh://git.freedesktop.org/git/mesa/drm into origin/modesetting-101
Conflicts:

	linux-core/drm_crtc.c - trivial merge
	linux-core/drm_crtc.h - trivial merge
	linux-core/intel_display.c - crtc_config -> mode_config
	shared-core/i915_dma.c - accommodate new init code in i915_init.c
2007-04-10 10:45:55 -07:00
Jesse Barnes 5130918e25 Add save/restore state for LVDS code, along with a few other LVDS related
items to i915 private structure.
2007-04-10 09:51:17 -07:00
David Airlie 40bd6dcd86 set the base address of the CRTC correctly 2007-04-10 15:20:50 +10:00
Dave Airlie 52f9028c84 Initial import of modesetting for intel driver in DRM 2007-04-05 11:21:06 +10:00
Dave Airlie 81b811da37 drm/i915: set the bo up at firstopen time not after DMA init
This is required to use TTM to allocate the ring buffer.
2007-03-27 18:01:31 +10:00
Dave Airlie 26aba875e1 more whitespace issues 2007-03-19 08:56:24 +11:00
Michel Dänzer a33859184a i915: Eliminate dev_priv->current_page.
Always use dev_priv->sarea_priv->pf_current_page directly. This allows clients
to modify it as well while they hold the HW lock, e.g. in order to sync pages
between pipes.
2007-02-28 17:48:56 +01:00
Michel Dänzer 1cdc1b6fba i915: Don't emit waits for pending flips before emitting synchronous flips.
The assumption is that synchronous flips are not isolated usually, and waiting
for all of them could result in stalling the pipeline for long periods of time.

Also use i915_emit_mi_flush() instead of an old-fashioned way to achieve the
same effect.
2007-02-28 15:23:19 +01:00
Michel Dänzer 1a0d890a42 i915: Add support for scheduled buffer swaps to be done as flips.
Unfortunately, emitting asynchronous flips during vertical blank results in
tearing. So we have to wait for the previous vertical blank and emit a
synchronous flip.
2007-02-22 17:21:18 +01:00
Michel Dänzer 6f89584e13 i915: Improved page flipping support, including triple buffering.
Pages are tracked independently on each pipe.

Bump the minor version for 3D clients to know page flipping is usable, and
bump driver date.
2007-02-19 15:08:40 +01:00
Michel Dänzer 34aa3393d0 i915: Page flipping enhancements.
Leave it to the client to wait for the flip to complete when necessary,
but wait for a previous flip to complete before emitting another one. This
should help avoid unnecessary stalling of the ring due to pending flips.

Call i915_do_cleanup_pageflip() unconditionally in preclose.
2007-02-19 15:08:40 +01:00
Michel Dänzer 078e430726 i915: Unify breadcrumb emission. 2007-02-19 15:08:40 +01:00
Thomas Hellstrom e0f53e59be Simple fence object sample driver for via, based on idling the GPU.
Buffer object driver for via.
Some changes to buffer object driver callbacks.
Improve fence flushing.
2007-02-16 20:22:24 +01:00
Thomas Hellstrom a78f70faad Merge branch 'ttm-vram-0-1-branch' 2007-02-14 15:33:40 +01:00
Thomas Hellstrom 5c9a7b0f94 Remove an intel-specific hack and replace it with a fence driver callback. 2007-02-14 13:31:35 +01:00
Thomas Hellstrom 53aee3122a I915 accelerated blit copy functional.
Fixed - to System memory copies are implemented by
flipping in a cache-coherent TTM,
blitting to it, and then flipping it out.
2007-02-09 16:36:53 +01:00
Eric Anholt 8918748058 Add chip family flags to i915 driver, and fix a missing '"' in mach64 ID list. 2007-02-07 21:26:01 -08:00
Thomas Hellstrom 609e3b0375 Implement a policy for selecting memory types. 2007-02-06 14:20:33 +01:00
Thomas Hellstrom 3024f23c65 memory manager: Make device driver aware of different memory types.
Memory types are either fixed (on-card or pre-bound AGP) or not fixed
(dynamically bound) to an aperture. They also carry information about:

1) Whether they can be mapped cached.
2) Whether they are at all mappable.
3) Whether they need an ioremap to be accessible from kernel space.

In this way VRAM memory and, for example, pre-bound AGP appear
identical to the memory manager.

This also makes support for unmappable VRAM simple to implement.
2007-01-31 14:50:57 +01:00
Zou Nan hai 7d4e6b1445 vblank interrupt fix 2007-01-24 16:33:21 +08:00
Keith Packard 31daf66962 Revert i915 drm driver name to i915; miniglx doesn't work otherwise
Yes, this driver supports the new memory manager, that is indicated by the
version number being >= 1.7.
2007-01-06 17:40:50 -08:00
Wang Zhenyu 2851c9f5c6 Bump i915 minor for ARB_OC ioctl 2007-01-06 16:26:54 -08:00
Thomas Hellstrom 10150df02b Simplify the AGP backend interface somewhat.
Fix buffer bound caching policy changing, Allow
on-the-fly changing of caching policy on bound buffers if the hardware
supports it.

Allow drivers to use driver-specific AGP memory types for TTM AGP pages.
Will make AGP drivers much easier to migrate.
2006-10-12 12:09:16 +02:00
Thomas Hellstrom 8e908eaf50 Bump driver date. 2006-09-29 14:21:51 +02:00
Michel Dänzer 3620a3ec85 i915: Bump minor again to differentiate from vsync changes. 2006-09-29 12:55:09 +02:00
Michel Dänzer c0bff9f9cd i915: Bump minor for swap scheduling ioctl and secondary vblank support.
(cherry picked from 2627131e5d commit)
2006-09-29 12:55:09 +02:00
Michel Dänzer da75d59cd6 i915: Add ioctl for scheduling buffer swaps at vertical blanks.
This uses the core facility to schedule a driver callback that will be called
ASAP after the given vertical blank interrupt with the HW lock held.
(cherry picked from 257771fa29 commit)
2006-09-29 12:55:08 +02:00
Michel Dänzer 596d7e9984 Add support for secondary vertical blank interrupt to i915 driver.
When the vertical blank interrupt is enabled for both pipes, pipe A is
considered primary and pipe B secondary. When it's only enabled for one pipe,
it's always considered primary for backwards compatibility.
(cherry picked from 0c7d7f4361 commit)
2006-09-29 12:55:08 +02:00
Thomas Hellstrom c52fafa628 Don't enable fence / buffer objects on non-linux systems.
Bump driver minor and date.
2006-09-28 11:33:03 +02:00
Thomas Hellstrom 273eb7833d Add /proc filesystem buffer / fence object accounting.
Check for NULL pointer in the i915 flush handler.
Remove i915_sync_flush declaration.
2006-09-25 11:51:08 +02:00
Thomas Hellstrom f613022cee Allow a "native type" to be associated with a fence sequence.
In the intel case, we can associate a flush with a sequence.
2006-09-15 16:47:09 +02:00
Thomas Hellstrom 99acb79366 Various bugfixes. 2006-09-08 17:24:38 +02:00
Thomas Hellstrom 034fc31292 i915: Only turn on user IRQs when they are needed. 2006-09-05 14:23:18 +02:00
Thomas Hellstrom 44f6d08988 Validation and fencing. 2006-08-31 21:42:29 +02:00
Thomas Hellstrom 7058d06317 Initial i915 buffer object driver 2006-08-22 10:24:48 +02:00
Thomas Hellstrom e089de33e8 i915 fence object driver implementing 2 fence object types:
0x00 EXE fence. Signals when command stream interpreter has reached the point
where the fence was emitted.
0x01 FLUSH fence. Signals when command stream interpreter has reached the point
where the fence was emitted, and all previous drawing operations have been
completed and flushed.
Implements busy wait (for fastest response time / high CPU) and
lazy wait (User interrupt or timer driven).
2006-08-21 21:36:00 +02:00
Dave Airlie 7a46d41399 i965 code and Linux coding style < 0
smack my whitespace up.
2006-08-10 14:38:50 +10:00