Commit Graph

5274 Commits (8bdb4cfa450b16f2c70729f923fa05d9553d7118)

Author SHA1 Message Date
Ville Syrjälä 8a88e34997 modetest: Make RGB565 pwetty too
Render the crosshairs for 565 and x888/a888 formats.

v2: Use the drm format to determine cairo format

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2013-05-22 13:13:12 +03:00
Rob Clark 3586337f37 freedreno: also remove from name table on bo delete
When adding the name tracking, I missed removing from the name table
when the bo was deleted, leaving a dangling pointer.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-05-17 16:13:02 -04:00
Rob Clark acfbf394a9 freedreno: add some asserts
Things are worse if we issueibcmds with bogus gpu ptrs, so it is better
to just make userspace crash when things go pear shaped.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-05-15 15:34:15 -04:00
Rob Clark 0b89e2730c freedreno: add handle and name tracking
Due to the evil userspace buffer tracking we have to do, and hacks for
creating GEM buffer from fbdev/scanout, "evil-twin" fd_bo objects are
problematic.  So introduce hashtable tracking of bo's and dev's, to
avoid getting duplicate fd_bo ptrs for the same underlying gem object,
in particular when importing via flink name.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-05-15 15:34:15 -04:00
Marek Olšák 63aeae1238 configure.ac: bump version to 2.4.45 for release 2013-05-15 19:32:05 +02:00
Marek Olšák e5e51c2110 radeon: add RADEON_SURF_FMASK flag which disables 2D->1D tiling transition
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-05-15 19:15:42 +02:00
Alex Deucher 96e90aabc4 radeon: add HAINAN pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-05-13 16:16:14 -04:00
Alex Deucher c56729cc15 radeon: add HAINAN family
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-05-13 16:16:08 -04:00
Dave Airlie 040f6b015e drm: add qxl drm header file
Now that this driver is merged add the header file.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-05-09 12:55:42 +10:00
Xiang, Haihao 011999927f intel: Add support for VEBOX ring (v2)
v2: Fix the test for has_vebox

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-27 11:31:22 -07:00
Rob Clark b3a3a77823 freedreno: add synchronization between mesa and ddx
Super-cheezy way to synchronization between mesa and ddx..  the
SET_ACTIVE ioctl gives us a way to stash a 32b # w/ a GEM bo, and
GET_BUFINFO gives us a way to retrieve it.  We use this to stash
the timestamp of the last ISSUEIBCMDS on the buffer.

To avoid an obscene amount of syscalls, we:
 1) Only set the timestamp for buffers w/ an flink name, ie.
    only buffers shared across processes.  This is enough to
    catch the DRI2 buffers.
 2) Only set the timestamp for buffers submitted to the 3d ring
    and only check the timestamps on buffers submitted to the
    2d ring.  This should be enough to handle synchronizing of
    presentation blit.  We could do synchronization in the other
    direction too, but that would be problematic if we are using
    the 3d ring from DDX, since client side wouldn't know this.

The waiting on timestamp happens before flush, and setting of
timestamp happens after flush.  It is transparent to the user
of libdrm_freedreno as all the tracking of buffers happens via
_emit_reloc()..

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-04-25 17:33:59 -04:00
Alex Deucher ec3c257eb6 radeon: add new richland pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-25 14:13:52 -04:00
Alex Deucher 439d7d7432 radeon: add new SI pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-25 14:12:50 -04:00
Rob Clark 12464a70ed Add exynos_fimg2d_test to .gitignore
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-04-22 14:50:57 -04:00
Rob Clark 86709ba537 freedreno: add gpu-id property
Gallium driver will need to query this to figure out whether to load the
a2xx or a3xx driver.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-04-22 14:49:28 -04:00
Jerome Glisse 9768af201e libdrm 2.4.44 2013-04-18 15:01:19 -04:00
Ville Syrjälä 83e7746124 modetest: Add YUV420 support and fix YVU420 Cb/Cr ordering
YUV420 support is trivial to add since the code already supports
YVU420.

But it looks like the YVU420 support is a bit broken. The chroma
planes are passed in the wrong order to the fill functions, so
fix that while were at it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2013-04-18 14:53:14 -04:00
Ville Syrjälä 3f024f85d8 modetest: Pass format_info to fill_tiles functions
The fourcc is inside the format_info structure, so if we want to use
it inside the various fill_tiles functions, we need to pass down the
whole format_info, not just the rgb/yuv infos.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2013-04-18 14:53:02 -04:00
Ville Syrjälä 2c26a106fc modetest: Reduce the length of the connector type string
Spelling out eDP or DP make for a ridicilously long string which plays
havoc with formatting. Just say eDP or DP.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2013-04-18 14:52:38 -04:00
Ville Syrjälä 8e56579b20 modetest: Print possible_crtcs for planes
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2013-04-18 14:52:29 -04:00
Ville Syrjälä fa2925aa34 modetest: Add support for all 16/32 bpp RGB formats
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2013-04-18 14:52:21 -04:00
Ville Syrjälä c2988eb211 modetest: Fix pitches, somewhat
libkms only has the xrgb8888 format, so we're overallocating the bo by
quite a lot in some cases. But we still need to get the pitch from the
libkms since it's the driver that decides how to align it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2013-04-18 14:52:00 -04:00
Laurent Pinchart aa4afdf0b3 kms: Return a negative error code in kms_bo_create()
The function returns returns 0 on success or a negative value in case of an
error, except when given invalid attributes in which case it returns the
positive EINVAL value. Replace that with -EINVAL to allow the caller to detect
errors with a < 0 check.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
2013-04-18 10:07:01 -04:00
Laurent Pinchart 9fa4a4b1a8 kms: Make libkms.h usable in C++
Wrap the header in extern "C" { ... };.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
2013-04-18 10:05:53 -04:00
Rob Clark e5d8a9c1d6 freedreno: add shifted reloc
Needed for RB_COPY_DEST_BASE register on a3xx.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-04-13 08:13:57 -04:00
Jerome Glisse a36cdb858e radeon: add si tiling support v5
v2: Only writte tile index if flags for it is set
v3: Remove useless allow2d scanout flags
v4: Split radeon_drm.h update to its own patch
v5: update against lastest next tree for radeon

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2013-04-12 09:46:40 -04:00
Jerome Glisse 309cb649a3 radeon: update radeon_drm.h to kernel last API additions v2
v2: sync with radeon-next tree for 3.10

http://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-3.10-wip

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2013-04-12 09:46:20 -04:00
Daniel Vetter b7bb9e9297 intel-decode: Fix gen6 HIER_DEPTH_BUFFER decoding
It accidentally used the cmd id for the gen7 command and had an
outdated lenght field. Spotted while trying to make sense of an ivb
error_state from mesa 7.11 ...

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-04-04 09:59:20 +02:00
Kenneth Graunke ca678bc073 intel: Fix Haswell CRW PCI IDs.
The second digit was off by one, which meant we accidentally treated
GT(n) as GT(n-1).  This also meant no support for GT1 at all.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2013-03-28 13:24:15 -07:00
Daniel Kurtz 1eb2860b4b drm: Fix error message in drmWaitVBlank
If clock_gettime did fail, it would return -1 and set errno.
What we really want to strerror() is the errno.

Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
2013-03-28 08:34:30 -07:00
Maarten Lankhorst 99105e765c makefiles: Add missing headers.
I even compile time tested this on a panda with make dist!

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
2013-03-27 14:06:56 +01:00
Maarten Lankhorst 6113c3daa8 Remove unused header xf86mm.h.
it's not even shipped in the tarball.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
2013-03-27 13:56:13 +01:00
Maarten Lankhorst c005f043dc configure.ac: bump version to 2.4.43 for release
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
2013-03-27 10:42:20 +01:00
Ville Syrjälä 93d12593e5 intel_chipset: Fix up VLV confusion
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2013-03-27 11:13:44 +02:00
Ville Syrjälä 6e55fd7dee intel_chipset: Use parens around macro arguments
Protect the macro argument evaluations with parens.

This is already touching most lines, so while at it, fix up all white
space to uniform style throughout the file.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2013-03-27 11:13:44 +02:00
Marcin Slusarz f92d7969bf nouveau: add a way to override single pushbuffer memory limits
Currently single pushbuffer can take up to 80% of VRAM and 80% of GART.
As this value seems to be arbitrary (and user may need to set it differently)
this patch adds support for 2 environment variables:
NOUVEAU_LIBDRM_VRAM_LIMIT_PERCENT (default 80)
NOUVEAU_LIBDRM_GART_LIMIT_PERCENT (default 80)
which will let users override pushbuffer VRAM/GART limits.

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
2013-03-26 21:08:03 +01:00
Marcin Slusarz 284421a569 nouveau: return error from pushbuf_validate
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
2013-03-26 21:08:03 +01:00
Benjamin Gaignard 9b0c7f23a2 tests: allow tests programs to be installed (cumulative patch)
fix error in previous patch

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.com>
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
2013-03-26 11:55:31 +01:00
Benjamin Gaignard 62d8866021 tests: allow tests programs to be installed
Install test programs is useful in cross compilation case.  By default
the behavior is the same and test programs aren't installed in $bindir.
If --enable-install-test-programs is set then test programs are
installed in $bindir.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-03-25 10:34:16 -04:00
Alex Deucher 36a2daad24 radeon: add pci ids for Richland APUs
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-03-08 14:12:32 -05:00
Inki Dae bbf6e3dea3 libdrm/exynos: add test application for 2d gpu.
This patch adds library and test application for g2d gpu(fimg2d).

The fimg2d hardware is a 2D graphics accelerator(G2D) that
supports Bit Block Transfer(BitBLT).

The library includes the following primitive drawing operations:
.solid fill - This operation fills the given buffer with
	the given color data.
.copy - This operation copies contents in source buffer to
	destination buffer.
.copy_with_scale - This operation copies contents in source buffer
	to destination buffer scaling up or down properly.
.blend - This operation blends contents in source buffer with
	the ones in destination buffer.

And the above operations uses gem handle or user space address
allocated by malloc() as source or destination buffer.

And the test application includes just simple primitive drawing
tests with the above library.
And the guide to test is as the following,
	"#exynos_fimg2d_test -s connector_id@crtc_id:mode"

With this above simple command, four primitive drawing operations
would be called step by step and also rendered on the output device
to the given connector and crtc id.

Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-03-08 11:49:42 -05:00
Jerome Glisse ade2ad2d66 radeonsi: make sure tile_split field are not garbage
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2013-03-07 09:47:16 -05:00
Rob Clark 41fc2cc8a9 freedreno: add freedreno DRM
The libdrm_freedreno helper layer for use by xf86-video-freedreno,
fdre (freedreno r/e library and tests for driving gpu), and eventual
gallium driver for the Adreno GPU.  This uses the msm gpu driver
from QCOM's android kernel tree.

Note that current msm kernel driver is a bit strange.  It provides a
DRM interface for GEM, which is basically sufficient to have DRI2
working.  But it does not provide KMS.  And interface to 2d and 3d
cores is via different other devices (/dev/kgsl-*).  This is not
quite how I'd write a DRM driver, but at this stage it is useful for
xf86-video-freedreno and fdre (and eventual gallium driver) to be
able to work on existing kernel driver from QCOM, to allow to
capture cmdstream dumps from the binary blob drivers without having
to reboot.  So libdrm_freedreno attempts to hide most of the crazy.
The intention is that when there is a proper kernel driver, it will
be mostly just changes in libdrm_freedreno to adapt the gallium
driver and xf86-video-freedreno (ignoring the fbdev->KMS changes).

So don't look at freedreno as an example of how to write a libdrm
module or a DRM driver.. it is just an attempt to paper over a non-
standard kernel driver architecture.

v1: original
v2: hold ref's to pending bo's (because qcom's kernel driver doesn't),
    various bug fixes, add ringbuffer markers so we can emit IB's to
    portion of ringbuffer (so that gallium driver can use a single
    ringbuffer for both tile cmds and draw cmds.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-02-14 12:13:15 -05:00
Ben Widawsky 36d18211b1 intel_chipset: Merge intel-gpu-tools chipsets
Intel GPU Tools is newer and arguably better. This change doesn't
completely merge the files because it's a bit simpler if we move the
I9XX macro over to Intel GPU Tools, and don't move over a few macros
from IGT that libdrm doesn't care about.

It has been discussed, and would seem even easier if Intel GPU Tools
simply used the libdrm header files. Whether or not we move to that,
this should help that effort.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2013-02-11 15:25:48 -08:00
Chris Forbes 20c5607b57 intel: fix length mask for Gen5/Gen6 3DSTATE_CLEAR_PARAMS
On Gen6, bit 15 is now `Depth Clear Value Valid`. This was being treated
as part of the length, and failing the rest of the batchbuffer decode.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
2013-02-06 11:20:05 -08:00
Kenneth Graunke 3b5cc13542 intel/aub: Actually run BLT batches on the blit ring.
We didn't set the ring flag for BLT batches, so they got run on the
render ring.  Shenanigans ensued, especially when we sent commands that
were only valid on the BLT ring.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-02-06 11:19:36 -08:00
Maarten Lankhorst 183b5f20b5 configure.ac: bump version to 2.4.42 for release
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
2013-02-05 14:14:01 +01:00
Maarten Lankhorst f9a9311c5e libdrm: remove DISTCHECK_CONFIGURE_FLAGS
I'm fairly sure the extra flags it specifies no longer exist, so
there is no point in keeping it. It only adds a warning when
running make distcheck.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
2013-02-05 14:14:01 +01:00
Alex Deucher 353f073bc1 radeon: add OLAND pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-02-04 15:03:55 -05:00
Alex Deucher 76ae1f4837 radeon: add OLAND family
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-02-04 15:03:46 -05:00