Commit Graph

6827 Commits (90c9175c8197855afeb1eed17d98fa36b51c43a3)

Author SHA1 Message Date
Eleni Maria Stea 90c9175c81 include <sys/types.h> in xf86drmMode when the OS is FreeBSD
<sys/types.h> need to be included in xf86drmMode.c for type u_int in
<sys/sysctl.h> (that is included when OS is FreeBSD) to be recognized.

Signed-off-by: Eleni Maria Stea <elene.mst@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2021-06-20 09:20:08 +03:00
Bas Nieuwenhuizen 085ee3e488 amdgpu: Add vamgr for capture/replay.
In Vulkan we have extensions to assist with capture in replay in a
world where addresses are returned to the application. This involves
creating buffers at the same VA during replay as they were during
capture.

By itself libdrm_amdgpu already has support for this, but there is
the obvious failure mode that if another buffer is already allocated
at that VA things fail spectacularly. This is an actual issue as
internal buffers, like winsys images or shader binaries also
participate in the same VA allocation.

To avoid this problem applications have to create buffers which
are going to be captured with a flag, and the implementation is to
separate VA allocation for those buffers to reduce the collision risk:

"Implementations are expected to separate such buffers in the GPU address
space so normal allocations will avoid using these addresses. Apps/tools
should avoid mixing app-provided and implementation-provided addresses for
buffers created with VK_BUFFER_CREATE_DEVICE_ADDRESS_CAPTURE_REPLAY_BIT,
to avoid address space allocation conflicts."

This patch implements that by adding a flag for these buffers and allocating
address space from the top of the address range instead of the bottom.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Christian König <christian.koenig@amd.com>
2021-06-15 13:08:20 +00:00
Andrey Grodzovsky d615430c68 tests/amdgpu/hotunplug: Add hotunplug with exported fence
Disconnect device while fence is exported.
Also disable this test for sytem with single GPU.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com
2021-06-09 20:27:09 +00:00
Andrey Grodzovsky 93a4708ac0 tests/amdgpu/hotunplug: Add hotunplug with exported bo test
Disconnect device while BO is exported.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com
2021-06-09 20:27:09 +00:00
Andrey Grodzovsky b5f611cc37 tests/amdgpu/hotunplug: Add unplug with cs test.
Same as simple test but while doing cs

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com
2021-06-09 20:27:09 +00:00
Andrey Grodzovsky d4b780a735 test/amdgpu/hotunplug: Add test suite for GPU unplug
Add plug/unplug device and open/close device file
infrastructure.
Add basic test - unplug device while device file still
open. Close device file afterwards and replug the device.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com
2021-06-09 20:27:09 +00:00
Andrey Grodzovsky d330f68c11 test/amdgpu: Add helper functions for hot unplug
Expose close device and add open device wich preserves
test index.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com
2021-06-09 20:27:09 +00:00
Andrey Grodzovsky ae2e2bd68a tests/amdgpu: Fix valgrind warning
Struct access after free

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com
2021-06-09 20:27:09 +00:00
Rahul Kumar 140ce56dcb amdgpu: Added product name for E9390,E9560 and E9565 dgpu
Update marketing names.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-07 10:59:19 -04:00
Lang Yu 4e178807b9 Revert "tests/amdgpu: fix bo eviction test issue"
This reverts commit a5a400c958.

Bo evict test was disabled by default per below commit.
So still keep it as disabled.

1f6a85cc test/amdgpu: disable bo eviction test by default

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Lang Yu <Lang.Yu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-01 12:56:24 +00:00
Tejas Upadhyay 4c8365183e intel: Add support for ADLP
Add ADLP platform support and PCIIDs

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
Signed-off-by: Caz Yokoyama <caz.yokoyama@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
2021-05-20 12:01:25 +00:00
Dave Airlie 77b642b6de Bump version to 2.4.106
Signed-off-by: Dave Airlie <airlied@redhat.com>
2021-05-18 13:38:07 +10:00
Karol Herbst cfbea78fdf nouveau: add debug option to sync pushbuffer submissions
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2021-05-06 19:41:16 +02:00
Karol Herbst 91c3eb1700 novueau: document debug flags
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2021-05-06 19:41:14 +02:00
Karol Herbst 17a51b0b31 nouveau: rework debugging so we can also dump into a file
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2021-05-06 19:41:12 +02:00
Karol Herbst c0ae9cfa00 nouveau: make debug features accessible in normal builds
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2021-05-06 19:41:10 +02:00
Karol Herbst 2f04bd2d89 nouveau: mask push buffer length pushbuf_dump
nvc0 sets the NVC0_IB_ENTRY_1_NO_PREFETCH bit on some pushbuffers

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2021-05-06 19:41:09 +02:00
Karol Herbst 52fd2a2542 nouveau: fix crash in pushbuf_dump with an unmapped bo
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2021-05-06 19:40:57 +02:00
Eric Engestrom bf08984682 ci: use `base-devel` tag of archlinux image instead of `base` and then installing `base-devel` after
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Simon Ser <contact@emersion.fr>
2021-04-30 10:13:37 +02:00
Eric Engestrom b4847d97df ci: use archlinux/archlinux docker image instead of deprecated and now removed archlinux/base
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Simon Ser <contact@emersion.fr>
2021-04-30 10:13:37 +02:00
Bas Nieuwenhuizen 40f73d0b0b Revert "xf86drmMode: set FB_MODIFIERS flag when modifiers are supplied"
This reverts commit b362850689.

This breaks when the kernel driver does not support modifiers and the
application properly zeroes the modifiers.

Acked-by: Simon Ser <contact@emersion.fr>
2021-04-22 20:24:11 +02:00
Jinzhou Su c7dc0465cf test/amdgpu: Add emit mem sync flag for test IB
In syncobj test, 3 threads will be created. Sometimes
the first gfx IB and the third sdma IB will use same
physical page. There will be risk that sdma engine will
read gfx IB in the same physical page. So better to flush
the cache before commit the sdma IB.

Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-19 14:04:22 +08:00
Huang Rui 67a64bb946 test/amdgpu: use tmz ids to check whether enable security tests
Using tmz ids that reported from kernel to decide whether enable
security tests.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2021-04-14 09:52:33 +02:00
James Zhu 3c02304c04 tests/amdgpu/vcn: update to support aldebaran
VCN is supported after AI family Arcturus.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2021-04-14 02:41:56 +00:00
Feifei Xu 7b844dabf9 tests/amdgpu:retire asic_id check on unsupported cases
Retire the asic_id check for AI family.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
2021-04-12 17:46:31 +08:00
Feifei Xu 991e95fd13 tests/amdgpu: update gfx9 BufferCopy/BufferClear
buffer_load/store_format_xyzw require 64bit vgpr_a[2].
The original parameter is one u32. Modify the shader binary to
fit the 64bit parameter.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Tested-by: Gang Long <Gang.Long@amd.com>
2021-04-09 15:11:08 +08:00
Leo Liu 6b4e956d29
Bump version to 2.4.105
Signed-off-by: Leo Liu <leo.liu@amd.com>
2021-04-07 09:54:11 -04:00
Leo Liu 1d13cc1032 amdgpu: add function of INFO ioctl for querying video caps
via the newly added uapi/amdgpu_drm interface

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-06 08:58:57 -04:00
Leo Liu 50c98335c7 amdgpu: sync up amdgpu_drm.h with latest from kernel
From drm-next:

commit 2cbcb78c9ee5520c8d836c7ff57d1b60ebe8e9b7
Merge: 06debd6e1b28 8c44390d8872
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Fri Mar 26 15:52:01 2021 +0100

    Merge tag 'amd-drm-next-5.13-2021-03-23' of https://gitlab.freedesktop.org/agd5f/linux into drm-next

    amd-drm-next-5.13-2021-03-23:

    amdgpu:
    ...

    UAPI:
    - amdgpu: Add a new INFO ioctl interface to query video capabilities
      rather than hardcoding them in userspace.  This allows us to provide
      fine grained asic capabilities (e.g., if a particular part is
      bandwidth limited, we can limit the capabilities).  Proposed userspace:
      https://gitlab.freedesktop.org/leoliu/drm/-/commits/info_video_caps
      https://gitlab.freedesktop.org/leoliu/mesa/-/commits/info_video_caps
    ...

    Danvet: A bunch of conflicts all over, but it seems to compile ... I
    did put the call to dc_allow_idle_optimizations() on a single line
    since it looked a bit too jarring to be left alone.

    Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
    From: Alex Deucher <alexander.deucher@amd.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20210324040147.1990338-1-alexander.deucher@amd.com

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-06 08:58:54 -04:00
Simon Ser b362850689 xf86drmMode: set FB_MODIFIERS flag when modifiers are supplied
The kernel will always return EINVAL if modifiers are supplied but
the flag DRM_MODE_FB_MODIFIERS isn't set. That's a pretty nice
footgun.

Be a little more helpful and set the flag if the user has supplied
a modifier array.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2021-04-06 10:37:03 +02:00
Lang Yu a5a400c958 tests/amdgpu: fix bo eviction test issue
On Raven2/Picasso, the default VRAM size is 2048M,
and the default GTT size is 3072M. If max_allocation
of VRAM exceeds half of GTT size, GTT memory can't
hold evicted bo from VRAM and bo in itself at the
same time. Then amdgpu_cs_list_validate will failed
with "Not enough memory for command submission" error.

NOTE:
The installed DRAM should be larger than 8GB,
if the VRAM size is 2048M.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2021-04-01 11:41:51 -04:00
Lang Yu af871ec1a6 drm/tests/amdgpu: fix Metadata test failed issue
The unit of size_metadata is one byte not four bytes.
Enable Metadata test.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2021-04-01 11:41:49 -04:00
Simon Ser 6d821612d9 xf86drmMode: introduce drmModeGetPropertyType
We already have drm_property_type_is, but it's needlessly complicated
and doesn't cover all use-cases (requires the caller to provide a
type).

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2021-03-31 07:42:15 +00:00
Jinzhou Su f5abbc3033 test/amdgpu: remove static varible in Syncobj test
In syncobj test, wait thread and signal thread create
simultaneously. The ptr for GFX IB and SDMA IP should be
operated separately. With static, there will be risk that
GFX NOP is in SDMA IB or SDMA NOP is in GFX IB, then GFX or
SDMA hang caused.

Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2021-03-24 11:34:04 -04:00
Ashutosh Dixit cd3681976c intel: Keep libdrm working without pread/pwrite ioctls
The general direction at this time is to phase out pread/write ioctls and
not support them in future products. The ioctls have already been disabled
in i915 for future products. This means libdrm must handle the absence of
these ioctls. This patch does this by modifying drm_intel_gem_bo_subdata()
and drm_intel_gem_bo_get_subdata() to do the read/write using the
pread/pwrite ioctls first but when these ioctls are unavailable fall back
to doing the read/write using a combination of mmap and memcpy.

A similar solution was added to igt-gpu-tools in commit
ad5eb02eb3 ("lib/ioctl_wrappers: Keep IGT working without pread/pwrite
ioctls").

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2021-03-22 15:22:31 -07:00
Fang Tan 52f05d3d89 meson: use library() instead of shared_library().
This allows users to select the library type (static or shared)
using the Meson -Ddefault_library built-in option.

Issue: https://gitlab.freedesktop.org/mesa/drm/-/issues/45

Reviewed-by: Simon Ser <contact@emersion.fr>
Signed-off-by: Fang Tan <tanfang@uniontech.com>
2021-03-09 16:57:32 +08:00
Alistair Delva 7d6a175990 xf86drm: fix null pointer deref in drmGetBufInfo
If info.count is large, drmMalloc() / alloca() may fail, and the
resulting null pointer is not null checked before dereference.

Issue: https://gitlab.freedesktop.org/mesa/drm/-/issues/62

Reviewed-by: Simon Ser <contact@emersion.fr>
Signed-off-by: Alistair Delva <adelva@google.com>
2021-03-02 08:29:27 -08:00
Tejas Upadhyay 2e67fef5f6 intel: Add support for JSL
Add the PCI ID import for JSL.

V1 - Indentation
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2021-03-02 14:52:38 +05:30
Emil Velikov a9bb32cfe1 xf86drm: cap number of reported devices by drmGetDevice(2)
Do as the documentation says - when devices non NULL, cap the reported
devices to max_devices. Otherwise we risk out-of-bound access
for users of the API.

v2:
 - Fix this w/o breaking the API

v3:
 - Drop local variables, flip inverted conditional (Simon)

Issue: https://gitlab.freedesktop.org/mesa/drm/-/issues/56
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2021-02-26 13:03:06 +00:00
Emil Velikov 06844b6eae Revert "xf86drm: cap number of reported devices by drmGetDevice(2)"
This reverts commit 8cb12a2528.

The commit fixed the OOB, yet it broke drmDevices2(0, NULL, 0) - aka we
did not return the total devices list.

Reviewed-by: Simon Ser <contact@emersion.fr>
2021-02-26 13:02:56 +00:00
Simon Ser 632f59fcbf xf86drm: warn about GEM handle reference counting
Users need to be careful when using drmPrimeHandleToFD or
drmPrimeFDToHandle directly. Mention GBM as a solution.

See [1] for an example mistake.

[1]: https://gitlab.freedesktop.org/drm/nouveau/-/issues/43#note_772661

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-02-26 13:01:04 +00:00
Simon Ser 523b3658aa xf86drmMode: add drmIsKMS
If a device has a primary node, it doesn't necessarily mean it's
suitable for KMS usage. For instance, render-only drivers also
expose primary nodes.

The check is extracted from Weston [1].

The motivation for this new function is two-fold:

- Avoid an unnecessary GETRESOURCES call. To check whether a
  primary node is suitable for KMS, we don't actually need to
  retrieve the object IDs we just need to check the counts.
- Avoid confusion in user-space and make sure user-space implements
  the check properly. For instance, wlroots doesn't [2]: it uses
  drmGetVersion which succeeds with render-only drivers.

[1]: https://gitlab.freedesktop.org/wayland/weston/-/blob/master/libweston/backend-drm/drm.c#L2689
[2]: a290d7a78d/backend/session/session.c (L268)

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Pekka Paalanen <pekka.paalanen@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2021-02-26 12:56:46 +01:00
Leo Liu 1225171bd5 amdgpu_drm: sync up with the latest amdgpu_drm.h based on drm-next (https://cgit.freedesktop.org/drm/drm)
What are these headers?
Adding currently missing stuff from https://cgit.freedesktop.org/drm/drm/tree/include/uapi/drm/amdgpu_drm.h based on
the latest commit there:

commit f730f39eb981af249d57336b47cfe3925632a7fd (HEAD -> drm-next, tag: drm-next-2021-02-19, origin/drm-next, origin/HEAD)
Merge: 4f8ad4045b38 81ce8f04aa96
Author: Dave Airlie <airlied@redhat.com>
Date:   Fri Feb 19 13:54:29 2021 +1000

    Merge tag 'drm-intel-next-fixes-2021-02-18' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

Which headers go where?
From https://cgit.freedesktop.org/drm/drm/tree/include/uapi/drm/amdgpu_drm.h to
https://cgit.freedesktop.org/mesa/drm/tree/include/drm/amdgpu_drm.h

When and which headers to update?
If the kernel uapi drm header changes, the header here should be sync-ed.

When and how to update these files
The steps for generating this patch:

 - Switch to freedesktop drm-next kernel branch (https://cgit.freedesktop.org/drm/drm);
 - Install the headers via `make headers_install';
 - Copy from kernel "include/uapi/drm/amdgpu_drm.h" to libdrm "include/drm/amdgpu_drm.h";
 - generate the patch;

The commits from drm-next (https://cgit.freedesktop.org/drm/drm) are:

Mauro Carvalho Chehab (1)
c45dd3bda1c809eb120452597097e14a96b58c1f drm/amdgpu: fix some kernel-doc markups

Huang Rui(3)
6fbcb00c7984fa7d49af2c361453c0397cdea400 drm/amdgpu: add TOC firmware definition
1e483203965bdab466af0739c1edf7da07da241d drm/amdgpu: add uapi to define van gogh memory type
f7b2cdb23abf62bc3d33c2e0b0009a09412ff475 drm/amdgpu: add uapi to define van gogh series

Pierre-Eric Pelloux-Prayer(1)
16c642ec3fe9a144fbe1e97dc56f13a6308f1381 drm/amdgpu: new ids flag for tmz (v2)

Yong Zhao(1)
130c88931f6cbdb4513d307b4a13fcfff08a8041 drm/amdgpu: Improve the MTYPE comments

Signed-off-by: Leo Liu <leo.liu@amd.com>
2021-02-21 16:48:39 -05:00
Tejas Upadhyay 3b6cfb20fb intel: add INTEL_ADLS_IDS to the pciids list
This enables drm_intel_bufmgr on ADLS

Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2021-02-18 10:44:10 +00:00
Tejas Upadhyay 9086ff9daf intel: sync i915_pciids.h with kernel
Align with kernel commits:

0883d63b19bb ("drm/i915/adl_s: Add ADL-S platform info and PCI ids")
04057a1afc75 ("drm/i915: Sort EHL/JSL PCI IDs")
0e8e272f1368 ("drm/i915/ehl: Remove invalid PCI ID")
605f9c290c1a ("drm/i915: Sort ICL PCI IDs")
514dc424ce4f ("drm/i915: Sort CNL PCI IDs")
32d4ec9a1681 ("drm/i915: Sort CFL PCI IDs")
df3478af1d73 ("drm/i915: Sort CML PCI IDs")
cd988984cbea ("drm/i915: Sort KBL PCI IDs")
b04d36f73771 ("drm/i915: Sort SKL PCI IDs")
9c0b2d30441b ("drm/i915: Sort HSW PCI IDs")
79033a0a7898 ("drm/i915: Ocd the HSW PCI ID hex numbers")
cfb3db8fdae2 ("drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments")
03e399020cd2 ("drm/i915: Add SKL GT1.5 PCI IDs")
812f044df08c ("drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT")
194909a32aed ("drm/i915: Reclassify SKL 0x192a as GT3")
82e84284ab7d ("drm/i915: Update Haswell PCI IDs")
24ea098b7c0d ("drm/i915/jsl: Split EHL/JSL platform info and PCI ids")
b50b7991b739 ("drm/i915/dg1: add more PCI ids")
d452bd091e16 ("drm/i915: break TGL pci-ids in GT 1 & 2")
f2bde2546b81 ("drm/i915: Remove dubious Valleyview PCI IDs")
0883d63b19bb ("drm/i915/adl_s: Add ADL-S platform info and PCI ids")
04057a1afc75 ("drm/i915: Sort EHL/JSL PCI IDs")
0e8e272f1368 ("drm/i915/ehl: Remove invalid PCI ID")
605f9c290c1a ("drm/i915: Sort ICL PCI IDs")
514dc424ce4f ("drm/i915: Sort CNL PCI IDs")
32d4ec9a1681 ("drm/i915: Sort CFL PCI IDs")
df3478af1d73 ("drm/i915: Sort CML PCI IDs")
cd988984cbea ("drm/i915: Sort KBL PCI IDs")
b04d36f73771 ("drm/i915: Sort SKL PCI IDs")
9c0b2d30441b ("drm/i915: Sort HSW PCI IDs")
79033a0a7898 ("drm/i915: Ocd the HSW PCI ID hex numbers")
cfb3db8fdae2 ("drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments")
03e399020cd2 ("drm/i915: Add SKL GT1.5 PCI IDs")
812f044df08c ("drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT")
194909a32aed ("drm/i915: Reclassify SKL 0x192a as GT3")
82e84284ab7d ("drm/i915: Update Haswell PCI IDs")
24ea098b7c0d ("drm/i915/jsl: Split EHL/JSL platform info and PCI ids")
b50b7991b739 ("drm/i915/dg1: add more PCI ids")
d452bd091e16 ("drm/i915: break TGL pci-ids in GT 1 & 2")

Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Reviewed-by: Landwerlin, Lionel G <lionel.g.landwerlin@intel.com>
2021-02-18 10:12:28 +00:00
Alex Deucher 869ef0e4b2 amdgpu: update marketing names
From 20.45 release.

Acked-by: Simon Ser <contact@emersion.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-15 10:07:15 -05:00
Victor Hugo Vianna Silva a43cac24db Avoid some compiler errors for tests/util/pattern.c
- Remove one unused variable.
- Convert two int-s into 'unsigned int'.
Motivated by a failed build of Chromium.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Victor Hugo Vianna Silva <victor.vianna10@gmail.com>
2021-02-10 21:14:47 +00:00
Emil Velikov 8cb12a2528 xf86drm: cap number of reported devices by drmGetDevice(2)
Do as the documentation says - cap the number of reported devices to the
requested amount - aka max_devices. Otherwise we risk out-of-bound access
for users of the API.

Issue: https://gitlab.freedesktop.org/mesa/drm/-/issues/56
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2021-02-10 19:29:27 +00:00
Sonny Jiang 19f0a9cb87 tests/amdgpu/vcn: clean abundant codes
Remove useless codes.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2021-01-23 15:31:00 -05:00
James Zhu 2315bcddd6 tests/amdgpu: add vcn test support for dimgrey_cavefish
add dimgrey_cavefish chip id in vcn test

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2021-01-23 15:31:00 -05:00