Commit Graph

114 Commits (a0178c00c70f4b47e09ed7564fc2ccde611231a0)

Author SHA1 Message Date
Xiang, Haihao 011999927f intel: Add support for VEBOX ring (v2)
v2: Fix the test for has_vebox

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-27 11:31:22 -07:00
Kenneth Graunke 3b5cc13542 intel/aub: Actually run BLT batches on the blit ring.
We didn't set the ring flag for BLT batches, so they got run on the
render ring.  Shenanigans ensued, especially when we sent commands that
were only valid on the BLT ring.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-02-06 11:19:36 -08:00
Chris Wilson fdda97007b intel: Remove the fence count contributions when clearing relocs
As we clear the relocs from the bo, we also need to clear the
contribution of the reloc_target_bo from the fence count. Otherwise they
are leaked and prevent any further relocations being added to the bo.
2013-01-13 10:29:44 +00:00
David Shao 7d42b49c0c intel: Fix missing ETIME on BSD operating systems
Originally posted to Free Desktop bug #52549 by David Shao.
Resolves Gentoo Bug #433403.
Commit message by Richard Yao.

Reviewed-by: Richard Yao <ryao@gentoo.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
References: https://bugs.freedesktop.org/show_bug.cgi?id=52549

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-11-10 11:52:38 -08:00
Chris Wilson a83444c925 intel: Silence a trivial compiler warning
intel_bufmgr_gem.c: In function 'drm_intel_bo_gem_export_to_prime':
intel_bufmgr_gem.c:2477:6: warning: unused variable 'ret' [-Wunused-variable]

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-10-07 10:09:38 +01:00
Chris Wilson 75830a0d2c intel: Fix "properly test for HAS_LLC"
commit 92fd0ce4f6
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Fri Aug 31 11:16:53 2012 +0200

    intel: properly test for HAS_LLC

missed slightly and in effect had no effect on the outcome of checking
whether the kernel/chipset supported LLC.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-10-07 10:09:38 +01:00
Kristian Høgsberg 1b7ce582ce intel: Mark bo's exported to prime as not reusable
It's the same situation as flink and we need take the same precautions.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
2012-09-14 22:06:14 -04:00
Daniel Vetter 92fd0ce4f6 intel: properly test for HAS_LLC
If the kernel supports the test, we need to check the param.
Copy&pasta from the above checks that only look at the return value.
Interesting how much one can get such a simple interface wrong.

Issue created in

commit 151cdcfe68
Author: Eugeni Dodonov <eugeni.dodonov@intel.com>
Date:   Tue Jan 17 15:20:19 2012 -0200

    intel: query for LLC support

Patch even claims to have fixed this in v2, but is actually unchanged
from v1.

Reported-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-09-01 11:21:38 +02:00
Kenneth Graunke a9412fa9de intel: Use VG_CLEAR on the context destroy ioctl as well.
Otherwise pad appears uninitialized and valgrind grumbles.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-08-12 20:13:50 -07:00
Eric Anholt 2607dad20b intel: Add a function for the new register read ioctl.
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2012-08-10 09:48:07 -07:00
Chris Wilson 9a2b57d229 intel: Bail gracefully if we encounter an unknown Intel device
Otherwise we end up with X hitting a fail-loop as the embedded libGL
stacks asserts whilst initialising.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-08-08 19:24:11 +01:00
Eric Anholt 7e3f08b463 intel: Quiet valgrind warnings in context creation. 2012-08-02 11:20:17 -07:00
Damien Lespiau c10b08d959 intel: Remove two unused variables
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-08-02 11:20:06 -07:00
Dave Airlie ff65de9666 intel: add prime interface for getting/setting a prime bo. (v4)
This adds interfaces for the X driver to use to create a
prime handle from a buffer, and create a bo from a handle.

v2: use Chris's suggested naming (well from at least for consistency)
v3: git commit --amend fail
v4: fix as per Chris's suggestions, group assignments, add get tiling

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-07-20 08:53:03 +10:00
Kenneth Graunke 992e2afd59 intel: Change context create failure message to from fprintf to DBG().
Since there is no getparam for hardware context support, Mesa always
tries to obtain a context by calling drm_intel_gem_context_create and
NULL-checking the result.  On an older kernel without context support,
this caused libdrm to print an unwanted message to stderr:

DRM_IOCTL_I915_GEM_CONTEXT_CREATE failed: Invalid argument

In fact, this caused every Piglit test to fail with a "warn" status due
to the unrecognized error message.

Change the message to use DBG() rather than fprintf(), so people can
still get the debug message, but it won't spam normally.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2012-07-12 13:44:21 -07:00
Ben Widawsky f7210fa4ec intel/context: create/destroy implementation
Add relevant code to set up minimal state and call the appropriate
kernel IOCTLs.

This was missed in the previous cherry-picking for 2.3.36.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-29 11:05:47 -07:00
Ben Widawsky 3ed38714bd intel/context: new execbuf interface for contexts
To support this we extract the common execbuf2 functionality to be
called with, or without contexts.

The context'd execbuf does not support some of the dri1 stuff.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-06-27 09:57:17 -07:00
Ben Widawsky 971c080ac0 intel: wait render timeout implementation
int drm_intel_gem_bo_wait(drm_intel_bo *bo, uint64_t timeout_ns)

This should bump the libdrm version. We're waiting for context support
so we can do both features in one bump.

v2: don't return remaining timeout amount
use get param and fallback for older kernels

v3: only doing getparam at init
prototypes now have a signed input value

v4: update comments
fall back to correct polling behavior with new userspace and old kernel

v5: since the drmIoctl patch was not well received, return appropriate
values in this function instead. As Daniel pointed out, the polling
case (timeout == 0) should also return -ETIME.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-06-27 09:00:58 -07:00
Paul Berry da02f72bc2 intel: Add the ability to supply annotations for .aub files.
This patch adds a new function,
drm_intel_bufmgr_gem_set_aub_annotations(), which can be used to
annotate the type and subtype of data stored in various sections of
each buffer.  This data is used to populate type and subtype fields
when generating the .aub file, which improves the ability of later
debugging tools to analyze the contents of the .aub file.

If drm_intel_bufmgr_gem_set_aub_annotations() is not called, then we
fall back to the old set of annotations (annotate the portion of the
batchbuffer that is executed as AUB_TRACE_TYPE_BATCH, and everything
else as AUB_TRACE_TYPE_NOTYPE).

Reviewed-by: Eric Anholt <eric@anholt.net>
2012-05-10 11:32:39 -07:00
Eric Anholt 5de5b7484a intel: Quiet two more valgrind complaints with recent changes.
These are more cases where valgrind doesn't understand what gets read
or written by our ioctls.
2012-03-13 16:49:53 -07:00
Eric Anholt 99c73378a1 intel: Add support for (possibly) unsynchronized maps.
This improves the performance of Mesa's GL_MAP_UNSYNCHRONIZED_BIT path
in GL_ARB_map_buffer_range.  Improves Unigine Tropics performance at
1024x768 by 2.30482% +/- 0.0492146% (n=61)

v2: Fix comment grammar.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-03-10 09:21:33 -08:00
Eric Anholt 3a8884851b intel: Fix error check for I915_PARAM_HAS_LLC.
drmIoctl returns -1 on error with errno set to the error value.  Other
users of it in this file just check for != 0, and only use errno when
they need to send an error value on to the caller of the API.
2012-03-09 17:21:00 -08:00
Eric Anholt c9ce2edfc8 intel: Bump the copyright dates on the bufmgr files.
We've been hacking these constantly.
2012-03-09 16:34:14 -08:00
Eric Anholt 4db16a9480 intel: Add .aub file output support.
This will allow the driver to capture all of its execution state to a
file for later debugging.  intel_gpu_dump is limited in that it only
captures batchbuffers, and Mesa's captures, while more complete, still
capture only a portion of the state involved in execution.

This is a squash commit of a long series of hacking as we tried to get
the resulting traces to work in the internal simulator.  It contains
contributions by Yuanhan Liu and Kenneth Graunke.

v2: Drop the MI_FLUSH_ENABLE setup.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2012-03-09 16:34:14 -08:00
Kenneth Graunke 6e642db7f4 intel: Add support for overriding the PCI ID via an environment variable
For example:

    export INTEL_DEVID_OVERRIDE=0x162

If this variable is set, don't actually submit the batchbuffer to the
GPU, it probably contains commands for the wrong generation of hardware.

v2: Introduce a getter for the overridden devid, and avoid getenv per exec.

Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
2012-03-09 16:34:14 -08:00
Chris Wilson 23eeb7e1e4 intel: Detect cache domain inconsistency with valgrind
Every access to either the GTT or CPU pointer is supposed to be
proceeded by a set_domain ioctl so that GEM is able to manage the cache
domains correctly and for the following access to be coherent. Of
course, some people explicitly want incoherent, non-blocking access
which is going to trigger warnings by this patch but are probably better
served by explicit suppression.

v2: Also mark the pointers as inaccessible following the explicit unmap
and implicit unmap upon return to the cache.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-02-15 11:16:59 +00:00
Chris Wilson 90b23cc24c intel: Mark up with valgrind intrinsics to reduce false positives
In particular, declare the hidden CPU mmaps to valgrind so that it knows
about those memory regions.

v2: Add an additional VG_CLEAR for the getparam

References: https://bugs.freedesktop.org/show_bug.cgi?id=35071
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Ben Widawsky <ben@bwidawsk.net>
[anholt: Ideally valgrind should just learn about the ioctls, and
         removing the clear for the non-valgrindified code feels risky.]
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-02-11 11:45:39 +00:00
Eugeni Dodonov 151cdcfe68 intel: query for LLC support
This adds support for querying the kernel about the LLC support in the
hardware.

In case the ioctl fails, we assume that it is present on GEN6 and GEN7.

v2: fix the return code checking

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
2012-02-01 15:54:02 -02:00
Chad Versace 592ac67626 intel: Fix bufmgr_gem->gen for gen > 4
If the pci_device's actual gen was > 4, then we stupidly set
bufmgr_gem->gen = 6. Luckily this caused no bugs, and this fix shouldn't
change any behavior, because all checks against the gen currently have one
of the forms below:
    gen == 2
    gen == 3
    gen >= 4

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
2012-01-30 13:03:35 -08:00
Eric Anholt 078bc5b6ee intel: Make intel_chipset handle devid directly.
This will make these macros reusable from intel_decode.c, which
doesn't have a bufmgr_gem context, without faking the struct.  We
should generally only be using these macros from bufmgr_gem context
setup anyway.

Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
2011-12-29 16:43:27 -08:00
Chris Wilson 0ab2251b70 intel: Reset vma list upon purge
During free we unconditionally delete the bo from the vma cache. This
relies on the its list member being kept in a sane state. This fails
after the object is purged, as the purge operation performs a pure
deletion and doesn't reset the list member, leaving a pair of dangling
pointers.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-12-14 08:23:02 +00:00
Chris Wilson 015286f03e intel: Remove the fresh assertions used to debug the vma cacheing
Hopefully all the bugs in the callers have been found, so time to
handle the failures "gracefully" again.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-12-13 10:59:13 +00:00
Chris Wilson c5f0ed1d29 intel: Update map-count for an early error return during mapping
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-12-13 10:41:33 +00:00
Chris Wilson dd9a5b4f7f intel: Evict cached VMA in order to make room for new mappings
As the max number of VMA mappings is a hard per-process limit, we need
to include the number of currently active mappings when evicting in
order to make room for a new mmap.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-12-06 21:45:55 +00:00
Chris Wilson e4b60f2960 intel: Add an interface to limit vma caching
There is a per-process limit on the number of vma that the process can
keep open, so we cannot keep an unlimited cache of unused vma's (besides
keeping track of all those vma in the kernel adds considerable overhead).
However, in order to work around inefficiencies in the kernel it is
beneficial to reuse the vma, so keep a MRU cache of vma.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-12-05 22:22:10 +00:00
Chris Wilson 5c5332bbc3 intel: Clean up mmaps on freeing the buffer
As a precautionary measure munmap on buffer free so that we never leak
the vma. Also include a warning during debugging.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-12-05 10:43:13 +00:00
Chris Wilson c549a777c1 intel: Unmap buffers during drm_intel_gem_bo_unmap
We cannot afford to cache the vma per open bo as this may exhaust the
per-process limits.

References: https://bugs.freedesktop.org/show_bug.cgi?id=43075
References: https://bugs.freedesktop.org/show_bug.cgi?id=40066
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-12-05 10:25:53 +00:00
Daniel Vetter 36cff1cbb8 intel: limit aperture space to mappable area on gen3
Otherwise we blow up on heavy tiled blitter loads (with giant
pixmaps).

Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-12-04 13:25:17 +01:00
Eric Anholt d0ae6837d1 intel: Share the implementation of BO unmap between CPU and GTT mappings.
Before this, consumers of the libdrm API that might map a buffer
either way had to track which way was chosen at map time to call the
appropriate unmap.  This relaxes that requirement by making
drm_intel_bo_unmap() always appropriate.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-10-29 12:04:09 -07:00
Eric Anholt 4cb01eeccf intel: Don't call the SW_FINISH ioctl unless a CPU-mapped write was done.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-10-29 12:03:54 -07:00
Eric Anholt 77dc16f33d intel: Remove stale comment.
This used to be next to some map refcounting code, but that is long dead.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-29 12:03:34 -07:00
Eric Anholt 515cea6ac6 intel: Add an interface for removing relocs after they're added.
This lets us replace the current inner drawing loop of mesa:

for each prim {
	compute bo list
	if (check_aperture_space(bo list)) {
		batch_flush()
		compute bo list
		if (check_aperture_space(bo list)) {
			whine_about_batch_size()
			fall back;
		}
	}
	upload state to BOs
}

with this inner loop:

for each prim {
 retry:
	upload state to BOs
	if (check_aperture_space(batch)) {
		if (!retried) {
			reset_to_last_prim()
			batch_flush()
		} else {
			if (batch_flush())
				whine_about_batch_size()
			goto retry;
		}
	}
}

This avoids having to implement code to walk over certain sets of GL
state twice (the "compute bo list" step).  While it's not a
performance improvement, it's a significant win in code complexity:
about -200 lines, and one place to make mistakes related to aperture
space instead of N places to forget some BO we should have included.

Note how if we do a reset in the new loop , we immediately flush.  We
don't need to check aperture space -- the kernel will tell us if we
actually ran out of aperture or not.  And if we did run out of
aperture, it's because either the single prim was too big, or because
check_aperture was wrong at the point of setting up the last
primitive.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-28 12:53:59 -07:00
Eric Anholt 2c2bdb36c5 intel: Use stdbool.h for dealing with boolean values.
A few of the bitfield-based booleans are left in place.  Changing them
to "bool" results in the same code size, so I'm erring on the side of
not changing things.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-28 12:53:18 -07:00
Daniel Vetter 194aa1bee6 drm/i915: y tiling on i915G/i915GM is different
Luckily the kernel has become extremely paranoid about such matters.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-09-22 22:20:53 +02:00
Daniel Vetter 630dd26fb4 drm/intel: don't clobber bufmgr->pci_device
Otherwise it's pretty hard to differentiate the different chipset
variants.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-09-22 22:20:09 +02:00
Daniel Vetter 06ebbf7c2c Cleanup gen2 tiling confusion
A tile on gen2 has a size of 2kb, stride of 128 bytes and 16 rows.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-03-26 15:04:04 +01:00
Daniel Vetter e6018c25ca intel: Fixup for the fix for relaxed tiling on gen2
This is Fail.

First patch to libdrm, and I've borked it up.

Noticed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-02-22 19:11:33 +01:00
Daniel Vetter 9a71ed93f4 intel: fix relaxed tiling on gen2
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-02-22 18:53:56 +01:00
Chris Wilson 36d4939343 intel: Remember named bo
... and if asked to open a bo by the same global name, return a fresh
reference to the previously allocated buffer.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-14 10:18:39 +00:00
Chris Wilson 53581b6210 intel: Set the public handle after opening by name
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-14 10:15:31 +00:00