Commit Graph

50 Commits (a20587e3950f849deb1e723a0b4455a19f7b3fb8)

Author SHA1 Message Date
Ben Skeggs d0904f0f2b nouveau: funcs to determine active channel on PFIFO. 2007-11-14 03:27:37 +11:00
Dave Airlie 7f6bf84c23 drm: remove lots of spurious whitespace.
Kernel "cleanfile" script run.
2007-11-05 12:42:22 +10:00
Ben Skeggs 5092865601 nouveau: Use a sw method instead of notify interrupt to signal fence completion. 2007-11-05 05:46:26 +11:00
Ben Skeggs 0a2ab1a900 nouveau: cleanups 2007-11-05 03:53:46 +11:00
Ben Skeggs c1008104ad nouveau: only pass annoying messages if irq isn't handled fully. 2007-11-05 02:48:50 +11:00
Ben Skeggs 173a5be28f nouveau: hook up an inital fence irq handler 2007-11-05 02:20:35 +11:00
Ben Skeggs 677753047f nouveau: Cleanup PGRAPH handler, attempt to survive PGRAPH exceptions. 2007-10-16 14:42:26 +11:00
Ben Skeggs 3af053779c nouveau: Survive PFIFO_CACHE_ERROR. 2007-10-16 13:32:03 +11:00
Ben Skeggs 6398325ba1 nouveau: Handle multiple PFIFO exceptions per irq, cleanup output. 2007-10-16 13:27:27 +11:00
Arthur Huillet 9d779e2c88 nouveau: mandatory "oops I forgot half of the files" commit 2007-10-12 22:40:08 +02:00
Matthieu Castet bf126f4925 nouveau : nv10 and nv04 PGRAPH_NSTATUS are different 2007-10-10 21:11:43 +02:00
Matthieu Castet 18952a1670 nouveau : print correct value in nouveau_graph_dump_trap_info for nv04 2007-10-06 12:01:02 +02:00
Pekka Paalanen 8ad605a264 nouveau: let nv20 hardware do ctx switching automatically. 2007-09-30 22:16:01 +03:00
Pekka Paalanen a45fce7712 nouveau: NV30 should never call nouveau_nv20_context_switch(). 2007-09-30 22:16:01 +03:00
Matthieu Castet a331d2e352 nouveau : add NV04_PGRAPH_TRAPPED_ADDR definition
- fix offset for nv04
- use it in nv10 graph ctx switch for getting next channel
- dump NV10_PGRAPH_TRAPPED_DATA_HIGH on nv10+
2007-08-26 20:48:32 +02:00
Ben Skeggs 7784e8c6e7 nouveau: silence irq handler a bit 2007-08-09 11:12:13 +10:00
Ben Skeggs 40f2156356 nouveau: return channel id 2007-08-08 16:12:19 +10:00
Ben Skeggs 4ad487190d nouveau: enable/disable engine-specific interrupts in _init()/_takedown()
All interrupts are still masked by PMC until init is finished.
2007-08-08 10:49:05 +10:00
Matthieu Castet a4759b8513 nouveau : fix enable irq (in the previous code all irq were masked by engine
init after irq_postinstall)
2007-08-07 23:09:44 +02:00
Ben Skeggs 51f24be578 nouveau: Determine trapped channel id from active grctx on >=NV40 2007-08-06 21:46:55 +10:00
Pekka Paalanen 0c77f5abea nouveau: Add bitfield names for NSOURCE and NSTATUS.
Name strings and pretty-printing in nouveau_graph_dump_trap_info().
2007-07-18 14:00:04 +03:00
Pekka Paalanen 14ecf8d6c2 nouveau: Replace 0x00400104 and 0x00400108 with names.
NV03_PGRAPH_NSTATUS and NV03_PGRAPH_NSOURCE.
The prefix NV03 is chosen because nv10reg.h had no versioned prefix,
and the code using these registers does not check card_type.
2007-07-18 13:52:39 +03:00
Patrice Mandin bc7d6c76fa nouveau: nv10 and nv11/15 are different 2007-07-14 18:32:11 +02:00
Ben Skeggs 0029713451 nouveau: nuke internal typedefs, and drm_device_t use. 2007-07-13 15:09:31 +10:00
Ben Skeggs c806bba466 nouveau/nv50: Initial channel/object support
Should be OK on G84 for a single channel, multiple channels *almost* work.

Untested on G80.
2007-07-09 16:16:44 +10:00
Ben Skeggs 3324342e42 nouveau: enable reporting for all PFIFO/PGRAPH irqs 2007-07-09 16:16:44 +10:00
Matthieu Castet 59784116bf nouveau : fix fifo context size for nv10 2007-05-08 21:20:25 +02:00
Ben Skeggs 674cefd4fe nouveau: move card initialisation into the drm
The PGRAPH init for the various cards will need cleaning up at some point,
a lot of the values written there are per-context state left over from the
all the hardcoding done in the ddx.

It's possible some cards get broken by this commit, let me know.
Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
2007-03-26 20:59:37 +10:00
Ben Skeggs 5bd0e52dba nouveau: ack PFIFO interrupts at PFIFO, not PMC. 2007-03-07 21:00:55 +11:00
Ben Skeggs 72caa48c82 nouveau: intrusive drm interface changes
graphics objects:
	- No longer takes flags/dmaobj parameters, requires some major changes
	  to the ddx to setup the object through the FIFO.  This change is
	  likely to cause breakages on some cards (tested on NV05,NV28,NV35,
	  NV40 and NV4E).
dma objects:
	- now takes a "class" parameter, not really used yet but we may need
	  it at some point.
	- parameters are checked, so clients can't randomly create DMA objects
	  pointing at whatever they feel like.
misc:
	- Added FB_SIZE/AGP_SIZE getparams
	- Read PFIFO_INTR in PFIFO irq handler, not PMC_INTR
	- Dump PGRAPH trap info on PGRAPH_INTR_NOTIFY if NSOURCE isn't
	  NOTIFICATION_PENDING.
2007-02-28 15:41:53 +11:00
Stephane Marchesin 8c663b4e56 nouveau: and of course, I was missing the last nv04 piece. 2007-02-03 06:13:27 +01:00
Stephane Marchesin 5a072f32c8 nouveau: rename registers to their proper names. 2007-02-03 04:57:06 +01:00
Ben Skeggs aa7266385e nouveau: always print nsource/nstatus regs on PGRAPH errors 2007-01-25 08:16:23 +11:00
Jeremy Kolb 78a4f5c1bc nouveau: Try to get nv35 pgraph switching working. Doesn't quite yet.
Hook into nv20 pgraph switching functions (they're identical for nv3x).
Actually call nv30_pgraph_context_init so the ctx_table is allocated.

Thanks to Carlos Martin for the help.
2007-01-17 08:46:59 -05:00
Matthieu Castet f04347f371 nouveau: nv20 graph ctx switch.
Untested...
2007-01-13 23:19:41 +01:00
Matthieu Castet cd5f543b2f nouveau: first step to make graph ctx works
It is still not working, but now we could use some 3D commands
without needed to run nvidia blob before.
2007-01-13 21:44:50 +01:00
Matthieu Castet 9d167f1f4b Add basic pgraph context for nv10.
It only fake a context switch : pgraph state are not save/restored.
2007-01-05 19:40:11 +01:00
Ben Skeggs adf71cb29b Don't spam dmesg if PMC_INTSTAT is 0 2006-11-21 11:41:46 +11:00
Ben Skeggs 18bba3fa29 Dump some useful info when a PGRAPH error occurs.
The "channel" detect doesn't work on my nv40, but the rest
seems to produce sane info.
2006-11-17 08:05:23 +11:00
Ben Skeggs 725984364b Oops, we have more than 4 subchannels.. 2006-10-18 01:07:48 +11:00
Ben Skeggs 55de3f763f Useful output on a FIFO error interrupt. 2006-10-17 23:44:05 +11:00
Ben Skeggs 07059f4278 typo 2006-10-17 23:08:03 +11:00
Ben Skeggs 98e718d48f NV40: FIFO context switching now WorksForMe(tm) 2006-10-17 07:29:31 +11:00
Stephane Marchesin 2c5b91aecf Again more work on context switches. They work, sometimes. And when they do they seem to screw up the PGRAPH state. 2006-10-14 16:36:11 +02:00
Stephane Marchesin a9c6c3f21d Oops. 2006-10-12 21:18:55 +02:00
Stephane Marchesin 7ef44b2b8d Still more work on the context switching code. 2006-10-12 17:31:49 +02:00
Stephane Marchesin a749d9d5b4 More work on the context switch code. Still doesn't work. I'm mostly convinced it's an initialization issue. 2006-10-12 01:08:15 +02:00
Stephane Marchesin dd473411f8 Context switching work.
Added preliminary support for context switches (triggers the interrupts, but hangs after the switch ; something's not quite right yet).
Removed the PFIFO_REINIT ioctl. I hope it's that a good idea...
Requires the upcoming commit to the DDX.
2006-10-11 00:28:15 +02:00
Ben Skeggs aa80e2f48f Add copyright notices while I still remember.. 2006-09-09 07:35:55 +10:00
Dave Airlie fef9b30a2b initial import of nouveau code from nouveau CVS 2006-08-27 08:55:02 +10:00