Commit Graph

2173 Commits (a81558d8b3ee17fbf46e32b10732e22fcd997858)

Author SHA1 Message Date
Ben Skeggs b5cf0d635c Remove hack which delays activation of a additional channel. The previously active channel's state is saved to RAMFC before PFIFO gets clobbered. 2006-10-18 02:37:19 +11:00
Ben Skeggs 725984364b Oops, we have more than 4 subchannels.. 2006-10-18 01:07:48 +11:00
Thomas Hellstrom 5443dbe35f Implement mm_lock and mm_unlock functions.
The mm_lock function is used when leaving vt. It evicts _all_ buffers.
Buffers with the DRM_BO_NO_MOVE attribute set will be guaranteed to
get the same offset when / if they are rebound.
2006-10-17 16:00:25 +02:00
Ben Skeggs 55de3f763f Useful output on a FIFO error interrupt. 2006-10-17 23:44:05 +11:00
Ben Skeggs 07059f4278 typo 2006-10-17 23:08:03 +11:00
Thomas Hellstrom db5c671e86 Remove the memory manager parameter from the put_block function, as this
makes the client code a lot cleaner. Prepare buffer manager for lock and
unlock calls.
2006-10-17 11:28:48 +02:00
Thomas Hellstrom 5881ce1b91 Extend generality for more memory types.
Fix up init and destruction code.
2006-10-17 11:05:37 +02:00
Michael Karcher 561e23a7c2 dev->agp_buffer_map is not initialized for AGP DMA on savages
bug 8662
2006-10-16 22:06:58 -04:00
Ben Skeggs 4b43ee63f9 NV40: *Now* fifo ctx switching works for me..
Ok, I lied before.. it was a fluke it worked and required magic to repeat it..
It actually helps to fill in RAMFC entries in the correct place.

The code also clears RAMIN entirely instead of just the hash-table.
2006-10-17 12:33:49 +11:00
Ben Skeggs 98e718d48f NV40: FIFO context switching now WorksForMe(tm) 2006-10-17 07:29:31 +11:00
Ben Skeggs 1943f39d8c Setup NV40 RAMFC (in wrong location.. but anyway), rearrange the RAMFC setup code a bit. 2006-10-17 06:37:40 +11:00
Ben Skeggs 95486bbde0 Some info on NV40's RAMFC 2006-10-17 06:12:18 +11:00
Thomas Hellstrom 5b2a60f550 Change Intel AGP memory type numbers. 2006-10-16 14:22:27 +02:00
Stephane Marchesin 93fee5cf22 Merge branch 'master' of git://anongit.freedesktop.org/git/mesa/drm into nouveau-1 2006-10-15 00:12:13 +02:00
Stephane Marchesin 2c5b91aecf Again more work on context switches. They work, sometimes. And when they do they seem to screw up the PGRAPH state. 2006-10-14 16:36:11 +02:00
Dave Airlie 1bab514c0a remove config.h from build no longer exists kbuild does it 2006-10-14 23:38:20 +10:00
Stephane Marchesin 3a0cd7c7e2 Add the missing breaks. 2006-10-14 01:21:31 +02:00
Stephane Marchesin b509abe413 Fix the fifo context size on nv10, nv20 and nv30. 2006-10-13 22:35:22 +02:00
Ben Skeggs 4988074794 Fix some randomness in activating a second channel on NV40 (odd GET/PUT vals). Ch 1 GET now advances, but no ctx_switch. 2006-10-14 06:57:49 +11:00
Stephane Marchesin a9c6c3f21d Oops. 2006-10-12 21:18:55 +02:00
Stephane Marchesin 7ef44b2b8d Still more work on the context switching code. 2006-10-12 17:31:49 +02:00
Thomas Hellstrom 540c64c378 Bugfixes. 2006-10-12 16:10:47 +02:00
Thomas Hellstrom 10150df02b Simplify the AGP backend interface somewhat.
Fix buffer bound caching policy changing, Allow
on-the-fly changing of caching policy on bound buffers if the hardware
supports it.

Allow drivers to use driver-specific AGP memory types for TTM AGP pages.
Will make AGP drivers much easier to migrate.
2006-10-12 12:09:16 +02:00
Stephane Marchesin a749d9d5b4 More work on the context switch code. Still doesn't work. I'm mostly convinced it's an initialization issue. 2006-10-12 01:08:15 +02:00
Thomas Hellstrom 3070389367 Compatibility code for 2.6.15-2.6.18. It is ugly but a little comfort is that
it will go away in the mainstream kernel.
Some bugfixes, mainly in error paths.
2006-10-11 22:21:01 +02:00
Thomas Hellstrom f2db76e2f2 Big update:
Adapt for new functions in the 2.6.19 kernel.
Remove the ability to have multiple regions in one TTM.
   This simplifies a lot of code.
Remove the ability to access TTMs from user space.
   We don't need it anymore without ttm regions.
Don't change caching policy for evicted buffers. Instead change it only
   when the buffer is accessed by the CPU (on the first page fault).
   This tremendously speeds up eviction rates.
Current code is safe for kernels <= 2.6.14.
Should also be OK with 2.6.19 and above.
2006-10-11 13:40:35 +02:00
Stephane Marchesin dd473411f8 Context switching work.
Added preliminary support for context switches (triggers the interrupts, but hangs after the switch ; something's not quite right yet).
Removed the PFIFO_REINIT ioctl. I hope it's that a good idea...
Requires the upcoming commit to the DDX.
2006-10-11 00:28:15 +02:00
Thomas Hellstrom c58574c605 Use a nopage-based approach to fault in pfns. 2006-10-10 10:37:26 +02:00
Roland Scheidegger a9f57a2b9c only allow specific type-3 packets to pass the verifier instead of all for r100/r200 as others might be unsafe (r300 already does this), and add checking for these we need but aren't safe. Check the RADEON_CP_INDX_BUFFER packet on both r200 and r300 as it isn't safe neither. 2006-10-10 02:24:19 +02:00
Thomas Hellstrom cee659afb5 Get rid of all ugly PTE hacks. 2006-10-03 12:08:07 +02:00
George Sapountzis c9e3aa961e Bug 6242: [mach64] Use private DMA buffers, part #4.
mach64_state.c: convert the DRM_MACH64_BLIT ioctl to submit a pointer to
user-space memory rather than a DMA buffer index, similar to DRM_MACH64_VERTEX.

This change allows the DDX to map the DMA buffers read-only and eliminate a
security problem where a client can alter the contents of the DMA buffer after
submission to the DRM.

This change also affects the DRI/DRM interface. Performace-wise, it basically
affects PCI mode where I get a ~12% speedup for some Mesa demos I tested.
This is mainly due to eliminating an ioctl for allocating the DMA buffer.

mach64_dma.c: move the responsibility for allocating memory for the DMA ring
in PCI mode to the DDX.

This change affects the DDX/DRM interface and unifies a couple of PCI/AGP code
paths for ring memory in the DRM.

Bump the mach64 DRM version major and date.
2006-10-02 22:47:26 +03:00
George Sapountzis f3deef730d Bug 6242: [mach64] Use private DMA buffers, part #3.
Add DRM_PCI_BUFFER_RO flag for mapping PCI DMA buffer read-only. An additional
flag is needed, since PCI DMA buffers do not have an associated map.
2006-10-02 22:47:23 +03:00
George Sapountzis 25760c30d4 Bug 6242: [mach64] Use private DMA buffers, part #2.
Factor out from mach64_dma_dispatch_vertex() the code to reclaim an unsed
buffer, in preperation for using it in mach64_dma_dispatch_blit() also.
2006-10-02 22:47:19 +03:00
George Sapountzis eea150e776 Bug 6242: [mach64] Use private DMA buffers, part #1.
Factor out from mach64_freelist_get() the code to reclaim a completed buffer,
this is to improve readability for me.
2006-10-02 22:47:14 +03:00
George Sapountzis d1b31a228b Bug 6209: [mach64] AGP DMA buffers not mapped correctly.
Map the DMA buffers from the same linear address as the vertex bufs. If
dev->agp_buffer_token is not set, mach64 drm maps the DMA buffers from
linear address 0x0.
2006-10-02 22:46:54 +03:00
Michel Dänzer 16be6ba63a Fix type of second argument to spin_lock_irqsave().
(cherry picked from f6238cf624 commit)
2006-10-02 15:42:07 +02:00
Michel Dänzer f6238cf624 Fix type of second argument to spin_lock_irqsave(). 2006-10-02 15:33:19 +02:00
Thomas Hellstrom eacedf41a6 Make the user_token 44-bit for TTMs, and have them occupy a unique file space
starting at 0x00100000000. This will hopefully allow us to use
unmap_mapping_range(). Note that user-space will need
64-bit file offset support.
2006-10-02 15:06:35 +02:00
Thomas Hellstrom a31046b873 Add a buffer object manager for TTM maps. 2006-10-02 14:03:15 +02:00
Thomas Hellstrom d85b99435f Allow for 44 bit user-tokens (or drm_file offsets) 2006-10-02 13:49:43 +02:00
Thomas Hellstrom 418b81c65c Add a comment to previos commit. 2006-10-02 13:37:54 +02:00
Thomas Hellstrom c6be27401f Trap and be verbose about a deadlock that occurs with AIGLX and drivers that
use drm_reclaim_buffers_locked().
2006-10-02 13:34:30 +02:00
Felix Kühling 58a23d193f drm_rmdraw: Declare id and idx as signed so testing for < 0 works as intended.
(cherry picked from d583899681 commit)
2006-10-02 11:21:10 +02:00
Michel Dänzer 3a16e615ca Make locked tasklet handling more robust.
Initialize the spinlock unconditionally when struct drm_device is filled in,
and return early in drm_locked_tasklet() if the driver doesn't support IRQs.
2006-10-02 11:04:42 +02:00
Felix Kühling d583899681 drm_rmdraw: Declare id and idx as signed so testing for < 0 works as intended. 2006-10-02 10:50:40 +02:00
Thomas Hellstrom 8e908eaf50 Bump driver date. 2006-09-29 14:21:51 +02:00
Michel Dänzer 17a640419a i915: Only schedule vblank tasklet if there are scheduled swaps pending.
This fixes issues on X server startup with versions of xf86-video-intel that
enable the IRQ before they have a context ID.
(cherry picked from 7af93dd984 commit)
2006-09-29 12:55:09 +02:00
Michel Dänzer 48367fdfe6 i915: Only initialize IRQ fields in postinstall, not the PIPE_SET ioctl.
Some other minor changes in preparation for actually disabling user interrupts.
2006-09-29 12:55:09 +02:00
Michel Dänzer 3620a3ec85 i915: Bump minor again to differentiate from vsync changes. 2006-09-29 12:55:09 +02:00
Michel Dänzer 390184df92 i915: Avoid mis-counting vblank interrupts when they're only enabled for pipe A.
It looks like 'after a while', I915REG_INT_IDENTITY_R for some reason always has
VSYNC_PIPEB_FLAG set in the interrupt handler, even though pipe B is disabled.
So we only increase dev->vbl_received if the corresponding bit is also set in
dev->vblank_pipe.
(cherry picked from 881ba56992 commit)
2006-09-29 12:55:09 +02:00