Commit Graph

3082 Commits (abdd523c759a5e19e733e3b544c2f1bcaa7a0b9a)

Author SHA1 Message Date
Dave Airlie f1e12d40af drm/ati_pcigart: use proper page mapping function
This should be pci_map_page not pci_map_single
2008-06-03 12:44:06 +10:00
Robert Noland 416754f1cc [FreeBSD] Declare vblank_disable_fn callout MPSAFE. 2008-06-01 20:33:30 -07:00
Robert Noland 4ce47fd328 [FreeBSD] Get rid of vbl_lock and re-use irq_lock. 2008-06-01 20:33:30 -07:00
Robert Noland ac4da86928 [FreeBSD] Add symlink for radeon_microcode.h 2008-06-01 12:07:54 -07:00
Robert Noland 2186f9f6ef [FreeBSD] Call drm_vblank_cleanup during irq uninstall
I needed to re-arrange some functions for this.
Also needed to call DRM_SPINUNINIT on the vbl_lock during cleanup.
2008-06-01 12:07:54 -07:00
Alex Deucher a12cbf8aa5 RADEON: fix typo in last commit 2008-05-30 18:20:01 -04:00
Dave Airlie 6e8a2cff66 r500: attempt to make AGP work by programming agp base in the MC correctly 2008-05-30 20:27:31 +10:00
Dave Airlie 5b86823fa3 radeon: split microcode out into a separate header file. 2008-05-28 11:12:57 +10:00
Dave Airlie 0c8a8db1b6 i915: fix BSD bh, DRI2 not uses anywhere else 2008-05-28 10:28:13 +10:00
Dave Airlie c06096d34f radeon: bump release date/version for r500 3D support 2008-05-28 10:02:20 +10:00
Alex Deucher 59c953245c RADEON: add get_param for number of GB pipes 2008-05-27 18:34:33 -04:00
Owain Ainsworth df127c303d [BSD] Move unlock in drm_vm.c from accidental platform #ifdeffing.
Also remove an unreachable unlock.
2008-05-27 15:12:35 -07:00
Owain Ainsworth cc7ad27fe4 [BSD] Fix lock leak in drm_update_draw malloc failure path. 2008-05-27 15:11:25 -07:00
Owain Ainsworth 9a2ae28fbe [BSD] Fix lock leaks in error paths in drm_bufs.c. 2008-05-27 15:07:04 -07:00
Owain Ainsworth 200ac59573 [BSD] Remove superfluous recursive locking in drm_add_magic. 2008-05-27 14:59:38 -07:00
Jie Luo e45f95a03b [i915] Fix typo in (unused) START_ADDR definition. 2008-05-27 14:55:01 -07:00
Robert Noland 8cd045079e [FreeBSD] Add vblank-rework support and get drivers building.
The i915 driver now works again.
2008-05-27 14:25:20 -07:00
Eric Anholt ad8eb0ed01 [FreeBSD] Convert from drm_device_t to struct drm_device for consistency. 2008-05-27 14:25:08 -07:00
Dave Airlie 49075b678f r500: add two more register ranges for mesa driver to setup 2008-05-23 09:40:26 +10:00
Dave Airlie 74a9ea896e drm: fix nouveau warning 2008-05-23 09:40:26 +10:00
Dave Airlie 91c6c4b240 rs690/r500: vblank support.
The new display controller has the vblank interrupts in a different place.

Add support for vbl interrupts for these chips
2008-05-21 21:27:33 +10:00
Dave Airlie 8399656106 r500: add more register ranges for Mesa driver 2008-05-17 10:22:12 +10:00
Dave Airlie a09c0bbe11 ati_pcigart: oops wrong way around not that it actually mattered 2008-05-14 22:48:12 +10:00
Dave Airlie 4c6ec02eb8 ati_pcigart: stop working in the evenings you mess up too often 2008-05-14 22:44:22 +10:00
Dave Airlie 2712cdeec3 Revert "ati_pcigart: fixup properly this version might even work"
This reverts commit bc0836e12a.

tree has some kref hacks in it - oops
2008-05-14 22:43:28 +10:00
Dave Airlie bc0836e12a ati_pcigart: fixup properly this version might even work 2008-05-14 22:42:21 +10:00
Dave Airlie dd1f33f83c ati_pcigart: fill out 40-bit gart table support properly
Thanks to Alex for supplying this info.
2008-05-14 22:35:32 +10:00
Alex Deucher caace3692f RS4xx: separate out RS400 and RS480 IGP chips
RS400 (intel based IGP) and RS480 (AMD based IGP) have
different MC and GART setups.  Currently we only support
RS480.
2008-05-13 21:02:17 -04:00
Alex Deucher 10d754f0a2 RADEON: fix copy/pasto in last commit 2008-05-12 14:49:43 -04:00
Alex Deucher 75bc739bee R3/4/5: init pipe setup in drm
Similar (broken) code in mesa needs to be removed
2008-05-12 09:44:20 -04:00
Alex Deucher e16a7101e8 RADEON: cleanup radeon_do_engine_reset() 2008-05-12 09:35:06 -04:00
Alex Deucher 5532b8d2a0 R300+: fixup pixcache flush 2008-05-12 09:30:47 -04:00
Alex Deucher 3582e82f14 RS4xx: fix MCIND index mask 2008-05-12 09:24:13 -04:00
Alex Deucher d26af273f8 RADEON: write AGP_BASE_2 on chips that support it 2008-05-12 09:21:45 -04:00
Alex Deucher c307e50724 R300+: fixup PURGE/FLUSH macros 2008-05-12 09:18:28 -04:00
Alex Deucher fb9eaff747 Radeon IGP: merge RS4xx/RS6xx gart setup 2008-05-12 09:13:44 -04:00
Alex Deucher 68b7f550ba Radeon IGP: wrap MCIND access
first step in merging rs4xx/rs6xx gart setup
2008-05-12 09:00:40 -04:00
Alex Deucher a34025ce22 Radeon IGP: clean up registers and magic numbers 2008-05-12 08:56:11 -04:00
Dave Airlie b44f2da380 drm: nopage compat fixup for drm_vm
The kernel has removed nopage so move the old nopage codepaths into a compat vm file and switch to using the fault paths.

nopfn is on its way out in the future also, so we should switch to using fault
for that path as well soon
2008-05-07 15:10:23 +10:00
Dave Airlie d015219bd0 r500: add allowed range for us config/pixsize 2008-05-05 17:03:27 +10:00
Ben Skeggs 3ac74f3208 nv50: enable 0x400500 bit 0 after PGRAPH exception also
No solid idea about what these 2 bits do, but nv50 can now survive a few
PGRAPH exceptions just as nv40 does :)
2008-05-02 01:36:30 +10:00
Ben Skeggs 6d8062ac1e nouveau: guard against channels potentially not having a context, fix nv50 2008-05-02 01:36:08 +10:00
Ben Skeggs 77d20928b3 nouveau: disable all card interrupts when unknown PFIFO IRQ occurs.
This is possibly temporary.  I can trigger an unending IRQ storm on G8x
in some circumstances, and have no idea how to handle that particular PFIFO
exception correctly yet.
2008-05-02 00:53:42 +10:00
Ben Skeggs 5c4c778c0d nouveau: restore original NV_PFIFO_CACHES_REASSIGN value in fifo handler
Doesn't fix any issue I've seen, but is a potential issue if a FIFO IRQ
occurs during channel creation/takedown.
2008-05-02 00:52:21 +10:00
Ben Skeggs bfbe4ade32 nouveau: gather nsource in trap_info()
The IRQ handling stuff really is a mess.. On the TODO :)
2008-05-02 00:51:00 +10:00
Ben Skeggs e317dfdabf nv50: PGRAPH exception handling completely different from earlier chips 2008-05-02 00:06:22 +10:00
Ben Skeggs b92efd5956 nv50: I cave... Add nv84 initial context values.
I swore I'd actually do this properly and not go the horrible route
we did with nv4x, but I won't get around to it just yet with so many
*actually* interesting things to do first.. One day.

Since someone already added nv86, why not!
2008-05-01 23:50:44 +10:00
Jesse Barnes cb33133ef3 i915: fix off by one in VGA save/restore of AR & CR regs
Turns out it's important to save/restore AR14 in particular.
2008-04-29 12:39:38 -07:00
Maarten Maathuis f31e04a960 nouveau: NV9x cards exist as well. 2008-04-29 19:34:22 +02:00
Jesse Barnes 7f8e406085 Use fixed sized types in new ioctls
Make both crtc and the command argument 32 bits to avoid any 32-on-64 compat
issues.
2008-04-27 09:42:17 -07:00