Commit Graph

2141 Commits (b69b42634619076d4163ae144f0154880d1928cd)

Author SHA1 Message Date
George Sapountzis b69b426346 libdrm: remove HAVE_XORG_CONFIG_H and XFree86LOADER ifdef's.
We no longer import libdrm in the xserver.
2007-04-26 14:15:55 +03:00
Dave Airlie 2a6f555053 update create_lk_drm.sh script 2007-04-26 17:54:06 +10:00
Dave Airlie afc029e935 whitespace cleanup 2007-04-26 16:25:43 +10:00
Dave Airlie e5c1f1caa2 remove some whitespace violation 2007-04-26 16:22:28 +10:00
Dave Airlie 4b72759b30 drm: nopfn warning on 64-bit 2007-04-26 16:22:11 +10:00
Jesse Barnes 71d44cda52 drm/ttm: allow drm_buffer_object_create to be used in-kernel 2007-04-26 16:09:24 +10:00
Jesse Barnes 3c384a9ad5 Add new buffer object type for kernel allocations that don't initially have a user mapping.
(cherry picked from commit 2e21779992)
2007-04-26 16:04:09 +10:00
Brian 5c8561aae2 More detailed instructions, tips. 2007-04-25 14:52:29 -06:00
Stephane Marchesin 61477d60c4 nouveau: fix wacky pci id 2007-04-23 22:37:36 +02:00
Kristian Høgsberg af3ffcd822 Initialize rwlock using rwlock_init to appease lockdep validator. 2007-04-20 18:06:31 -04:00
Thomas Hellstrom a8a8108e45 Avoid a fence timeout problem when a signal is pending. 2007-04-20 15:57:41 +02:00
Thomas Hellstrom 1ce9c09231 Fix via compile error
(Reported by Benno Schulenberg.)
2007-04-20 15:49:31 +02:00
Thomas Hellstrom 2df2c70e20 Simplify the ttm backend interface and the agp ttm backend. 2007-04-18 16:33:28 +02:00
Thomas Hellstrom 5a96d59ce9 Don't always free up memory space when we unpin buffers. 2007-04-17 14:15:37 +02:00
Thomas Hellstrom 5432cc4abf Fix buffer object reference problems.
(Reported by Dave Airlie).
2007-04-17 10:53:19 +02:00
Thomas Hellstrom e805ca959d via: Make sure we flush write-combining using a follow-up read. 2007-04-17 08:58:23 +02:00
Thomas Hellstrom e91ceff6c9 Add a code comment. 2007-04-17 08:46:45 +02:00
Thomas Hellstrom e6e4946c82 Require the hardware lock for buffer creation
(since that implies a validate).
Fix drm_bo_wait_unfenced error messages and codes.
Fix some return codes from libdrm.
2007-04-16 16:23:05 +02:00
Matthieu Castet 9b7211dd67 nouveau: nv10 per channel init from ddx 2007-04-10 23:20:13 +02:00
Oliver McFadden 059b5d9077 rs480: Renamed some unknown registers. See dri-devel list. 2007-04-09 23:23:40 +00:00
Ben Skeggs 2d7f9f59c3 nouveau: NV46 support 2007-04-09 23:20:26 +10:00
Dave Airlie 29f8fe8046 radeon: bump version for IGPGART support 2007-04-09 22:00:34 +10:00
Dave Airlie a70f8e0ab2 radeon: add support for reverse engineered xpress200m
The IGPGART setup code was traced using mmio-trace on fglrx by myself
and Phillip Ezolt <phillipezolt@gmail.com> on dri-devel.

This code doesn't let the 3D driver work properly as the card has no
vertex shader support.

Thanks to Matthew Garrett + Ubuntu for providing me some hardware to do this
work on.
2007-04-09 21:52:59 +10:00
Dave Airlie b25558bb73 fixup install target, not sure what I was smokin... 2007-04-07 07:21:05 +10:00
Dave Airlie 46257c51c1 i915: use breadcrumb macro everywhere 2007-04-06 20:21:44 +10:00
Ben Skeggs 78034c06df nouveau: make a note about a bit that breaks some cards 2007-04-06 03:27:55 +10:00
Ben Skeggs 38f52402a8 nouveau: Power up all card units by default on startup. 2007-04-06 03:26:19 +10:00
Dave Airlie 9c79371659 add an install target to the drm modules makefile 2007-04-05 11:18:00 +10:00
Thomas Hellstrom c496827921 Fix user object reference when caller is not object creator.
(Reported by Dave Airlie).
2007-04-03 10:54:23 +02:00
Thomas Hellstrom 38d18acb8f Add a fence flush event to each fence-signaled check when lazy-waiting
to make sure we don't lose any sequence numbers if, for some reason,
they don't generate an IRQ.
2007-04-03 10:29:15 +02:00
Thomas Hellstrom 139e4bbc73 Make sure we ack irqs before we read a breadcrumb so that
breadcrumb updates that occur _AFTER_ we've read the breadcrumb really
generates a new IRQ.
2007-04-03 10:29:15 +02:00
Thomas Hellstrom 7743af9449 Evicted no-move buffers can get lost if they end up in another
memory type than local.
2007-04-03 10:29:14 +02:00
Thomas Hellstrom d85e243259 Fix an oops when trying to clean a not yet initialized memory type. 2007-04-03 10:29:14 +02:00
Thomas Hellstrom 72d457fc19 Make sure CMA (Can't map aperture) pages are mapped uncached.
(Should really make this write-combined using PATs, at some point).
2007-04-03 10:29:14 +02:00
Oliver McFadden 5395a92d40 r300: Synchronize the register header file again.
It's a good idea to keep these synchronized; even though the DRM doesn't use all
the defines, maintaining two different copies is prone to errors when the diff
gets bigger.
2007-04-02 19:45:10 +00:00
Matthieu Castet cbbdbd5e65 nouveau: fix usage of PGRAPH_CTX_CONTROL on nv20+
http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=17985f07d68322519919a7f629a6d2d9bf3916ed could have broken some nvxx_graph code : it rename NV03_PGRAPH_CTX_CONTROL to NV10_PGRAPH_CTX_CONTROL, but forgot to update it in nvxx_graph file.

Also when migrating init stuff in http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=674cefd4fe4b537a20a10edcb4ec5df55facca8e, NV04_PGRAPH_CTX_CONTROL is used everywhere but the old ddx code use NV_PGRAPH_CTX_CONTROL_NV04 or NV_PGRAPH_CTX_CONTROL.
2007-04-01 14:31:41 +02:00
Matthieu Castet 25cedcf76f nouveau : nv10 ctx switch fix
restoring NV10_PGRAPH_CTX_SWITCH1 now works
2007-04-01 14:21:29 +02:00
Matthieu Castet 223061e084 nouveau : set the correct PGRAPH_CTX_CONTROL register
"5a072f32        (Stephane Marchesin     2007-02-03 04:57:06 +0100" broke nv10 ctx switch by setting wrong PGRAPH_CTX_CONTROL reg
2007-04-01 00:44:11 +02:00
Eric Anholt ddb1715e06 Merge branch 'crestline-qa', adding support for the 965GM chipset. 2007-03-30 13:11:39 -07:00
Eric Anholt cd4c82176f Merge branch 'origin' 2007-03-30 12:56:08 -07:00
Dave Airlie 3f70518f0b drm/bo: avoid oops if the memory manager for this type isn't initialised 2007-03-29 09:25:04 +10:00
Stephane Marchesin bdabc8f998 nouveau: fix nv04 context switches. 2007-03-29 00:54:18 +02:00
Dave Airlie 81b811da37 drm/i915: set the bo up at firstopen time not after DMA init
This is required to use TTM to allocate the ring buffer.
2007-03-27 18:01:31 +10:00
Dave Airlie 72a1190f6d drm/ttm: make sure dev_mapping is set-up for the first opener of the drm
This was causing an oops in my miniglx code to try and use a TTM-only setup.
2007-03-27 17:59:30 +10:00
Nian Wu 406a894e52 Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-27 12:53:13 +08:00
Ben Skeggs 674cefd4fe nouveau: move card initialisation into the drm
The PGRAPH init for the various cards will need cleaning up at some point,
a lot of the values written there are per-context state left over from the
all the hardcoding done in the ddx.

It's possible some cards get broken by this commit, let me know.
Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
2007-03-26 20:59:37 +10:00
Nian Wu ddc87d3025 Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-25 17:00:36 +08:00
Eric Anholt 5d69640a6a Catch up to new interrupt API, and retire FreeBSD 4.x support here. 2007-03-24 09:39:09 -07:00
Dave Airlie 5ad43f4675 vm: cleanup drm_vm.c along lines of cleanups queued for kernel 2007-03-24 17:58:27 +11:00
Nian Wu e7cd5a1e2d Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-23 17:00:41 +08:00