Commit Graph

1360 Commits (baf521369478eff2842b99feda16f9d145402d27)

Author SHA1 Message Date
Keith Packard ced9ebf645 [intel-gem] throttle based on frames rather than time. Reduces jitter.
Record the last execbuffer sequence for each client.
Record that sequence in the throttle ioctl as the 'throttle sequence'.
Wait for the last throttle sequence in the throttle ioctl.
2008-06-13 14:29:46 -07:00
Keith Packard 3762c9ea67 [intel] Enable MSI for i915 IRQ 2008-06-13 14:29:46 -07:00
Keith Packard 5957470ca3 [intel] Restructure irq to pend all work until after iir write.
The interrupt identity register must be writen before any work occurs lest
we drop an interrupt on the floor. This patch just shuffles code around to
make sure that IIR is written as early as possible.
2008-06-13 14:29:46 -07:00
Keith Packard 462af73149 [intel-gem] Use a delayed_work instead of a timer + work_struct
We want request retirement to occur about once a second when the request
queue is non-empty. This was done with a timer that queued a work_struct,
using a delayed_work instead makes a lot more sense.
2008-06-13 14:29:46 -07:00
Eric Anholt df4ef348c8 Fix i915_wait_irq in the presence of interrupt masking.
In the short-circuit code for the breadcrumb already being new enough, we
need to update the sarea_priv copy of the breadcrumb just as if we had
waited.  Otherwise userland error checking will notice that we returned
too early based on its wrong information, and call wait_irq again (leading
to spinning until someone else comes along and updates the sarea_priv).

This bug was hidden when we had interrupt masking disabled, such as in
master, since the interrupt handler would update sarea_priv.
2008-06-13 10:47:33 -07:00
Eric Anholt 0558d99c01 [gem] Remove the interrupt handler for retiring requests.
This was insufficient once we started masking interrupts to only when someone
was waiting for them (and would thus retire requests themselves).  It was
replaced by the retire_timer.
2008-06-13 09:54:14 -07:00
Eric Anholt cc74ac3590 Don't clear USER_INTERRUPT if we're not handling it.
This fixes a regression from commit d434b64f6a
which could cause us to fail to wake up for user interrupts if we lost a race.
2008-06-12 10:56:37 -07:00
Eric Anholt 846d792ac1 [gem] Another round of cleanups from checkpatch.pl 2008-06-11 15:51:17 -07:00
Eric Anholt 2655005762 [gem] Move potentially device-specific ioctls to the intel driver.
This is the create (may want location flags), pread/pwrite/mmap
(performance tuning hints), and set_domain (will 32 bits be enough for
everyone?) ioctls.  Left in the generic set are just flink/open/close.

The 2D driver must be updated for this change, and API but not ABI is broken
for 3D.  The driver version is bumped to mark this.
2008-06-11 14:42:40 -07:00
Eric Anholt 62a3be962f [intel] Fix BUG_ON trigger in irq masking if you did on/off with irqs disabled. 2008-06-10 23:11:09 -07:00
Eric Anholt 2150da5d1a [gem] Manage the ringbuffer from the kernel in the GEM case.
This requires that the X Server use the execbuf interface for buffer
submission, as it no longer has direct access to the ring.  This is
therefore a flag day for the gem interface.

This also adds enter/leavevt ioctls for use by the X Server.  These would
get stubbed out in a modesetting implementation, but are required while
in an environment where the device's state is only managed by the DRM while
X has the VT.
2008-06-10 22:57:07 -07:00
Keith Packard 6cd0ef06a6 [intel] remove settable use_mi_batchbuffer_start
The driver can know what hardware requires MI_BATCH_BUFFER vs
MI_BATCH_BUFFER_START; there's no reason to let user mode configure this.
2008-06-06 13:26:03 -07:00
Keith Packard 9f46c6935d [intel-gem] Use timers to retire requests periodically.
Without the user IRQ running constantly, there's no wakeup when the ring
empties to go retire requests and free buffers. Use a 1 second timer to make
that happen more often.
2008-06-06 13:00:47 -07:00
Keith Packard a708106c77 [intel] free the hardware status page at driver_unload
This goes with the other hardware status page patch.
2008-06-06 13:00:46 -07:00
Keith Packard 56a96841d0 [intel-gem] Add explicit throttle ioctl
Instead of throttling and execbuffer time, have the application ask to
throttle explicitly. This allows the throttle to happen less often, and
without holding the DRM lock.
2008-06-06 13:00:46 -07:00
Keith Packard 5f5badb26f [intel] Allocate hardware status page at driver load time
I couldn't get the re-allocated HWS to work on my 965GM, so I just gave up
and made it persist across the lifetime of the driver instead.
2008-06-06 13:00:46 -07:00
Keith Packard 84162ccb7d Ignore X server provided mmio address 2008-06-06 13:00:46 -07:00
Eric Anholt 461bfa3da6 Merge commit 'origin/master' into drm-gem
Conflicts:

	linux-core/Makefile.kernel
	shared-core/i915_drv.h
	shared-core/nouveau_state.c
2008-05-30 14:42:08 -07:00
Dave Airlie 6e8a2cff66 r500: attempt to make AGP work by programming agp base in the MC correctly 2008-05-30 20:27:31 +10:00
Dave Airlie 5b86823fa3 radeon: split microcode out into a separate header file. 2008-05-28 11:12:57 +10:00
Eric Anholt e10502002f [intel-gem] Replace idlelock usage with real lock acquisition. 2008-05-27 18:03:18 -07:00
Dave Airlie 0c8a8db1b6 i915: fix BSD bh, DRI2 not uses anywhere else 2008-05-28 10:28:13 +10:00
Dave Airlie c06096d34f radeon: bump release date/version for r500 3D support 2008-05-28 10:02:20 +10:00
Alex Deucher 59c953245c RADEON: add get_param for number of GB pipes 2008-05-27 18:34:33 -04:00
Jie Luo e45f95a03b [i915] Fix typo in (unused) START_ADDR definition. 2008-05-27 14:55:01 -07:00
Robert Noland 8cd045079e [FreeBSD] Add vblank-rework support and get drivers building.
The i915 driver now works again.
2008-05-27 14:25:20 -07:00
Keith Packard d434b64f6a [i915] leave interrupts masked off when not in use.
The interrupt enable register cannot be used to temporarily disable
interrupts, instead use the interrupt mask register.

Note that this change means that a pile of buffers will be left stuck on the
chip as the final interrupts will not be recognized to come and drain things.
2008-05-26 03:25:16 -07:00
Keith Packard 7cf3fd29fe [intel-gem] Add DRM_I915_GEM_BUSY ioctl to check for idle buffers.
This new ioctl returns whether re-using the buffer would force a wait.
2008-05-25 20:45:20 -07:00
Keith Packard a51c3a76ff [intel] Add debug code to verify the cached ring tail pointer.
Recording the tail pointer in a local variable improves performance, but if
someone messes up and fails to reload at the right time, the driver will
write commands to the wrong part of the ring and scramble execution badly.

This change (available by setting I915_RING_VALIDATE to 1) checks to make
sure the cached tail pointer matches the hardware tail pointer at each ring
buffer addition, calling BUG_ON when that's not true.
2008-05-22 22:00:21 -07:00
Eric Anholt 5e662f90d1 [gem] Release GEM buffers from work task scheduled from IRQ.
There are now 3 lists.  Active is buffers currently in the ringbuffer.
Flushing is not in the ringbuffer, but needs a flush before unbinding.
Inactive is as before.  This prevents object_free → unbind →
wait_rendering → object_reference and a kernel oops about weird refcounting.

This also avoids an synchronous extra flush and wait when freeing a buffer
which had a write_domain set (such as a temporary rendered to and then from
using the 2d engine).  It will sit around on the flushing list until the
appropriate flush gets emitted, or we need the GTT space for another
operation.
2008-05-22 22:00:21 -07:00
Dave Airlie 49075b678f r500: add two more register ranges for mesa driver to setup 2008-05-23 09:40:26 +10:00
Dave Airlie 74a9ea896e drm: fix nouveau warning 2008-05-23 09:40:26 +10:00
Eric Anholt d6f7968577 [gem] Replace ring throttling hack with actual time measurement. 2008-05-21 16:40:14 -07:00
Dave Airlie 91c6c4b240 rs690/r500: vblank support.
The new display controller has the vblank interrupts in a different place.

Add support for vbl interrupts for these chips
2008-05-21 21:27:33 +10:00
Eric Anholt af8e087157 [gem] Use a separate sequence number field from classic/ttm
This lets us get some qualities we desire, such as using the full 32-bit
range (except zero), avoiding DRM_WAIT_ON, and a 1:1 mapping of active
sequence numbers to request structs, which will be used soon for throttling
and interrupt-driven list cleanup.
2008-05-20 14:16:26 -07:00
Eric Anholt ab36a6f983 [gem] Rename sequence numbers from "cookie" to "seqno" 2008-05-20 10:53:10 -07:00
Eric Anholt 6c3ac484b0 [gem] Clean up active/inactive list handling using helper functions.
Additionally, a boolean active field is added to indicate which list an
object is on, rather than smashing last_rendering_cookie to 0 to show
inactive.  This will help with flush-reduction later on, and makes the code
clearer.
2008-05-20 10:52:39 -07:00
Dave Airlie 8399656106 r500: add more register ranges for Mesa driver 2008-05-17 10:22:12 +10:00
Eric Anholt 7dced2f33a [gem] Hold dev->struct_mutex to protect structure data. 2008-05-15 18:45:23 -07:00
Eric Anholt 3ab152da66 [gem] Rename the GTT LRU lists to active (executing) and inactive (idle). 2008-05-15 11:59:58 -07:00
Alex Deucher caace3692f RS4xx: separate out RS400 and RS480 IGP chips
RS400 (intel based IGP) and RS480 (AMD based IGP) have
different MC and GART setups.  Currently we only support
RS480.
2008-05-13 21:02:17 -04:00
Eric Anholt f650d7240a [GEM] Typo (and thinking) fixes in drm-gem.txt and doxygen. 2008-05-12 13:17:01 -07:00
Keith Packard 7e7ea313c4 [intel] When polling for ring space, sleep for a lot longer (10ms)
If the ring is full, the engine will surely be running for more than 10ms.
2008-05-12 13:03:16 -07:00
Alex Deucher 10d754f0a2 RADEON: fix copy/pasto in last commit 2008-05-12 14:49:43 -04:00
Alex Deucher 75bc739bee R3/4/5: init pipe setup in drm
Similar (broken) code in mesa needs to be removed
2008-05-12 09:44:20 -04:00
Alex Deucher e16a7101e8 RADEON: cleanup radeon_do_engine_reset() 2008-05-12 09:35:06 -04:00
Alex Deucher 5532b8d2a0 R300+: fixup pixcache flush 2008-05-12 09:30:47 -04:00
Alex Deucher 3582e82f14 RS4xx: fix MCIND index mask 2008-05-12 09:24:13 -04:00
Alex Deucher d26af273f8 RADEON: write AGP_BASE_2 on chips that support it 2008-05-12 09:21:45 -04:00
Alex Deucher c307e50724 R300+: fixup PURGE/FLUSH macros 2008-05-12 09:18:28 -04:00