Commit Graph

95 Commits (da63f4ba0f15c3ae614eba92c8219670c674727e)

Author SHA1 Message Date
Ian Romanick a3881ad2fe Add ioc32 compat layer for XGI DRM. 2007-09-18 11:03:49 -07:00
Ian Romanick fee49e2071 Merge branch 'master' of ssh+git://git.freedesktop.org/git/mesa/drm into xgi-0-0-2 2007-08-31 10:54:55 -07:00
Ian Romanick d8a800b63d Implement fence support. 2007-08-15 21:05:26 -07:00
Ben Skeggs cf04641bc6 nouveau: Give DRM its own gpu channel
If your card doesn't have working context switching, it is now broken.
2007-08-06 22:05:31 +10:00
Ian Romanick c561cb4650 Merge branch 'master' of ssh+git://git.freedesktop.org/git/mesa/drm into xgi-0-0-2
Conflicts:

	linux-core/drmP.h
	linux-core/drm_scatter.c
2007-07-26 16:58:28 -07:00
Ben Skeggs ec67c2def9 nouveau: G8x PCIEGART
Actually a NV04-NV50 ttm backend for both PCI and PCIEGART, but PCIGART
support for G8X using the current mm has been hacked on top of it.
2007-07-17 13:51:14 +10:00
Ian Romanick 5522136b7f Merge branch 'master' into xgi-0-0-2 2007-07-12 15:28:17 -07:00
Ben Skeggs c806bba466 nouveau/nv50: Initial channel/object support
Should be OK on G84 for a single channel, multiple channels *almost* work.

Untested on G80.
2007-07-09 16:16:44 +10:00
Ben Skeggs ce0d528d3c nouveau/nv50: skeletal backend 2007-06-28 03:26:43 +10:00
Ben Skeggs 695599f18d nouveau: Nuke DMA_OBJECT_INIT ioctl (bumps interface to 0.0.7)
For various reasons, this ioctl was a bad idea.

At channel creation we now automatically create DMA objects covering
available VRAM and GART memory, where the client used to do this themselves.

However, there is still a need to be able to create DMA objects pointing at
specific areas of memory (ie. notifiers).  Each channel is now allocated a
small amount of memory from which a client can suballocate things (such as
notifiers), and have a DMA object created which covers the suballocated area.
The NOTIFIER_ALLOC ioctl exposes this functionality.
2007-06-28 03:26:43 +10:00
Ian Romanick 3a776fa01e Add XGI driver to Makefiles. 2007-06-26 13:26:10 -07:00
Ben Skeggs 341bc78207 nouveau: NV1X/2X/3X PFIFO engtab functions
Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC
entry size.
2007-06-24 18:58:14 +10:00
Ben Skeggs 05d86d950a nouveau: NV04 PFIFO engtab functions 2007-06-24 18:57:09 +10:00
Ben Skeggs f2e64d5276 nouveau: NV4X PFIFO engtab functions 2007-06-24 18:56:01 +10:00
Ben Skeggs 674cefd4fe nouveau: move card initialisation into the drm
The PGRAPH init for the various cards will need cleaning up at some point,
a lot of the values written there are per-context state left over from the
all the hardcoding done in the ddx.

It's possible some cards get broken by this commit, let me know.
Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
2007-03-26 20:59:37 +10:00
Alan Hourihane ef71b6230b remove i830 reference 2007-03-19 11:46:35 +00:00
Alan Hourihane cbe31d0dc7 Remove old i830 kernel driver. 2007-03-19 11:46:35 +00:00
Thomas Hellstrom e0f53e59be Simple fence object sample driver for via, based on idling the GPU.
Buffer object driver for via.
Some changes to buffer object driver callbacks.
Improve fence flushing.
2007-02-16 20:22:24 +01:00
Thomas Hellstrom a78f70faad Merge branch 'ttm-vram-0-1-branch' 2007-02-14 15:33:40 +01:00
Thomas Hellstrom af24465b2e Fix a stray unlock_kernel() in drm_vm.c
Add a file for memory move helpers, drm_bo_move.c
Implement generic memory move.
Cached, no_move and unmapped memory temporarily broken.
2007-02-07 12:52:23 +01:00
Stephane Marchesin d69902db3b nouveau: fix nv04 graph routines for new register names. 2007-02-03 05:25:36 +01:00
Matthieu Castet f04347f371 nouveau: nv20 graph ctx switch.
Untested...
2007-01-13 23:19:41 +01:00
Matthieu Castet cd5f543b2f nouveau: first step to make graph ctx works
It is still not working, but now we could use some 3D commands
without needed to run nvidia blob before.
2007-01-13 21:44:50 +01:00
Jeremy Kolb 4297a83b48 nouveau: get nv30 context switching to work.
* Pulled in some registers from nv10reg.h.  Needed for context switching.
* Filled in nv30 graphics context (based on nv40_graph.c).
* Figure out nv30 context table, set up on context creation.  Allows the cards automatic switching to work.
2007-01-12 00:14:54 -05:00
Ben Skeggs 0e0d954584 nouveau: Add nv40-specific PGRAPH code, not hooked up yet. 2007-01-02 14:52:43 +11:00
Dave Airlie 1e90b7ee8c Merge branch 'master' into nouveau-1
Conflicts:

	linux-core/Makefile.kernel
2006-11-06 08:03:18 +11:00
Dave Airlie 94ab96c4d8 nouveau: add compat ioc32 support 2006-11-05 20:39:13 +11:00
Dave Airlie fef9b30a2b initial import of nouveau code from nouveau CVS 2006-08-27 08:55:02 +10:00
Thomas Hellstrom 4c03030b12 Checkpoint commit
Buffer object code.
2006-08-25 18:05:35 +02:00
Thomas Hellstrom 7058d06317 Initial i915 buffer object driver 2006-08-22 10:24:48 +02:00
Thomas Hellstrom 700bf80ca9 Bring in stripped TTM functionality. 2006-08-22 09:47:33 +02:00
Thomas Hellstrom e089de33e8 i915 fence object driver implementing 2 fence object types:
0x00 EXE fence. Signals when command stream interpreter has reached the point
where the fence was emitted.
0x01 FLUSH fence. Signals when command stream interpreter has reached the point
where the fence was emitted, and all previous drawing operations have been
completed and flushed.
Implements busy wait (for fastest response time / high CPU) and
lazy wait (User interrupt or timer driven).
2006-08-21 21:36:00 +02:00
Thomas Hellstrom 657bacc395 Add missing fence type define.
Add drm_fence.o to Makefile
2006-08-21 21:04:36 +02:00
Thomas Hellstrom 1c787f0d39 Backwards compatibility code for ttms. 2006-08-21 20:38:57 +02:00
Thomas Hellstrom 42c2cfcf7d Generic DRM support base-class support for user-space objects, like
fence objects and buffer objects:
Refcounting,
Inter-process sharing,
Synchronization
Destruction.
2006-08-21 20:30:19 +02:00
Thomas Hellstrom 6bacb180ce Merge in the drm-sman-branch 2006-06-06 14:19:00 +00:00
Adam Jackson 62a4673034 Skeleton nv drm driver, to enable DMA in EXA. (Lars Knoll, minor updates by
me)
2005-10-06 23:31:29 +00:00
Thomas Hellstrom 903e5701ff Add the via PCI DMA blit code. 2005-09-25 12:54:12 +00:00
Alan Hourihane 01e4364a8f remove i915_pm code as it causes too many issues with current software
suspend, and the DDX driver re-inits the board successfully anyway.
2005-08-22 09:50:12 +00:00
Eric Anholt ab59dd285c Add latest r300 support from r300.sf.net CVS. Patch submitted by volodya,
with BSD fix from jkim and the r300_reg.h license from Nicolai Haehnle.
    Big thanks to everyone involved!
2005-07-20 21:17:47 +00:00
Alan Hourihane fc83d76e5a add i915_ioc32.c 2005-06-29 13:13:22 +00:00
Dave Airlie 964c57e71f add mga and r128 32/64 bits
This is Egberts code, ported to Pauls framework by me..
2005-06-29 11:22:39 +00:00
Dave Airlie 827806f697 Add compat to Makefile 2005-06-28 12:52:41 +00:00
Alan Hourihane b6b270a260 Given that BenH says using the sysdev approach for DRM is bogus, I'll yank
the code for it, rather than introducing something that isn't going to
    work 100% of the time.
2005-06-28 08:03:33 +00:00
Jon Smirl ae2264d3c9 Remove I2C support from radeon driver. Same support is available from
radeonfb.
2005-06-19 04:15:58 +00:00
Alan Hourihane 45f1db8db9 Re-implement the power management.
There's two choices when fb is or isn't loaded as we treat ourselves as a
    PCI driver in the latter case.
If we are a PCI driver, then register the suspend/resume functions
    directly. If not, then we register as a sysdev and pick up the
    suspend/resume actions and pump them down into a generic *power
    function.
It'll be nice when this little mess is sorted out with regard to being a
    real PCI driver ;-/
2005-05-28 00:00:08 +00:00
Thomas Hellstrom 532ccb98b5 Via updates:
New PCI command parser. Moved from via_dma.c to via_verifier.c so functions
    with similar functionality are close to eachother.
Moved video related functions to via_video.c, which might be extended in
    the future, as new video functionality is added.
New device-specific generic IRQ IOCTL, similar to the general VBLANK IOCTL,
    but with support for multiple device IRQ sources and functionality.
Support for Unichrome Pro PM800/CN400 video DMA commands in verifier and
    PCI parser.
Support for Unichrome Pro PM800/CN400 HQV IRQs in the new generic IRQ
    IOCTL.
Bumped minor. New version 2.6.0.
2005-03-28 21:21:42 +00:00
Dave Airlie 37318f1675 remove duplicate drm_sysfs.o 2005-01-16 07:49:55 +00:00
Felix Kuehling 04842e8bcf Completeley rewritten Savage DRM which can be considered secure (modulo
implementation errors). Direct hardware (MMIO, BCI) access is no longer
    needed in the Mesa driver. Bumped version to 2.0.0. Corresponding
    changes to the DDX and Mesa drivers are being committed.
2005-01-01 20:22:58 +00:00
Thomas Hellstrom 267e064527 Added 3D functionality to the via command verifier. Modified the via
ring-buffer code somewhat to workaround hardware problems. Bumped via
    minor version number.
2004-12-03 23:03:36 +00:00