Commit Graph

3324 Commits (e1b8e79796b172c356af98eb49107c8abbebfe5a)

Author SHA1 Message Date
Keith Packard 17e8000ac0 [intel] Minor kludge -- wait for the ring to be nearly empty before queuing
No need to fill the ring that much; wait for it to become nearly empty
before adding the execbuffer request. A better fix will involve scheduling
ring insertion in the irq handler.
2008-05-12 13:04:18 -07:00
Keith Packard 7e7ea313c4 [intel] When polling for ring space, sleep for a lot longer (10ms)
If the ring is full, the engine will surely be running for more than 10ms.
2008-05-12 13:03:16 -07:00
Keith Packard 6aeff6b9e3 [gem] Set write domain to CPU when doing pwrite.
Leave the flush call in place, which can fix domains up if necessary.
2008-05-12 13:01:57 -07:00
Keith Packard 6950b7da71 [gem] Clarify use of explicit domain control. Remove Gen3 from I-cache usage. 2008-05-12 13:00:55 -07:00
Alex Deucher 10d754f0a2 RADEON: fix copy/pasto in last commit 2008-05-12 14:49:43 -04:00
Alex Deucher 75bc739bee R3/4/5: init pipe setup in drm
Similar (broken) code in mesa needs to be removed
2008-05-12 09:44:20 -04:00
Alex Deucher e16a7101e8 RADEON: cleanup radeon_do_engine_reset() 2008-05-12 09:35:06 -04:00
Alex Deucher 5532b8d2a0 R300+: fixup pixcache flush 2008-05-12 09:30:47 -04:00
Alex Deucher 3582e82f14 RS4xx: fix MCIND index mask 2008-05-12 09:24:13 -04:00
Alex Deucher d26af273f8 RADEON: write AGP_BASE_2 on chips that support it 2008-05-12 09:21:45 -04:00
Alex Deucher c307e50724 R300+: fixup PURGE/FLUSH macros 2008-05-12 09:18:28 -04:00
Alex Deucher fb9eaff747 Radeon IGP: merge RS4xx/RS6xx gart setup 2008-05-12 09:13:44 -04:00
Alex Deucher 68b7f550ba Radeon IGP: wrap MCIND access
first step in merging rs4xx/rs6xx gart setup
2008-05-12 09:00:40 -04:00
Alex Deucher a34025ce22 Radeon IGP: clean up registers and magic numbers 2008-05-12 08:56:11 -04:00
Keith Packard ff39db099b [GEM] Make pread/pwrite manage memory domains. No luck with movnti though.
pread and pwrite must update the memory domains to ensure consistency with
the GPU. At some point, it should be possible to avoid clflush through this
path, but that isn't working for me.
2008-05-11 00:10:16 -07:00
Keith Packard 1b0bf30143 [intel-GEM] exec list can contain pinned, lru cannot.
The exec list contains all objects, in order of use. The lru list contains
only unpinned objects ready to be evicted. This required two changes -- the
first was to not migrate pinned objects from exec to lru, the second was to
search for the first unpinned object in the exec list when doing eviction.
2008-05-10 22:04:39 -07:00
Keith Packard 1f9eaceb71 Merge commit 'anholt/drm-gem' into drm-gem 2008-05-10 21:05:25 -07:00
Keith Packard 177b8b0703 [GEM] Add drm-gem.txt
Add some API and implementation documentation for GEM.
2008-05-10 21:04:42 -07:00
Keith Packard a37ac493da [intel-GEM] Clean up GEM ioctl naming.
Rename 'validate_entry' to 'exec_object', then clean up some field names in
structures (renaming buffer_offset to just offset, for example).
2008-05-10 21:04:18 -07:00
Eric Anholt 48a8531aa4 GEM: Fix arguments to drm_memrange_init so we don't exceed our allocation.
It takes (offset, size), not (offset, end).
2008-05-09 18:23:51 -07:00
Eric Anholt c5c59eab80 GEM: Separate the LRU into execution list and LRU list.
Now, the LRU list has objects that are completely done rendering and ready
to kick out, while the execution list has things with active rendering,
which have associated cookies and reference counts on them.
2008-05-09 17:38:32 -07:00
Eric Anholt f56f2acb5a GEM: Clear obj_priv->agp_mem when we free it.
Still managing to get something wrong with this, oopsing down in agp.
2008-05-09 15:07:49 -07:00
Eric Anholt f0ae335cd7 GEM: Avoid leaking refs on target objects on presumed offset success. 2008-05-09 15:02:50 -07:00
Keith Packard 1e26ca44c9 [gem] API cleanup. allocate->create unreference->close name->flink
Make the API names a bit more consistent.
2008-05-09 12:18:09 -07:00
Keith Packard ec75369b40 [i915] clean up whinging from checkpatch.pl 2008-05-08 13:09:17 -07:00
Keith Packard 07ad5ce1e1 Clean up whinging from checkpatch.pl in drm_gem.c
Whitespace changes, a few too-long-lines and some extra braces.
2008-05-08 13:08:22 -07:00
Eric Anholt 2f573e6df4 GEM: Fix oops on NULL dereference when we try clflushing when we don't need to. 2008-05-08 12:46:02 -07:00
Keith Packard 9af4c49743 [intel-gem] Move domains to relocation records. add set_domain ioctl.
Domain information is about buffer relationships, not buffer contents. That
means a relocation contains the domain information as it knows how the
source buffer references the target buffer.

This also adds the set_domain ioctl so that user space can move buffers to
the cpu domain.
2008-05-08 10:44:02 -07:00
Eric Anholt effc6d998f GEM: fix testcases for new ioctl args. 2008-05-07 16:00:58 -07:00
Arjan van de Ven aa0621a19f Apply a few stylistic cleanups to match kernel code. 2008-05-07 15:54:53 -07:00
Eric Anholt 06e9761f94 GEM: Wait for existing rendering to complete before writing relocation data.
This should already have been generally safe since we don't change contents
and put in new relocations between execbufs, so if we were writing in a new
relocation then we'd already waited rendering to complete when we moved
the target of the relocation.  However, doing the right thing will be required
if we do buffer reuse.
2008-05-07 14:10:04 -07:00
Eric Anholt 5f5f01ed91 GEM: Extend cache domain stuff for 965.
One of our MI_FLUSH bits is reserved on 965, being always implied, and there's
a vertex cache that was forgotten.
2008-05-07 12:46:06 -07:00
Dave Airlie b44f2da380 drm: nopage compat fixup for drm_vm
The kernel has removed nopage so move the old nopage codepaths into a compat vm file and switch to using the fault paths.

nopfn is on its way out in the future also, so we should switch to using fault
for that path as well soon
2008-05-07 15:10:23 +10:00
Keith Packard 6a6c37af9e [intel-GEM] ref count objects in gtt-lru.
If objects on the lru aren't ref counted, they'll get pulled from the gtt as
soon as they are freed. This change does cause objects to get stuck in the
gtt until they're forced out by new requests. The lru should get cleaned
when the irq occurs.
2008-05-06 21:59:06 -07:00
Keith Packard 61253f4f67 [intel-GEM] Add memory domain support.
Memory domains allow the kernel to track which caches to flush and how to
move objects before buffer execution.
2008-05-06 20:00:23 -07:00
Keith Packard 2b9ef32669 Merge commit 'anholt/drm-gem' into drm-gem 2008-05-06 14:43:56 -07:00
Keith Packard 631e86c5c4 Start coding up memory domains 2008-05-06 14:43:49 -07:00
Eric Anholt d2373b2a34 GEM: Use irq-based fencing rather than syncing and evicting every exec. 2008-05-06 13:28:26 -07:00
Eric Anholt dd6976c56f GEM: Skip relocation if presumed offset matches. 2008-05-06 11:25:53 -07:00
Eric Anholt 8551bfc6db GEM: Save the last ioremapped page for relocations in case we need it again. 2008-05-06 11:18:57 -07:00
Keith Packard 91cba3ae17 Dump last batch buffer when hardware lockup is detected. 2008-05-05 22:10:02 -07:00
Keith Packard ed6657fa8e Monitor ACTHD register while polling for idle ring.
When batch buffers are executing, the ring may be stuck for a long time.
Monitor the ACTHD pointer which will show if the execution engine is
actually hung.
2008-05-05 22:09:34 -07:00
Keith Packard 2c8f970baa Unlock pages right after getting them.
pages come back from find_or_create_page locked, but must not stay locked
for long. Unlock them immediately instead of waiting until we're done with
them to avoid deadlock when applications try to touch them.
2008-05-05 17:17:19 -07:00
Keith Packard 5b0d0fa7f8 Merge commit 'anholt/drm-gem' into drm-gem
Conflicts:

	linux-core/i915_gem.c
2008-05-05 14:40:20 -07:00
Eric Anholt dafe48e623 GEM: Replace drm_memrange_for_each with just evicting what we brought in.
I was wrong about how the data structure worked, and didn't care to fix it
to support debugging code.
2008-05-05 14:38:26 -07:00
Keith Packard d59a9300ec Remove some debug messages. 2008-05-05 14:32:01 -07:00
Keith Packard f0bc796a02 Add object base to relocation store address.
The relocated value was being written to the wrong location, missing
the object base address.
2008-05-05 14:22:42 -07:00
Keith Packard 4867780bd6 Emit clflush and chipset flush when mapping objects to gtt 2008-05-05 13:32:28 -07:00
Keith Packard 4511e6cd80 Correct execbuffer offset. Add memory barrier and chipset flush. 2008-05-05 11:27:06 -07:00
Keith Packard b6f173c430 Add i915_dispatch_gem_execbuffer (broken).
This function submits a gem-based execbuffer to the ring.
It doesn't work yet.
2008-05-05 10:51:49 -07:00