Jakob Bornecrantz
fb9ea12438
Made radeon_ms not always compile
2008-01-18 15:00:31 +01:00
Kyle McMartin
c6f175cbea
i915: fix invalid opcode exception on cpus without clflush
...
i915_flush_ttm was unconditionally executing a clflush instruction
to (obviously) flush the cache. Instead, check if the cpu supports
clflush, and if not, fall back to calling wbinvd to flush the entire
cache.
Signed-off-by: Kyle McMartin <kmcmartin@redhat.com>
2008-01-17 16:55:44 -08:00
Eric Anholt
44a9fa8cc6
Add additional explanation of DRM_BO_FLAG_CACHED_MAPPED before I forget again.
2008-01-17 16:55:43 -08:00
Zhenyu Wang
ac6b3780c8
i915: Add chipset id for Intel Integrated Graphics Device
...
This adds new chipset id in drm.
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-01-15 13:06:09 -05:00
Jerome Glisse
6ba979ea46
radeon_ms: use radeon connector type insted of drm
2008-01-15 16:01:39 +01:00
Jerome Glisse
20a8e2d30e
radeon_ms: cope with lastest drm modesetting change
2008-01-15 14:30:40 +01:00
Jerome Glisse
f1f934c8c9
radeon_ms: add rom parsing & adapt code
...
Add rom (only combios for now) parsing and use informations
retrieve instead of hardcoded table. Shuffle code around a
bit.
2008-01-15 14:17:05 +01:00
Thomas Hellstrom
88c511e49d
Properly propagate the user-space fence flags.
...
This avoids a sync flush when user-space has already programmed
and MI_FLUSH in the batchbuffer.
2008-01-15 10:03:41 +01:00
Thomas Hellstrom
099e89edf0
Define i915_compat.c upper_32_bits for kernels < 2.6.21
2008-01-15 09:47:04 +01:00
Zou Nan hai
806c1929dc
this is to fix a deadloop in drm hang system issue.
...
(1 << bits) is an undefined value when bits == 32.
gcc may generate 1 with this expression
which will lead to an infinite retry loop in
drm_ht_just_insert_please.
Because of the different implement of hash_long,
this issue is more frequenly see on 64 bit system
2008-01-15 09:19:02 +08:00
Dave Airlie
62df4f0a48
fixup i915 compat resource allocation
2008-01-14 19:38:41 +10:00
Stephane Marchesin
269d518008
nouveau: make mem alloc debug a little more verbose.
2008-01-14 03:16:42 +01:00
Jakob Bornecrantz
e6fc47129f
Fix for X axis panning problem
2008-01-11 17:33:00 +01:00
Jakob Bornecrantz
f07942f74a
Panning now works without modeset
2008-01-11 17:13:48 +01:00
Jakob Bornecrantz
12a47cd136
Updated the modedemo test
2008-01-11 04:23:32 +01:00
Jakob Bornecrantz
0b69c1d1d6
Added fixed misc framebuffer problems
2008-01-11 02:55:00 +01:00
Ben Skeggs
f0b7c45653
nv05: enable ctx/op methods, and ignore patch valid failures.
...
Yes, I'm quite aware "real" nv04 doesn't support this, hopefully the GPU
will just ignore those PGRAPH_DEBUG_3 bits on that hw.
2008-01-11 12:51:08 +11:00
Jakob Bornecrantz
0a4df3372a
Updated test mode and added modedemo
2008-01-10 05:03:13 +01:00
Dave Airlie
e04d942ee8
fixup crtcinfo on modes from userspace
2008-01-09 18:11:17 +11:00
Dave Airlie
87a32efcdd
add control node open
2008-01-09 18:11:04 +11:00
Dave Airlie
73bf5e8670
add internals for opening a control node
2008-01-09 16:44:31 +11:00
Dave Airlie
8d6e3c208f
allow control getversion
2008-01-09 16:43:51 +11:00
Dave Airlie
ebbc2e0a2e
add control ioctls
2008-01-09 16:31:37 +11:00
Dave Airlie
135f51306b
drm: only call suspend/resume on control node
2008-01-09 16:21:56 +11:00
Stuart Bennett
5f15f317fb
nouveau: AGP reset correction - don't touch FW bit
2008-01-08 20:30:21 +00:00
Ben Skeggs
0bfd09f719
nv50: more small changes
2008-01-07 18:56:44 +11:00
Ben Skeggs
942b500e24
nv50: oops, lost some state saving along the way somewhere.
...
xf86-video-nv will now work again after nouveau.
2008-01-07 18:19:16 +11:00
Ben Skeggs
3d248cd7e4
nv50: hook up timer funcs...
2008-01-07 17:23:31 +11:00
Ben Skeggs
7a4ba7273c
nv50: abort on chips without ctx ucode
2008-01-07 17:13:22 +11:00
Ben Skeggs
15f8fd34df
nv50: some needed ctx vals
2008-01-07 17:09:00 +11:00
Ben Skeggs
fa5e18679f
nv50: use dummy page in gart tables
...
Just to be safe, we don't really know exactly how the tables work yet, so
we can't be certain there's a way to say "page not present".
2008-01-07 17:09:00 +11:00
Ben Skeggs
3d3d509dca
nv50: some cleanups + small changes
2008-01-07 17:08:59 +11:00
Stephane Marchesin
cd19dcef4f
Nouveau: ppc oops.
2008-01-07 06:11:33 +01:00
Stephane Marchesin
de522ae742
Nouveau: move PPC bios copy to firstopen.
2008-01-07 05:54:37 +01:00
Jeremy Kolb
bd5d760a10
nouveau: Add ctx_voodoo for NV86
2008-01-06 10:09:47 -05:00
Pekka Paalanen
f5e5e5c0ea
drm: One forgotten rename of 'mask' to 'proposed_flags'.
...
Due to commit d1187641d6
.
2008-01-05 00:42:38 +02:00
Dave Airlie
d3da253adb
drm: add initial support for a drm control device node
2008-01-04 17:49:40 +11:00
Dave Airlie
df9cfeff37
crtc: fixup allocation size
2008-01-04 17:48:42 +11:00
Xavier Bachelot
30fba69a68
via: add P4M900 pci id.
...
bug 12108
2008-01-04 16:29:04 +10:00
Dave Airlie
10937cf20b
drm: move drm_head to drm_minor and fix up users
2008-01-04 16:12:24 +11:00
Stuart Bennett
71adbfc874
[PATCH] nouveau: reset AGP on init for < nv40
...
This is necessary for AGP to work after running bios init scripts on nv3x, and
is seen in mmio traces of all cards (nv04-nv4x)
I'm not making the equivalent change to nv40_mc.c, as early cards (6200, 6800gt)
use the 0x000018XX PBUS and later cards use the 0x000880XX PBUS and I don't know
the effects of using the wrong one
2008-01-04 05:08:15 +01:00
Stuart Bennett
381724a35b
[PATCH] nouveau: Fix nv20/30 context loading
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Don't set the context as valid until it has been loaded
2008-01-04 05:07:35 +01:00
Dave Airlie
78d6649069
mach64: some more minor cleanups
2008-01-03 17:44:04 +10:00
Dave Airlie
97b8c9591c
mach64: cleanup some of the macro formatting
2008-01-03 17:10:30 +10:00
Márton Németh
9ab620d661
drm: cleanup DRM_DEBUG() parameters
...
As DRM_DEBUG macro already prints out the __FUNCTION__ string (see
drivers/char/drm/drmP.h), it is not worth doing this again. At some
other places the ending "\n" was added.
airlied:- I cleaned up a few that this patch missed also
2008-01-03 16:56:04 +10:00
Dave Airlie
5e99b42b04
Merge branch 'r500-support'
2008-01-03 16:05:13 +10:00
Dave Airlie
96a00054be
remove duplicate pciids
2008-01-03 16:03:05 +10:00
Xiang, Haihao
b9417f4141
i915: return fence argument from i915_execbuffer ioctl32 routine
2007-12-26 17:13:58 +08:00
Xiang, Haihao
5d8d64ad38
i915: i915_execbuffer ioctl32 routine, fix #13732
2007-12-25 16:57:14 +08:00
Keith Packard
da3601e43a
Change drm_bo_type_dc to drm_bo_type_device and comment usage of this value.
...
I couldn't figure out what drm_bo_type_dc was for; Dave Airlie finally clued
me in that it was the 'normal' buffer objects with kernel allocated pages
that could be mmapped from the drm device file.
I thought that 'drm_bo_type_device' was a more descriptive name.
I also added a bunch of comments describing the use of the type enum values and
the functions that use them.
2007-12-21 12:16:29 -08:00