0744cb153a
Add new RV380 pci id
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bug 14289
2008-01-29 10:11:27 -05:00
01f6afcfea
Fix hibernate save/restore of VGA attribute regs
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In hibernate, we may end up calling the VGA save regs function twice, so we
need to make sure it's idempotent. That means leaving ARX in index mode after
the first save operation. Fixes hibernate on 965.
2008-01-28 21:05:22 -08:00
b9b6f9234d
Misc panning fixes for intel_fb
2008-01-28 22:06:09 +01:00
a2254c5a96
Added cursor support
2008-01-28 03:14:56 +01:00
b8755ff7c3
drm: add initial rs690 support for drm.
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This adds support for configuring the RS690 GART.
2008-01-27 12:50:31 +10:00
6bfb9b639a
mach64: fix after vblank-rework
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don't disable vblank interrupts (similar to r128)
2008-01-25 16:54:29 +02:00
98361cf28c
if irq already enabled well just keep trucking
2008-01-25 16:34:05 +10:00
fa7b779c91
don't reinit ring if already initialised
2008-01-25 16:32:09 +10:00
e7a41d7f5b
Merge remote branch 'origin/master' into modesetting-101
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Conflicts:
linux-core/drm_bo.c
linux-core/drm_drv.c
shared-core/drm.h
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
shared-core/radeon_irq.c
2008-01-25 15:27:53 +10:00
bfdddd218e
Fixup modeset ioctl number & typedef usage
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Should be 0x08 rather than 0xa0, and shouldn't use typedefs.
2008-01-24 21:13:33 -08:00
e3c42f0004
Merge commit 'airlied/i915-ttm-cfu'
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This requires updated Mesa to handle the new relocation format.
2008-01-24 12:44:19 -08:00
c7ee6cc269
Remove broken 'in vblank' accounting
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We need to return an accurate vblank count to the callers of
->get_vblank_counter, and in the Intel case the actual frame count
register isn't udpated until the next active line is displayed, so we
need to return one more than the frame count register if we're currently
in a vblank period.
However, none of the various ways of doing this is working yet, so
disable the logic for now. This may result in a few missed events, but
should fix the hangs some people have seen due to the current code
tripping the wraparound logic in drm_update_vblank_count.
2008-01-24 08:57:04 -08:00
5b99306452
i915: fix missing header when copying data from userspace
2008-01-24 15:18:09 +10:00
34b71eb451
i915 make relocs use copy from user
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Switch relocs to using copy from user and remove index and pass buffer
handles in instead.
2008-01-24 14:37:40 +10:00
b5a34f5da5
Fix thinko in get_vblank_counter
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Should use vtotal not htotal to figure out if we're in a vblank period.
2008-01-23 08:39:57 -08:00
cb91784371
Fix IS_I915G macro
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One to many parantheses...
2008-01-23 08:38:01 -08:00
7c726086dd
nouveau: Fix warning in nouveau_mem.c
2008-01-23 16:40:19 +01:00
c57f43e3a2
i915/flush: get the ret the right way around
2008-01-23 16:45:09 +10:00
2f19fe4498
drm/i915: add support for E7221
2008-01-23 16:44:51 +10:00
531f25cfe9
Correct vblank count value
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The frame count registers don't increment until the start of the next
frame, so make sure we return an incremented count if called during the
actual vblank period.
2008-01-22 15:16:01 -08:00
893e311999
i915 irq fixes
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Ack the IRQs correctly (PIPExSTAT first followed by IIR). Don't read
vblank counter registers on disabled pipes (might hang otherwise). And
deal with flipped pipe/plane mappings if present.
2008-01-22 13:11:29 -08:00
0cd4cbc9a6
Merge branch 'master' into vblank-rework, including mach64 support
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Conflicts:
linux-core/drmP.h
linux-core/drm_drv.c
shared-core/i915_drv.h
shared-core/i915_irq.c
shared-core/mga_irq.c
shared-core/radeon_irq.c
shared-core/via_irq.c
Mostly trivial conflicts.
mach64 support from Mathieu Bérard.
2008-01-22 09:42:37 -08:00
5231a524f5
Revert "Fix pipe<->plane mapping vs. vblank handling (again)"
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This reverts commit bfc29606e4
2008-01-22 14:42:48 +11:00
616cef5ec8
nouveau: don't forget NV80.
2008-01-21 21:11:47 +01:00
641c9a2ecc
nouveau: new card family for old card designs.
2008-01-21 21:01:28 +01:00
fb9ea12438
Made radeon_ms not always compile
2008-01-18 15:00:31 +01:00
c6f175cbea
i915: fix invalid opcode exception on cpus without clflush
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i915_flush_ttm was unconditionally executing a clflush instruction
to (obviously) flush the cache. Instead, check if the cpu supports
clflush, and if not, fall back to calling wbinvd to flush the entire
cache.
Signed-off-by: Kyle McMartin <kmcmartin@redhat.com>
2008-01-17 16:55:44 -08:00
44a9fa8cc6
Add additional explanation of DRM_BO_FLAG_CACHED_MAPPED before I forget again.
2008-01-17 16:55:43 -08:00
ac6b3780c8
i915: Add chipset id for Intel Integrated Graphics Device
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This adds new chipset id in drm.
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-01-15 13:06:09 -05:00
6ba979ea46
radeon_ms: use radeon connector type insted of drm
2008-01-15 16:01:39 +01:00
20a8e2d30e
radeon_ms: cope with lastest drm modesetting change
2008-01-15 14:30:40 +01:00
f1f934c8c9
radeon_ms: add rom parsing & adapt code
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Add rom (only combios for now) parsing and use informations
retrieve instead of hardcoded table. Shuffle code around a
bit.
2008-01-15 14:17:05 +01:00
88c511e49d
Properly propagate the user-space fence flags.
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This avoids a sync flush when user-space has already programmed
and MI_FLUSH in the batchbuffer.
2008-01-15 10:03:41 +01:00
099e89edf0
Define i915_compat.c upper_32_bits for kernels < 2.6.21
2008-01-15 09:47:04 +01:00
806c1929dc
this is to fix a deadloop in drm hang system issue.
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(1 << bits) is an undefined value when bits == 32.
gcc may generate 1 with this expression
which will lead to an infinite retry loop in
drm_ht_just_insert_please.
Because of the different implement of hash_long,
this issue is more frequenly see on 64 bit system
2008-01-15 09:19:02 +08:00
62df4f0a48
fixup i915 compat resource allocation
2008-01-14 19:38:41 +10:00
269d518008
nouveau: make mem alloc debug a little more verbose.
2008-01-14 03:16:42 +01:00
e6fc47129f
Fix for X axis panning problem
2008-01-11 17:33:00 +01:00
f07942f74a
Panning now works without modeset
2008-01-11 17:13:48 +01:00
12a47cd136
Updated the modedemo test
2008-01-11 04:23:32 +01:00
0b69c1d1d6
Added fixed misc framebuffer problems
2008-01-11 02:55:00 +01:00
f0b7c45653
nv05: enable ctx/op methods, and ignore patch valid failures.
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Yes, I'm quite aware "real" nv04 doesn't support this, hopefully the GPU
will just ignore those PGRAPH_DEBUG_3 bits on that hw.
2008-01-11 12:51:08 +11:00
0a4df3372a
Updated test mode and added modedemo
2008-01-10 05:03:13 +01:00
e04d942ee8
fixup crtcinfo on modes from userspace
2008-01-09 18:11:17 +11:00
87a32efcdd
add control node open
2008-01-09 18:11:04 +11:00
73bf5e8670
add internals for opening a control node
2008-01-09 16:44:31 +11:00
8d6e3c208f
allow control getversion
2008-01-09 16:43:51 +11:00
ebbc2e0a2e
add control ioctls
2008-01-09 16:31:37 +11:00
135f51306b
drm: only call suspend/resume on control node
2008-01-09 16:21:56 +11:00
5f15f317fb
nouveau: AGP reset correction - don't touch FW bit
2008-01-08 20:30:21 +00:00
Mirko
Jesse Barnes
Jakob Bornecrantz
Jakob Bornecrantz
Maciej Cencora
George Sapountzis
Dave Airlie
Jesse Barnes
Eric Anholt
Maarten Maathuis
Dave Airlie
Jesse Barnes
Stephane Marchesin
Kyle McMartin
Zhenyu Wang
Jerome Glisse
Thomas Hellstrom
Zou Nan hai
Ben Skeggs
Stuart Bennett