a7457915f5
radeon+libdrm-radeon: change relocation informations
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Relocation now consist of the following informations (in this order) :
handle buffer object handle identifier
start_offset start offset of first data of the buffer object used by the cs
end_offset end offset of last data of the buffer object used by the cs
read_domain read domain (either VRAM, or GTT as GPU is invalid for CS)
write_domain write domain (either VRAM, or GTT as GPU is invalid for CS)
flags flags used for further optimization (like discard previous
buffer content or forget buffer content after cs which can
help in avoiding moving content in or out)
2008-11-12 16:57:09 +01:00
15464f5181
radeon: add gart useable size to report to userspace
2008-11-10 15:38:32 +10:00
241a9b6414
drm/radeon: add uncached allocator to drm ttm code.
2008-11-10 15:30:21 +10:00
31b0c4cd20
radeon: fixup vram visible calculation to take a/c pinned objects for now
2008-11-10 15:13:08 +10:00
0e1df6216e
radeon: add mtrr support for VRAM aperture.
2008-11-03 09:52:25 +10:00
49551f87fc
radeon: set dma bufs bo type to a kernel type
2008-11-03 09:49:41 +10:00
31b8a640db
radeon: overhaul ring interactions
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emit in 16-dword blocks, emit irqs at same time as everything else
2008-11-03 09:46:54 +10:00
31f8d4218c
radeon: add wait rendering API
2008-11-03 09:44:03 +10:00
4ccec67a23
radeon: remove unused gem indirect ioctl
2008-11-03 09:42:01 +10:00
f5e6dbef79
radeon: fix some warnings
2008-11-03 09:41:30 +10:00
6000fa6862
radeon: CS2 make it all work with new relocs style
2008-11-03 09:40:52 +10:00
8b2925468d
radeon: make new CS2 command submission interface port older interface to this
2008-11-03 09:39:53 +10:00
624da91277
radeon: add r423 bits to modesetting
2008-11-03 09:33:12 +10:00
653b16f2dd
radeon: fix accessible VRAM sizing
2008-11-03 09:31:17 +10:00
d958cd7bb9
radeon: use discardable flags on no backing store objects
2008-10-16 10:51:31 +10:00
4d1031a9f0
radeon: fix alignment so Xv works again
2008-10-06 16:40:45 +10:00
4a4d7727c6
radeon: fix pin ioctl interface to mesa can find offset for pinned buffers
2008-10-06 16:40:20 +10:00
a981a68603
drm/radeon: fixup clean flag handling
2008-10-06 16:39:25 +10:00
35e379ce5a
radeon: add r600 modesetting registers writes
2008-09-24 15:25:35 +10:00
f426f458f7
[PATCH] radeon: fixup GEM domain setting - allows more userspace paths
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also dirty buffer on validate
2008-09-18 10:20:29 +10:00
8f38c28a39
radeon: fail properly if we can't create the ring.
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Normally this will be due to an AGP driver needing updating
2008-09-18 10:19:08 +10:00
515aa0800c
radeon: do proper memory controller init and setup
2008-09-18 10:17:27 +10:00
9b728fe4b0
radeon: fixup reference counting properly
2008-09-18 10:16:09 +10:00
ed961cb428
radeon: remove unneeded debugging
2008-09-18 10:14:32 +10:00
8f23d4a44c
make text reserve 256k
2008-09-18 10:12:13 +10:00
2a6dad31d8
radeon: add initial suspend/resume support
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plus a bunch of fixes
2008-09-18 10:11:23 +10:00
9f9f171f8e
radeon: rs690 GART tables need to be in uncached memory.
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Allocate the rs480/690 tables from uncached memory.
2008-09-05 10:57:47 +10:00
fe59d04a7c
radeon: fixup a number of avivo checks for rs690
2008-09-04 11:57:00 +10:00
361ab10d2f
radeon: fixup domains and use them properly
2008-08-26 17:39:00 +10:00
aed70622ab
radeon: first pass at bios scratch regs
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- todo: updated connected status
2008-08-17 18:09:07 -04:00
2030db7532
radeon: reserve 64k of VRAM for now for text mode so we don't trample it
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need to revisit this later I'm sure
2008-08-15 09:56:42 +10:00
30ff279e42
radeon: add support for memory map init
2008-08-14 14:43:51 +10:00
0580785030
radeon: FEDORA: patch to make 3D driver work
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set gart buffers start
2008-08-14 09:15:28 +10:00
58df2fa0ec
radeon: remove debugging
2008-08-14 09:14:56 +10:00
b0ee12e6bb
radeon: use mm_enabled variable to denote memory manager running
2008-08-14 09:14:14 +10:00
18020e5e96
radeon: make buffer swap for older drivers work again on GEM
2008-08-14 09:12:36 +10:00
957c71ff52
radeon: FEDORA: add old DMA buffers on top of GEM
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This really shouldn't go upstream, it just lets me
run the old 3D driver on GEM setup system
2008-08-14 09:10:11 +10:00
8c042a0b05
radeon: fixup PCI GART table with GEM enabled
2008-08-06 15:59:31 +10:00
9b8d71b5eb
TTM: remove API and userspace objects.
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This removes all the TTM userspace API and all userspace objects.
It also removes the drm_bo_lock.c code
2008-07-31 12:54:48 +10:00
fb5542aaa8
radeon: hack gem to get an offset back for Mesa.
2008-07-30 17:06:11 +10:00
0452be8826
radeon: move code around putting emit into cs
2008-07-29 18:05:11 +10:00
4234f82acc
radeon_cs: add relocate hook for mm and non-mm relocations
2008-07-29 16:51:47 +10:00
38835f9cd2
radeon command submission start
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take code from Jerome munge into a TTM IB re-use
2008-07-28 15:21:13 +10:00
df9871064e
radeon: add initial atombios modesetting and GEM -> TTM translation layer.
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This is an initial import of the atom bios parser with modesetting support
for r500 hw using atombios. It also includes a simple memory manager
layer that translates a radeon GEM style interface onto TTM internally.
So far this memory manager has only been used for pinned object allocation
for the DDX to test modesetting.
2008-07-26 08:56:23 +10:00
Jerome Glisse
Dave Airlie
Dave Airlie
Alex Deucher