Commit Graph

140 Commits (0e867312323fa51af324228b98bff4f49a813481)

Author SHA1 Message Date
Alex Deucher e1372f6727 radeon: fix error in busmaster enable logic
- logic was wrong.  rs400/rs480 should clear the RADEON_BUS_MASTER_DIS bit
- should fix kernel bug 11798
2008-10-27 13:18:07 -04:00
Alex Deucher 848f00d773 radeon: fix some fallout from the busmaster disable cleanup
rs400 is just like rs480.  I mixed up the internal
chipset names for rs600 and rs400.
2008-10-27 12:59:39 -04:00
Dave Airlie 8e5f5ed189 radeon: PCIE cards don't appear to have explicit bus master 2008-10-07 04:47:54 +10:00
Alex Deucher 4b98f6d74f radeon: fix bus master enabled bits on newer asics 2008-10-06 03:08:27 -04:00
Alex Deucher ce40261012 radeon: Add support for HD2100 IGP (RS740) 2008-10-04 20:43:21 -04:00
Dave Airlie cd7d71f19c radeon: make writeback work after suspend/resume.
While re-writing this for modesetting, I find we disable writeback on
resume.
2008-08-31 07:27:26 +10:00
Dave Airlie 7cfdba2b30 radeon: remove microcode version 2008-07-18 14:36:47 +10:00
Dave Airlie abdd523c75 drm: add fix for PAT on radeon with 2.6.26 2008-07-15 16:18:22 +10:00
Jerome Glisse 59112c9e52 radeon: *really* fix screen corruption thanks to Lukasz Krotowski 2008-06-15 20:18:29 +02:00
Jerome Glisse 1aafbb83d9 radeon: r345xx fixe hard lockup
This patch should fixe hard lockup and convert them in
softlockup (ie you can ssh the box but the gpu is busted
and we are waiting in loop for it to come back to reason).
2008-06-13 09:54:05 +02:00
Alex Deucher a07c82183a RADEON: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTAT
According to the hw guys, you should use DSTCACHE_CTLSTAT to flush
the 2D dst cache rather than RB2D_DSTCACHE_CTLSTAT.
2008-06-11 18:25:47 -04:00
Alex Deucher 4b8aecbde8 RADEON: Add untested support for RS400 chips
GART setup appears to work the same as RS480 chips.
Also RC4xx chips are actually RS400 based, not RS480 based.
2008-06-09 16:58:06 -04:00
Alex Deucher f6982b54c9 RADEON: switch IGP gart to use radeon_write_agp_base() 2008-06-09 16:28:35 -04:00
Dennis Kasprzyk 6905c7a29d radeon: Restore software interrupt on resume.
Fixes performance drop after suspend/resume on some systems.
2008-06-05 18:23:37 +02:00
Alex Deucher a12cbf8aa5 RADEON: fix typo in last commit 2008-05-30 18:20:01 -04:00
Dave Airlie 6e8a2cff66 r500: attempt to make AGP work by programming agp base in the MC correctly 2008-05-30 20:27:31 +10:00
Dave Airlie 5b86823fa3 radeon: split microcode out into a separate header file. 2008-05-28 11:12:57 +10:00
Alex Deucher 59c953245c RADEON: add get_param for number of GB pipes 2008-05-27 18:34:33 -04:00
Alex Deucher caace3692f RS4xx: separate out RS400 and RS480 IGP chips
RS400 (intel based IGP) and RS480 (AMD based IGP) have
different MC and GART setups.  Currently we only support
RS480.
2008-05-13 21:02:17 -04:00
Alex Deucher 10d754f0a2 RADEON: fix copy/pasto in last commit 2008-05-12 14:49:43 -04:00
Alex Deucher 75bc739bee R3/4/5: init pipe setup in drm
Similar (broken) code in mesa needs to be removed
2008-05-12 09:44:20 -04:00
Alex Deucher e16a7101e8 RADEON: cleanup radeon_do_engine_reset() 2008-05-12 09:35:06 -04:00
Alex Deucher 5532b8d2a0 R300+: fixup pixcache flush 2008-05-12 09:30:47 -04:00
Alex Deucher 3582e82f14 RS4xx: fix MCIND index mask 2008-05-12 09:24:13 -04:00
Alex Deucher d26af273f8 RADEON: write AGP_BASE_2 on chips that support it 2008-05-12 09:21:45 -04:00
Alex Deucher fb9eaff747 Radeon IGP: merge RS4xx/RS6xx gart setup 2008-05-12 09:13:44 -04:00
Alex Deucher 68b7f550ba Radeon IGP: wrap MCIND access
first step in merging rs4xx/rs6xx gart setup
2008-05-12 09:00:40 -04:00
Alex Deucher a34025ce22 Radeon IGP: clean up registers and magic numbers 2008-05-12 08:56:11 -04:00
Alex Deucher 9e4f908287 RADEON: switch over to new production microcode
This needs to be tested thoroughly before pushing to the
kernel.
2008-03-19 15:37:56 -04:00
Alex Deucher d8af16d2a7 RADEON: production microcode for all radeons, r1xx-r6xx
This updated microcode is not in use yet.
2008-03-19 14:57:42 -04:00
Dave Airlie 1f96e9a982 drm/pcigart: fix the pci gart to use the drm_pci wrapper.
This is the correct fix for the RS690 and hopefully the dma coherent work.

For now we limit everybody to a 32-bit DMA mask but it is possible for
RS690 to use a 40-bit DMA mask for the GART table itself,
and the PCIE cards can use 40-bits for the table entries.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-03-17 07:05:46 +10:00
Dave Airlie 5b1d9263d3 drm/rs690: set AGP_BASE_2 to 0 2008-03-16 14:00:16 +10:00
Dave Airlie dd9eb923ed drm: set rs690 gart base completly.
The docs state bits 4-11 represent bits 32-39 of a 40-bit address
2008-03-16 12:58:07 +10:00
Maciej Cencora b8755ff7c3 drm: add initial rs690 support for drm.
This adds support for configuring the RS690 GART.
2008-01-27 12:50:31 +10:00
Márton Németh 9ab620d661 drm: cleanup DRM_DEBUG() parameters
As DRM_DEBUG macro already prints out the __FUNCTION__ string (see
drivers/char/drm/drmP.h), it is not worth doing this again. At some
other places the ending "\n" was added.

airlied:- I cleaned up a few that this patch missed also
2008-01-03 16:56:04 +10:00
Dave Airlie 814f695135 Merge branch 'master' into r500-support 2007-12-10 15:53:59 +10:00
Robert Noland 690dd04d1b bsd: Replace other occurrences of msleep with mtx_sleep 2007-12-02 01:45:09 -05:00
Dave Airlie e51b3c8ff4 r500: add a bunch of all r5xx pci ids..
fix up a range that may be needed for r500 mesa
2007-11-27 08:43:14 +10:00
Dave Airlie dc0ec76d60 radeon: add initial r5xx support 2007-11-20 08:44:33 +10:00
Dave Airlie a90510966e radeon: refactor out the fb/agp location read/write.
Add a new get param to get the fb location into userspace. Mesa currently
hits MMIO to do this, but this isn't always possible.
2007-11-18 19:25:31 +10:00
Dave Airlie 7f6bf84c23 drm: remove lots of spurious whitespace.
Kernel "cleanfile" script run.
2007-11-05 12:42:22 +10:00
Dave Airlie bb5f2158db radeon: set the address to access the aperture on the CPU side correctly
This code relied on the CPU and GPU address for the aperture being the same,
On some r5xx hardware I was playing with I noticed that this isn't always true.
I wonder if this will fix some of those r4xx DRI issues we've seen in the past.
2007-11-03 00:39:44 +10:00
Eric Anholt 5b38e13416 Replace DRM_IOCTL_ARGS with (dev, data, file_priv) and remove DRM_DEVICE.
The data is now in kernel space, copied in/out as appropriate according to the
This results in DRM_COPY_{TO,FROM}_USER going away, and error paths to deal
with those failures.  This also means that XFree86 4.2.0 support for i810 DRM
is lost.
2007-07-20 18:16:42 -07:00
Eric Anholt c1119b1b09 Replace filp in ioctl arguments with drm_file *file_priv.
As a fallout, replace filp storage with file_priv storage for "unique
identifier of a client" all over the DRM.  There is a 1:1 mapping, so this
should be a noop.  This could be a minor performance improvement, as everything
on Linux dereferenced filp to get file_priv anyway, while only the mmap ioctls
went the other direction.
2007-07-20 13:39:45 -07:00
Eric Anholt e39286eb5e Remove DRM_ERR OS macro.
This was used to make all ioctl handlers return -errno on linux and errno on
*BSD.  Instead, just return -errno in shared code, and flip sign on return from
shared code to *BSD code.
2007-07-20 12:53:52 -07:00
Dave Airlie 24311d5d82 drm: remove drm_buf_t 2007-07-16 13:42:11 +10:00
Dave Airlie 21ee6fbfb8 drm: remove drmP.h internal typedefs 2007-07-16 12:32:51 +10:00
Dave Airlie b95ac8b7b3 drm: detypedef drm.h and fixup all problems 2007-07-16 11:22:15 +10:00
Oliver McFadden 3181573073 r300: Added the CP maximum fetch size and ring rptr update variables. 2007-06-08 19:40:57 +00:00
Dave Airlie 4e9d215bdf radeon: add support for vblank on crtc2
This add support for CRTC2 vblank on radeon similiar to the i915 support
2007-06-03 16:28:21 +10:00