aed70622ab
radeon: first pass at bios scratch regs
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- todo: updated connected status
2008-08-17 18:09:07 -04:00
30ff279e42
radeon: add support for memory map init
2008-08-14 14:43:51 +10:00
2d4420c666
Merge branch 'radeon-gem-cs' into modesetting-gem
...
Conflicts:
libdrm/xf86drm.c
linux-core/Makefile.kernel
linux-core/drmP.h
linux-core/drm_compat.h
linux-core/drm_drv.c
linux-core/drm_stub.c
linux-core/drm_vm.c
shared-core/i915_dma.c
shared-core/r300_cmdbuf.c
shared-core/radeon_drv.h
2008-08-14 09:36:34 +10:00
5f427e9aae
Brute force port of legacy crtc/encoder code
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- removed save/init/restore chain with set functions
2008-08-14 09:19:02 +10:00
c2184e450e
radeon: add initial support for legacy crtc/encoders.
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not all there yet
2008-08-08 16:04:45 +10:00
513d4c3ff1
radeon: fix setting new memmap in right place
2008-08-06 10:21:20 +10:00
aa8e15f8b5
radeon: add userspace mm enable switch
2008-08-04 14:59:17 +10:00
af6efc3d77
i915/radeon: use rmmap locked
2008-08-04 14:54:02 +10:00
5052e966ec
Merge commit 'origin/master' into modesetting-gem
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Conflicts:
linux-core/Makefile.kernel
linux-core/ati_pcigart.c
linux-core/drm_compat.h
linux-core/drm_irq.c
linux-core/drm_lock.c
linux-core/i915_drv.c
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
shared-core/nouveau_mem.c
shared-core/radeon_cp.c
shared-core/radeon_drv.h
2008-07-31 15:18:32 -04:00
dc3a7c023d
r300: initial command stream parser for packet 0.
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this at least parses the DDX stream and lets me run gnome-terminal/metacity
2008-07-28 17:27:24 +10:00
38835f9cd2
radeon command submission start
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take code from Jerome munge into a TTM IB re-use
2008-07-28 15:21:13 +10:00
df9871064e
radeon: add initial atombios modesetting and GEM -> TTM translation layer.
...
This is an initial import of the atom bios parser with modesetting support
for r500 hw using atombios. It also includes a simple memory manager
layer that translates a radeon GEM style interface onto TTM internally.
So far this memory manager has only been used for pinned object allocation
for the DDX to test modesetting.
2008-07-26 08:56:23 +10:00
7cfdba2b30
radeon: remove microcode version
2008-07-18 14:36:47 +10:00
abdd523c75
drm: add fix for PAT on radeon with 2.6.26
2008-07-15 16:18:22 +10:00
59112c9e52
radeon: *really* fix screen corruption thanks to Lukasz Krotowski
2008-06-15 20:18:29 +02:00
1aafbb83d9
radeon: r345xx fixe hard lockup
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This patch should fixe hard lockup and convert them in
softlockup (ie you can ssh the box but the gpu is busted
and we are waiting in loop for it to come back to reason).
2008-06-13 09:54:05 +02:00
a07c82183a
RADEON: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTAT
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According to the hw guys, you should use DSTCACHE_CTLSTAT to flush
the 2D dst cache rather than RB2D_DSTCACHE_CTLSTAT.
2008-06-11 18:25:47 -04:00
4b8aecbde8
RADEON: Add untested support for RS400 chips
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GART setup appears to work the same as RS480 chips.
Also RC4xx chips are actually RS400 based, not RS480 based.
2008-06-09 16:58:06 -04:00
f6982b54c9
RADEON: switch IGP gart to use radeon_write_agp_base()
2008-06-09 16:28:35 -04:00
6905c7a29d
radeon: Restore software interrupt on resume.
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Fixes performance drop after suspend/resume on some systems.
2008-06-05 18:23:37 +02:00
a12cbf8aa5
RADEON: fix typo in last commit
2008-05-30 18:20:01 -04:00
6e8a2cff66
r500: attempt to make AGP work by programming agp base in the MC correctly
2008-05-30 20:27:31 +10:00
5b86823fa3
radeon: split microcode out into a separate header file.
2008-05-28 11:12:57 +10:00
59c953245c
RADEON: add get_param for number of GB pipes
2008-05-27 18:34:33 -04:00
caace3692f
RS4xx: separate out RS400 and RS480 IGP chips
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RS400 (intel based IGP) and RS480 (AMD based IGP) have
different MC and GART setups. Currently we only support
RS480.
2008-05-13 21:02:17 -04:00
10d754f0a2
RADEON: fix copy/pasto in last commit
2008-05-12 14:49:43 -04:00
75bc739bee
R3/4/5: init pipe setup in drm
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Similar (broken) code in mesa needs to be removed
2008-05-12 09:44:20 -04:00
e16a7101e8
RADEON: cleanup radeon_do_engine_reset()
2008-05-12 09:35:06 -04:00
5532b8d2a0
R300+: fixup pixcache flush
2008-05-12 09:30:47 -04:00
3582e82f14
RS4xx: fix MCIND index mask
2008-05-12 09:24:13 -04:00
d26af273f8
RADEON: write AGP_BASE_2 on chips that support it
2008-05-12 09:21:45 -04:00
fb9eaff747
Radeon IGP: merge RS4xx/RS6xx gart setup
2008-05-12 09:13:44 -04:00
68b7f550ba
Radeon IGP: wrap MCIND access
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first step in merging rs4xx/rs6xx gart setup
2008-05-12 09:00:40 -04:00
a34025ce22
Radeon IGP: clean up registers and magic numbers
2008-05-12 08:56:11 -04:00
9e4f908287
RADEON: switch over to new production microcode
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This needs to be tested thoroughly before pushing to the
kernel.
2008-03-19 15:37:56 -04:00
d8af16d2a7
RADEON: production microcode for all radeons, r1xx-r6xx
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This updated microcode is not in use yet.
2008-03-19 14:57:42 -04:00
1f96e9a982
drm/pcigart: fix the pci gart to use the drm_pci wrapper.
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This is the correct fix for the RS690 and hopefully the dma coherent work.
For now we limit everybody to a 32-bit DMA mask but it is possible for
RS690 to use a 40-bit DMA mask for the GART table itself,
and the PCIE cards can use 40-bits for the table entries.
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-03-17 07:05:46 +10:00
5b1d9263d3
drm/rs690: set AGP_BASE_2 to 0
2008-03-16 14:00:16 +10:00
dd9eb923ed
drm: set rs690 gart base completly.
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The docs state bits 4-11 represent bits 32-39 of a 40-bit address
2008-03-16 12:58:07 +10:00
b8755ff7c3
drm: add initial rs690 support for drm.
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This adds support for configuring the RS690 GART.
2008-01-27 12:50:31 +10:00
9ab620d661
drm: cleanup DRM_DEBUG() parameters
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As DRM_DEBUG macro already prints out the __FUNCTION__ string (see
drivers/char/drm/drmP.h), it is not worth doing this again. At some
other places the ending "\n" was added.
airlied:- I cleaned up a few that this patch missed also
2008-01-03 16:56:04 +10:00
814f695135
Merge branch 'master' into r500-support
2007-12-10 15:53:59 +10:00
690dd04d1b
bsd: Replace other occurrences of msleep with mtx_sleep
2007-12-02 01:45:09 -05:00
e51b3c8ff4
r500: add a bunch of all r5xx pci ids..
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fix up a range that may be needed for r500 mesa
2007-11-27 08:43:14 +10:00
dc0ec76d60
radeon: add initial r5xx support
2007-11-20 08:44:33 +10:00
a90510966e
radeon: refactor out the fb/agp location read/write.
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Add a new get param to get the fb location into userspace. Mesa currently
hits MMIO to do this, but this isn't always possible.
2007-11-18 19:25:31 +10:00
7f6bf84c23
drm: remove lots of spurious whitespace.
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Kernel "cleanfile" script run.
2007-11-05 12:42:22 +10:00
bb5f2158db
radeon: set the address to access the aperture on the CPU side correctly
...
This code relied on the CPU and GPU address for the aperture being the same,
On some r5xx hardware I was playing with I noticed that this isn't always true.
I wonder if this will fix some of those r4xx DRI issues we've seen in the past.
2007-11-03 00:39:44 +10:00
5b38e13416
Replace DRM_IOCTL_ARGS with (dev, data, file_priv) and remove DRM_DEVICE.
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The data is now in kernel space, copied in/out as appropriate according to the
This results in DRM_COPY_{TO,FROM}_USER going away, and error paths to deal
with those failures. This also means that XFree86 4.2.0 support for i810 DRM
is lost.
2007-07-20 18:16:42 -07:00
c1119b1b09
Replace filp in ioctl arguments with drm_file *file_priv.
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As a fallout, replace filp storage with file_priv storage for "unique
identifier of a client" all over the DRM. There is a 1:1 mapping, so this
should be a noop. This could be a minor performance improvement, as everything
on Linux dereferenced filp to get file_priv anyway, while only the mmap ioctls
went the other direction.
2007-07-20 13:39:45 -07:00
Alex Deucher
Dave Airlie
Kristian Høgsberg
Dave Airlie
Jerome Glisse
Alex Deucher
Dennis Kasprzyk
Alex Deucher
Alex Deucher
Alex Deucher
Maciej Cencora
Márton Németh
Robert Noland
Dave Airlie
Eric Anholt