Dave Airlie
2a78ad2264
i915: fix vbl swap for multi-master
...
patch from F9 tree
2008-05-08 16:14:33 +10:00
Dave Airlie
ed072ed075
drm_mode: initial replacefb implemenation
2008-05-08 14:02:05 +10:00
Dave Airlie
ef204fb5c2
Merge remote branch 'origin/master' into modesetting-101
...
Conflicts:
linux-core/Makefile.kernel
shared-core/i915_drv.h
2008-05-08 10:25:01 +10:00
Dave Airlie
d015219bd0
r500: add allowed range for us config/pixsize
2008-05-05 17:03:27 +10:00
Ben Skeggs
3ac74f3208
nv50: enable 0x400500 bit 0 after PGRAPH exception also
...
No solid idea about what these 2 bits do, but nv50 can now survive a few
PGRAPH exceptions just as nv40 does :)
2008-05-02 01:36:30 +10:00
Ben Skeggs
6d8062ac1e
nouveau: guard against channels potentially not having a context, fix nv50
2008-05-02 01:36:08 +10:00
Ben Skeggs
77d20928b3
nouveau: disable all card interrupts when unknown PFIFO IRQ occurs.
...
This is possibly temporary. I can trigger an unending IRQ storm on G8x
in some circumstances, and have no idea how to handle that particular PFIFO
exception correctly yet.
2008-05-02 00:53:42 +10:00
Ben Skeggs
5c4c778c0d
nouveau: restore original NV_PFIFO_CACHES_REASSIGN value in fifo handler
...
Doesn't fix any issue I've seen, but is a potential issue if a FIFO IRQ
occurs during channel creation/takedown.
2008-05-02 00:52:21 +10:00
Ben Skeggs
bfbe4ade32
nouveau: gather nsource in trap_info()
...
The IRQ handling stuff really is a mess.. On the TODO :)
2008-05-02 00:51:00 +10:00
Ben Skeggs
e317dfdabf
nv50: PGRAPH exception handling completely different from earlier chips
2008-05-02 00:06:22 +10:00
Ben Skeggs
b92efd5956
nv50: I cave... Add nv84 initial context values.
...
I swore I'd actually do this properly and not go the horrible route
we did with nv4x, but I won't get around to it just yet with so many
*actually* interesting things to do first.. One day.
Since someone already added nv86, why not!
2008-05-01 23:50:44 +10:00
Jesse Barnes
cb33133ef3
i915: fix off by one in VGA save/restore of AR & CR regs
...
Turns out it's important to save/restore AR14 in particular.
2008-04-29 12:39:38 -07:00
Maarten Maathuis
f31e04a960
nouveau: NV9x cards exist as well.
2008-04-29 19:34:22 +02:00
Thomas Hellstrom
7f269bec7e
Merge branch 'master' into modesetting-101
...
Conflicts:
linux-core/Makefile.kernel
linux-core/drm_compat.c
linux-core/drm_fops.c
linux-core/drm_lock.c
shared-core/drm.h
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
2008-04-28 12:10:44 +02:00
Jesse Barnes
7f8e406085
Use fixed sized types in new ioctls
...
Make both crtc and the command argument 32 bits to avoid any 32-on-64 compat
issues.
2008-04-27 09:42:17 -07:00
Jesse Barnes
b45fe49bcd
Enum-ectomy of vblank modesetting ioctl
...
Enum can be of pretty much any size since C leaves the choice of size up to the implementation. So avoid using it in new interfaces like the vblank pre- & post-modeset ioctl. Thanks to hch for spotting this.
2008-04-26 17:11:18 -07:00
Kristian Høgsberg
33fa02f2d8
Make radeon_ms compile.
...
Remove lock functions and use pci_map_rom() instead of pci_map_rom_copy().
2008-04-23 12:42:26 -04:00
Xiang, Haihao
feff72929e
i915: fix for compatibility mode
2008-04-23 17:17:16 +08:00
Jesse Barnes
8dc4d4fa1f
i915: allocate devname at init time
...
Since it'll be freed at unload time, we should alloc devname rather than
pointing to the DRIVER_NAME string.
2008-04-22 18:41:28 -07:00
Hong Liu
8a390e058f
clear interrupt status before install irq
...
On my 865G machine, it seems the CPU will receive interrupt before
irq_postinstall is called. This will cause kernel oops because vblank is not
inited at that time. Clear interrupt status before install seems fixing this
problem.
Signed-off-by: Hong Liu <hong.liu@intel.com>
2008-04-22 18:34:11 -07:00
Dave Airlie
ce8c842518
i915: gfx hw and i945gme fixes from upstream
...
From Jesse and Zhenyu originally.
2008-04-22 16:08:17 +10:00
Keith Packard
f0e38f5217
[I915] Handle tiled buffers in vblank tasklet
...
The vblank tasklet update code must build 2D blt commands with the
appropriate tiled flags.
2008-04-20 16:10:05 -07:00
Keith Packard
21dbba5a22
On I965, use correct 3DSTATE_DRAWING_RECTANGLE command in vblank
...
The batchbuffer submission paths were fixed to use the 965-specific command,
but the vblank tasklet was not. When the older version is sent, the 965 will
lock up.
2008-04-20 01:56:02 -07:00
Hong Liu
21a93915d8
Porting DVO stuff
...
Ported from Xorg intel 2d driver. Changed interfaces definitions, which needed
to be changed later if other device wants to use these DVO stuff.
2008-04-17 11:43:28 -07:00
Keith Packard
b986d7d2c9
Save and restore dsparb and d_state regs
2008-04-11 20:31:07 -07:00
Jerome Glisse
6cc2d7e7ae
Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
2008-04-12 00:15:47 +02:00
Jerome Glisse
5891b0bd2a
radeon_ms: rework command submission ioctl & cleanup
2008-04-12 00:15:12 +02:00
Jesse Barnes
386ea38b8e
Add TV out hotplug detection
...
Doesn't yet work on my i915 test machine, but most of the necessary bits
should be there.
2008-04-09 14:13:38 -07:00
Jesse Barnes
e3c7a0fcb0
Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
2008-04-08 12:48:41 -07:00
Jesse Barnes
a2edd07f20
Add devname in modeset case
...
If the driver is 'modeset' enabled, it'll register it's interrupt
handler at load time. Set the devname in this case so that
/proc/interrupts makes sense.
2008-04-08 12:44:52 -07:00
Jerome Glisse
779e826c1e
radeon_ms: command buffer validation use array of function pointer
2008-04-08 02:18:14 +02:00
Jerome Glisse
060e725a0e
radeon_ms: fix framebuffer code
2008-04-06 19:23:20 +02:00
Jerome Glisse
91bfd69745
radeon_ms: check for NULL fb
2008-04-06 19:01:31 +02:00
Maarten Maathuis
1692d30cea
nv50: primitive i2c interrupt handler
2008-04-05 21:02:00 +02:00
Jerome Glisse
dfc8d2b2fe
radeon_ms: add crtc set base callback & fix palette
2008-04-03 03:15:47 +02:00
Maarten Maathuis
3fc444a5e8
nv50: primitive display interrupt handler.
2008-04-03 01:13:31 +02:00
Jerome Glisse
9600423458
radeon_ms: small fix & cleanup to command checking
2008-03-31 21:50:02 +02:00
Dave Airlie
562f95ea96
nouveau: fix return from function..
...
dude kernel moduless use kernel errors :)
this fixes an oops on init when this codepath hits.
2008-03-31 11:34:48 +10:00
Jerome Glisse
09e637848a
radeon_ms: initial pass at command buffer validation
2008-03-31 00:55:05 +02:00
Maarten Maathuis
cf3c0123a0
nouveau: forgot to add a break
2008-03-30 14:50:41 +02:00
Maarten Maathuis
68b83a8813
nouveau: Add ctx values for nv86.
...
- Note that this may not work for all nv86.
2008-03-30 14:48:55 +02:00
Jerome Glisse
2d9eccfd05
radeon_ms: add hang debuging helper functions
2008-03-30 12:50:26 +02:00
Dave Airlie
753a4bdf1b
drm/r300: fix wait interface mixup
...
This interface was defined completely wrong, however userspace has only
ever used 4 values from it (0x1, 0x2, 0x3 and 0x6), so fix the interface to do what userspace actually expected but define new defines for new users to use
it properly.
2008-03-30 07:33:39 +10:00
Oliver McFadden
1674d28179
r300: Correctly translate the value for the R300_CMD_WAIT command.
...
Previously, the R300_CMD_WAIT command would write the passed directly to the
hardware. However this is incorrect because the R300_WAIT_* values used are
internal interface values that do not map directly to the hardware.
The new function I have added translates the R300_WAIT_* values into appropriate
values for the hardware before writing the register.
Thanks to John Bridgman for pointing this out. :-)
2008-03-29 17:31:39 +00:00
Jerome Glisse
0da289bafd
radeon_ms: this is a modesetting driver, bring things up to date
2008-03-27 20:08:37 +01:00
Stuart Bennett
a81d07f64d
nouveau: nv20 bios does not initialise PTIMER
...
The wait functions depend on PTIMER, so write the old (incorrect, but working) values for uninitialised hw
2008-03-25 18:32:26 +00:00
Dave Airlie
b0817a42e7
i915: fix oops on agp=off
...
Kernel bug 10289.
2008-03-24 18:52:26 +10:00
Dave Airlie
4323ee3e5b
Merge branch 'r500-fp'
2008-03-24 18:47:50 +10:00
Ben Skeggs
24ba0c9c3b
nv40: voodoo - not quite.
2008-03-24 03:26:34 +11:00
Ben Skeggs
6f4b3de284
nv40: allocate massive amount of PRAMIN for grctx on all chipsets.
...
More or less a workaround for issues on some chipsets where a context
switch results in critical data in PRAMIN being overwritten by the GPU.
The correct fix is known, but may take some time before it's a feasible
option.
2008-03-24 03:26:30 +11:00
Dave Airlie
36e11dd380
r500: fragment program upload is also used to upload constants.
...
Limit frag address to 8 bits
2008-03-21 16:59:52 +10:00
Jerome Glisse
71b66b0043
Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
2008-03-20 17:44:32 +01:00
Jerome Glisse
6ef119abf5
radeon_ms: fix fence
2008-03-20 17:43:43 +01:00
Dave Airlie
316979356f
drm: fixup r500fp submission
2008-03-20 14:20:53 +10:00
Stuart Bennett
1021799b6c
nouveau: do not set on-board timer's numerator/denominator to bad values
2008-03-20 02:57:58 +00:00
Alex Deucher
9e4f908287
RADEON: switch over to new production microcode
...
This needs to be tested thoroughly before pushing to the
kernel.
2008-03-19 15:37:56 -04:00
Alex Deucher
d8af16d2a7
RADEON: production microcode for all radeons, r1xx-r6xx
...
This updated microcode is not in use yet.
2008-03-19 14:57:42 -04:00
Dave Airlie
a3c808d8fe
move some more r300 regs into not allowed on r500
2008-03-19 16:10:37 +10:00
Dave Airlie
d18c2c6842
drm: add new rs690 pci id
2008-03-18 09:07:45 +10:00
Dave Airlie
607964ed9e
drm: add master set/drop protocol
...
this may not survive long - just need something for testing
2008-03-17 16:38:20 +10:00
Dave Airlie
2d0411cb75
i915: safety check the sarea map still exists
2008-03-17 16:38:18 +10:00
Dave Airlie
3add949403
initial r500 RS and FP register and upload code
2008-03-17 11:08:03 +10:00
Dave Airlie
1f96e9a982
drm/pcigart: fix the pci gart to use the drm_pci wrapper.
...
This is the correct fix for the RS690 and hopefully the dma coherent work.
For now we limit everybody to a 32-bit DMA mask but it is possible for
RS690 to use a 40-bit DMA mask for the GART table itself,
and the PCIE cards can use 40-bits for the table entries.
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-03-17 07:05:46 +10:00
Thomas Hellstrom
1a2d8c4bfa
Avoid unnecessary waits for command regulator pause.
2008-03-16 20:07:14 +01:00
Thomas Hellstrom
3a3a9485aa
[via] Remove some leftover vars.
2008-03-16 11:45:58 +01:00
Thomas Hellstrom
7d3d15e67d
[via] The millionth fixup for the millionth-1 attempt to stabilize the AGP
...
DMA command submission. It's worth remembering that all new bright ideas on how
to make this command reader work properly and according to docs
will probably fail :( Bring in some old code.
2008-03-16 11:45:57 +01:00
Thomas Hellstrom
563fe9dcd4
[via] Fix driver after vblank-rework merge.
2008-03-16 11:45:57 +01:00
Dave Airlie
5b1d9263d3
drm/rs690: set AGP_BASE_2 to 0
2008-03-16 14:00:16 +10:00
Dave Airlie
dd9eb923ed
drm: set rs690 gart base completly.
...
The docs state bits 4-11 represent bits 32-39 of a 40-bit address
2008-03-16 12:58:07 +10:00
Alex Deucher
9be916f353
Fix chip family for RV550
2008-03-12 11:16:12 -04:00
Ben Skeggs
1766e1c07b
nv50: force channel vram access through vm
...
If we ever want to be able to use the 3D engine we have no choice. It
appears that the tiling setup (required for 3D on G8x) is in the page tables.
The immediate benefit of this change however is that it's now not possible
for a client to use the GPU to render over the top of important engine setup
tables, which also live in VRAM.
G8x VRAM size is limited to 512MiB at the moment, as we use a 1-1 mapping
of real vram pages to their offset within the start of a channel's VRAM
DMA object and only populate a single PDE for VRAM use.
2008-03-13 00:23:52 +11:00
Thomas Hellstrom
88bd1e4a35
Merge branch 'intel-post-reloc'
...
Conflicts:
linux-core/drm_compat.c
linux-core/drm_compat.h
linux-core/drm_ttm.c
shared-core/i915_dma.c
Bump driver minor to 13 due to introduction of new
relocation type.
2008-03-12 11:34:29 +01:00
Alan Hourihane
b6dc381fab
Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
...
Conflicts:
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
2008-03-12 10:18:33 +00:00
Thomas Hellstrom
8a18d123f5
Avoid large kmallocs.
2008-03-12 09:49:27 +01:00
Alan Hourihane
cf1a2499ed
global hotplug events happen in the pipe A stat register,
...
they are not pipe A specific. Remove pipe B code.
2008-03-11 21:24:29 +00:00
Alan Hourihane
903d9231d6
Add support for monitor hotplug signals/waits
...
Also adjust i915 irq handling as it follows the 16bit'ism's
of the i8xx series.
2008-03-11 20:30:25 +00:00
Stuart Bennett
f13936f7fc
nouveau: move AGP reset to mem_init_agp
...
Also, power cycle PGRAPH when resetting AGP -- it seems to fix problems encountered by p0g on nv25
2008-03-11 16:45:35 +00:00
Dave Airlie
5a7f4b3074
drm: fix oops on unload.
...
if we are unloading the module, there is no master so therefore no lock
2008-03-11 16:05:26 +10:00
Dave Airlie
52748d1792
drm: hopefully fix cursors on 965
2008-03-11 13:23:33 +10:00
Jerome Glisse
a7e6ca62ad
Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
2008-03-10 23:36:27 +01:00
Jerome Glisse
a7dc4d08b9
rradeon_ms: rework fence code and bring radeon ms up to date
2008-03-10 23:35:07 +01:00
Keith Packard
2848f04861
Switch from PIPE_VBLANK to PIPE_EVENT interrupts.
...
My 965GM gets interrupts stuck when using the old PIPE_VBLANK interrupt.
Switch to the PIPE_EVENT interrupt mechanism, and set the PIPE*STAT
registers to use START_VBLANK on 965 and VBLANK on previous chips.
2008-03-08 00:04:30 -08:00
Dave Airlie
ce3733572e
drm/radeon: check sarea_priv exists
2008-03-08 08:30:30 +10:00
Ben Skeggs
1ccccbd4ce
nouveau: redo channel idle detection
...
Will hopefully work a bit better than previous code, which depended on
knowing the channel's most recent PUT value. Some chips always return
0 on reading these regs, and currently userspace is the only other entity
which knows the value.
2008-03-07 15:18:34 +11:00
Ben Skeggs
cd924de029
nouveau: don't touch NV_USER regs on channel destroy.
...
Not only was this entirely pointless, it actually causes my NV30GL to
die randomly when channels are destroyed.
2008-03-07 15:18:34 +11:00
Dave Airlie
cf28ca4212
actually turn the irq off
2008-03-07 13:03:32 +11:00
Dave Airlie
ccae12a837
I really screwed up that merge somehow
2008-03-07 08:58:24 +10:00
Dave Airlie
48a166af14
woah somehow got these upstream
2008-03-07 08:49:27 +10:00
Dave Airlie
44a2209790
Merge branch 'master' of ../../drm into modesetting-101
...
Conflicts:
shared-core/drm.h
2008-03-06 05:39:07 +10:00
Dave Airlie
d5c0101252
ttm: make sure userspace can't destroy kernel create memory managers
...
this adds something to say the kernel initialised the memory region not
the userspace. and blocks userspace from deallocating kernel areas
2008-03-06 05:37:54 +10:00
Dave Airlie
180c9188f4
drm/ttm: add ioctl to get back memory managed area sized
...
taken from modesetting branch but could be useful outside it.
2008-03-06 05:31:50 +10:00
Dave Airlie
e00dea812d
Merge branch 'master' of ../../drm into modesetting-101
...
Conflicts:
linux-core/drmP.h
linux-core/drm_drv.c
linux-core/drm_proc.c
linux-core/drm_stub.c
linux-core/drm_sysfs.c
2008-03-06 05:26:23 +10:00
Dave Airlie
12574590cd
drm: reorganise minor number handling using code from modesetting branch
...
Rip out the whole head thing and replace it with an idr and drm_minor
structure.
2008-03-06 05:21:50 +10:00
Xiang, Haihao
638353103d
i915: Evict if relocatee buffer is CACHED_MAPPED before
...
writting relocations, otherwise the GPU probably sees some
inconsistent data. Fix fd.o bug#14656
2008-03-05 15:09:17 +08:00
Dave Airlie
4dbf447f43
drm: fixup compat with old x.org drivers
2008-03-05 15:28:38 +10:00
Dave Airlie
43891ff2d0
Merge remote branch 'origin/master' into modesetting-101
...
Conflicts:
linux-core/drm_compat.c
2008-03-05 10:37:02 +10:00
Eric Anholt
a6a2f2c8c4
Clarify when WAIT_LAZY is relevant to users.
2008-03-04 13:45:41 -08:00
Eric Anholt
3332a0add6
Remove unused DRM_FENCE_FLAG_WAIT_IGNORE_SIGNALS.
2008-03-04 13:41:30 -08:00
Zou Nan hai
63fd6f284d
[i915] 2D driver may reset Frame count value, this may lead driver
...
to leap it's vblank count a huge value.
This will stall some applications that switch video mode if vblank_mode is set to a non zero value in drirc.
2008-03-03 14:49:49 +08:00
Alan Hourihane
9c5ba9f5d1
Add FENCE registers to MMIO list
2008-03-02 21:48:40 +00:00