Commit Graph

1322 Commits (35d1b13b4a574faf3a95bf3b7cdd14897ef07f67)

Author SHA1 Message Date
Zhenyu Wang ac6b3780c8 i915: Add chipset id for Intel Integrated Graphics Device
This adds new chipset id in drm.

Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-01-15 13:06:09 -05:00
Jerome Glisse 6ba979ea46 radeon_ms: use radeon connector type insted of drm 2008-01-15 16:01:39 +01:00
Jerome Glisse 20a8e2d30e radeon_ms: cope with lastest drm modesetting change 2008-01-15 14:30:40 +01:00
Jerome Glisse f1f934c8c9 radeon_ms: add rom parsing & adapt code
Add rom (only combios for now) parsing and use informations
retrieve instead of hardcoded table. Shuffle code around a
bit.
2008-01-15 14:17:05 +01:00
Thomas Hellstrom 88c511e49d Properly propagate the user-space fence flags.
This avoids a sync flush when user-space has already programmed
and MI_FLUSH in the batchbuffer.
2008-01-15 10:03:41 +01:00
Stephane Marchesin 269d518008 nouveau: make mem alloc debug a little more verbose. 2008-01-14 03:16:42 +01:00
Ben Skeggs f0b7c45653 nv05: enable ctx/op methods, and ignore patch valid failures.
Yes, I'm quite aware "real" nv04 doesn't support this, hopefully the GPU
will just ignore those PGRAPH_DEBUG_3 bits on that hw.
2008-01-11 12:51:08 +11:00
Stuart Bennett 5f15f317fb nouveau: AGP reset correction - don't touch FW bit 2008-01-08 20:30:21 +00:00
Ben Skeggs 0bfd09f719 nv50: more small changes 2008-01-07 18:56:44 +11:00
Ben Skeggs 942b500e24 nv50: oops, lost some state saving along the way somewhere.
xf86-video-nv will now work again after nouveau.
2008-01-07 18:19:16 +11:00
Ben Skeggs 3d248cd7e4 nv50: hook up timer funcs... 2008-01-07 17:23:31 +11:00
Ben Skeggs 7a4ba7273c nv50: abort on chips without ctx ucode 2008-01-07 17:13:22 +11:00
Ben Skeggs 15f8fd34df nv50: some needed ctx vals 2008-01-07 17:09:00 +11:00
Ben Skeggs 3d3d509dca nv50: some cleanups + small changes 2008-01-07 17:08:59 +11:00
Stephane Marchesin cd19dcef4f Nouveau: ppc oops. 2008-01-07 06:11:33 +01:00
Stephane Marchesin de522ae742 Nouveau: move PPC bios copy to firstopen. 2008-01-07 05:54:37 +01:00
Jeremy Kolb bd5d760a10 nouveau: Add ctx_voodoo for NV86 2008-01-06 10:09:47 -05:00
Xavier Bachelot 30fba69a68 via: add P4M900 pci id.
bug 12108
2008-01-04 16:29:04 +10:00
Dave Airlie 10937cf20b drm: move drm_head to drm_minor and fix up users 2008-01-04 16:12:24 +11:00
Stuart Bennett 71adbfc874 [PATCH] nouveau: reset AGP on init for < nv40
This is necessary for AGP to work after running bios init scripts on nv3x, and
is seen in mmio traces of all cards (nv04-nv4x)

I'm not making the equivalent change to nv40_mc.c, as early cards (6200, 6800gt)
use the 0x000018XX PBUS and later cards use the 0x000880XX PBUS and I don't know
the effects of using the wrong one
2008-01-04 05:08:15 +01:00
Stuart Bennett 381724a35b [PATCH] nouveau: Fix nv20/30 context loading
Don't set the context as valid until it has been loaded
2008-01-04 05:07:35 +01:00
Dave Airlie 78d6649069 mach64: some more minor cleanups 2008-01-03 17:44:04 +10:00
Dave Airlie 97b8c9591c mach64: cleanup some of the macro formatting 2008-01-03 17:10:30 +10:00
Márton Németh 9ab620d661 drm: cleanup DRM_DEBUG() parameters
As DRM_DEBUG macro already prints out the __FUNCTION__ string (see
drivers/char/drm/drmP.h), it is not worth doing this again. At some
other places the ending "\n" was added.

airlied:- I cleaned up a few that this patch missed also
2008-01-03 16:56:04 +10:00
Dave Airlie 5e99b42b04 Merge branch 'r500-support' 2008-01-03 16:05:13 +10:00
Dave Airlie 96a00054be remove duplicate pciids 2008-01-03 16:03:05 +10:00
Keith Packard d1187641d6 Rename inappropriately named 'mask' fields to 'proposed_flags' instead.
Flags pending validation were stored in a misleadingly named field, 'mask'.
As 'mask' is already used to indicate pieces of a flags field which are
changing, it seems better to use a name reflecting the actual purpose of
this field. I chose 'proposed_flags' as they may not actually end up in
'flags', and in an case will be modified when they are moved over.

This affects the API, but not ABI of the user-mode interface.
2007-12-21 12:16:29 -08:00
Jerome Glisse 21b01cd4b5 radeon_ms: update to follow lastest modesetting change 2007-12-20 12:35:54 +01:00
Jerome Glisse d8c94a84b7 radeon_ms: add sarea & install header 2007-12-19 18:27:38 +01:00
Dave Airlie 629231c626 Merge branch 'modesetting-airlied' into modesetting-101 2007-12-18 19:18:21 +11:00
Dave Airlie b13dc383df remove output names 2007-12-18 17:41:20 +11:00
Jakob Bornecrantz ea915c77e1 Fixed build 2007-12-18 02:52:09 +01:00
Jakob Bornecrantz bdbc34e297 Fix and cleanup of Hotplug 2007-12-18 02:21:08 +01:00
Jakob Bornecrantz e239882b1e Modesetting Hotplug 2007-12-18 02:21:08 +01:00
Li Zefan 2db6400396 drm: don't cast a pointer to pointer of list_head
The casting is safe only when the list_head member is the first member of
the structure.
2007-12-17 09:50:45 +10:00
Jesper Juhl 6180dbda20 While reading some code I stumbled across the use of 'err' in
drivers/char/drm/mga_dma.c::mga_do_cleanup_dma() and I think there's a small
problem.

The variable is only used inside #if __OS_HAS_AGP which is fine, but all
that
ever happens is an assignment to the variable - it is never actually used
for
anything.  The variable is nicely initialized to zero which is also what the
return statement at the end of function returns (always at the moment).

It looks to me like that function should be returning 'err' instead of
always
just returning 0.  Here's a patch to do that.

Signed-off-by: Jesper Juhl <jesper.juhl@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-12-17 09:45:03 +10:00
Keith Packard 5f23519b14 Document drm_bo_handle_validate. Match drm_bo_do_validate parameter order.
Document parameters and usage for drm_bo_handle_validate. Change parameter
order to match drm_bo_do_validate (fence_class has been moved to after
flags, hint and mask values). Existing users of this function have been
changed, but out-of-tree users must be modified separately.
2007-12-15 12:10:42 -08:00
Keith Packard b5181d2506 Document drm_bo_do_validate. Remove spurious 'do_wait' parameter.
Add comments about the parameters to drm_bo_do_validate, along
with comments for the DRM_BO_HINT options. Remove the 'do_wait'
parameter as it is duplicated by DRM_BO_HINT_DONT_BLOCK.
2007-12-15 12:10:42 -08:00
Patrice Mandin 449a3b19ff Revert "nouveau: nv30: missing ramin init, does it brake other hw?"
This reverts commit 46235ea459.
2007-12-15 10:25:13 +01:00
Alan Hourihane f62a300547 Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101 2007-12-13 10:41:23 +00:00
Keith Packard 7dcaf0cdbb Make relocation validate client computed values when debugging 2007-12-11 20:23:00 -08:00
Keith Packard 4ec8f58d04 i915: wait for buffer idle before writing relocations
When writing a relocation entry, make sure the target buffer is idle,
otherwise the GPU may see inconsistent data.
2007-12-11 20:23:00 -08:00
Keith Packard 9ee511d786 Bump driver minor for relocation optimzations 2007-12-11 20:23:00 -08:00
Keith Packard 57b9a54eb6 Allow relocation to be skipped when buffers don't move.
One of the costs of superioctl has been the need to perform relocations
inside the kernel. The cost of mapping the buffers to the CPU and writing
data is fairly high, especially if those buffers have been mapped and read
by the GPU.

If we assume that buffers don't move around very often, we can have the
client compute the relocations itself using the previous GPU address. When
that object doesn't move, the kernel can skip computing and writing the
updated data.

Here's a patch which adds a new field to struct drm_bo_info_req called
'presumed_offset', and a new DRM_BO_HINT_PRESUMED_OFFSET that is set when
this field has been filled in by the client.

There are two separate optimizations performed when the presumed_offset is
correct:

 1. i915_exec_reloc checks to see if all previous buffer offsets were guessed
    correctly. If so, there's no need for it to look at *any* of the
    relocations for a buffer. When this happens, it skips the whole
    relocation process, simply returning success.

 2. i915_apply_reloc checks to see if the target buffer offset was guessed
    correctly. If so, it skips mapping the relocatee, computing the
    relocation and writing the value. If no relocations are needed, the
    relocatee should never be mapped to the CPU, and so the kernel shouldn't
    need to wait for any fences to pass.
2007-12-11 20:23:00 -08:00
Dave Airlie 8d2da20233 Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
Conflicts:

	linux-core/drm_drv.c
	shared-core/drm.h
	shared-core/i915_dma.c
2007-12-11 16:58:00 +10:00
Dave Airlie f99dea7db0 modesetting: fixup property setting and add connector property 2007-12-11 15:56:48 +10:00
Dave Airlie 3b6786e3e6 modesetting: add dpms property and initial settable property ioctl 2007-12-11 14:46:51 +10:00
Dave Airlie 814f695135 Merge branch 'master' into r500-support 2007-12-10 15:53:59 +10:00
José Fonseca 7d08b816b7 mach64: comment bus master / ring buffer behavior and security 2007-12-08 19:23:18 +00:00
Jerome Glisse 9d064966d8 radeon_ms: fix pll computation to follow hw constraint 2007-12-08 00:45:33 +01:00
Jesse Barnes bfc29606e4 Fix pipe<->plane mapping vs. vblank handling (again)
If drmMinor >= 6, the intel DDX driver will enable vblank events on both
pipes.  If drmMinor >= 10 on pre-965 chipsets, the intel DDX driver will
swap the pipe<->plane mapping to allow for framebuffer compression on
laptop screens.  This means the secondary vblank counter (corresponding
to pipe B) will be incremented when vblank interrupts occur.

Now Mesa waits for vblank events on whichever plane has a greater
portion of the displayed window.  So it will happly ask to wait for the
primary counter even though that one won't increment.

So we can fix this in either the DDX driver, Mesa or the kernel (though
I thought we already had several times).

Since current (and previous) userspace assumes it's talking about a pipe
== plane situation and now uses planes when talking to the kernel, we
should probably just hide the mapping details there (indeed they already
are hidden there for vblank swaps), which this patch does.

So as far as userland is concerned, whether we call things planes or
pipes is irrelevant, as long as kernel developers understand that
userland hands them planes and they have to figure out which pipe that
corresponds to (which will typically be the same on 965+ hardware and
reversed on pre-965 mobile chips).
2007-12-07 14:24:45 -08:00
Jerome Glisse a39560e767 radeon_ms: update to lastest fb change 2007-12-06 23:19:52 +01:00
Jerome Glisse 931b4a84a0 Merge commit 'origin/modesetting-101' into modesetting-radeon 2007-12-06 22:42:17 +01:00
Jerome Glisse 3a51a8077b radeon_ms: avoid to unintialize things which haven't been initialized 2007-12-06 22:38:44 +01:00
Dave Airlie 67f6eb1eb8 add property blobs and edid reporting support 2007-12-06 10:44:51 +10:00
José Fonseca a64a4373e8 mach64: make buffer emission macros normal functions 2007-12-05 22:54:10 +00:00
José Fonseca 46ecd12c07 mach64: use utf-8 2007-12-05 22:54:10 +00:00
Kristian Høgsberg e38749ebe5 Remove references to the sarea_priv perf_boxes field.
This field isn't touched or read by any other code in the stack so it's
time to retire these last few references.
2007-12-05 14:43:22 -05:00
Dave Airlie c9cda51af5 more WIP on blobs..
I'm going to pass back a list of blob ids and lengths in the getproperty.
will need another ioctl to return the blob data as it is variable length.
2007-12-05 16:31:35 +10:00
Dave Airlie 1a6c95ef71 arrgggh.. make all ioctl structs 32/64-bit compatible hopefully.
This also starts to add blob property support.

someone needs to check this work for other things like ppc/x86 alignment diffs
2007-12-05 16:03:05 +10:00
Jerome Glisse 34797ff67c radeon_ms: radeon modesetting first commit.
This should work on all radeon but there is still many things todo:
    - add crtc2
    - tmds
    - lvds
    - add bios data table so we don't need to hardcode dac/crtc infos
    - separate clock control to make power saving easier & cleaner
    - tiling (warning tiling shouldn't be enable in double scan or interlace)
    - surface reg manager (this goes along with tiling)
    - suspend/resume hook
    - avivo & r500 family support
    - atom bios support (for posting card mostly)
    - finish superioctl skeleton
    - what else ? :)
2007-12-04 23:03:12 +01:00
Dave Airlie 96df9b11ad finish of mode add/remove, just have attach/detach modes 2007-12-03 15:30:05 +10:00
Dave Airlie 91cd3e3c09 modesetting API change for removing mode ids and making modes per output.
so really want to get a list of modes per output not the global hammer list.
also we remove the mode ids and let the user pass back the full mode description

need to fix up add/remove mode for user modes now
2007-12-03 15:30:05 +10:00
Robert Noland 690dd04d1b bsd: Replace other occurrences of msleep with mtx_sleep 2007-12-02 01:45:09 -05:00
Robert Noland b2f8368b57 Clarify order of operations 2007-12-01 14:44:30 -05:00
Robert Noland 453a295c82 DRM_DEBUG already prints the function name. 2007-12-01 14:44:29 -05:00
Robert Noland d6295cc9ff drm: Add _DRM_DRIVER map flag.
This flag indicates that the driver is responsible for the map.
2007-12-01 02:40:13 -05:00
Maarten Maathuis 887b920a7f nouveau: Properly identify NV40 and NV44 generation. 2007-11-30 22:50:34 +01:00
Jiri Slaby 309b2c4c05 Beside the emitted warning, the added cast (u64 -> unsigned) strips out
part of address on 64 bit. Cast to unsigned long instead.

Signed-off-by: Jiri Slaby <jirislaby@gmail.com>
2007-11-29 09:55:38 +10:00
Dave Airlie dc338921f9 drm: more cleanups 2007-11-29 09:38:21 +10:00
Dave Airlie e9fa8fe734 i965: oops force mi batchbuffer start 2007-11-28 22:46:06 +10:00
Dave Airlie b3af2b59a7 drm/modesetting: add initial gettable properites code.
This allow the user to retrieve a list of properties for an output.
Properties can either be 32-bit values or an enum with an associated name.
Range properties are to be supported.

This API is probably not all correct, I may make properties part of the general
resource get when I think about it some more.

So basically you can create properties and attached them to whatever outputs you want,
so it should be possible to create some generics and just attach them to every output.
2007-11-27 14:31:02 +10:00
Dave Airlie e51b3c8ff4 r500: add a bunch of all r5xx pci ids..
fix up a range that may be needed for r500 mesa
2007-11-27 08:43:14 +10:00
Dave Airlie a20587e395 Merge branch 'origin' into modesetting-101
Conflicts:

	linux-core/drmP.h
	shared-core/i915_dma.c
	shared-core/i915_drm.h
	shared-core/radeon_drv.h
2007-11-22 17:17:06 +11:00
Dave Airlie 5dc5c36e62 drm: major whitespace/coding style realignment with kernel 2007-11-22 16:10:36 +10:00
Dave Airlie 6ff4a70a2b i915: add context handle to superioctl struct
This will be used later for lockless operation.
2007-11-22 09:18:28 +10:00
Dave Airlie 66079b91f3 r500: add pci id for X1650 2007-11-22 08:15:12 +10:00
Dave Airlie 5ec64d4a30 r500: suggestion from glisse to not add cliprect offset on r5xx 2007-11-21 13:02:19 +10:00
Dave Airlie dc0ec76d60 radeon: add initial r5xx support 2007-11-20 08:44:33 +10:00
Eric Anholt 3fc3fc082a Fix capitalization of __linux__ define. 2007-11-19 08:41:23 -08:00
Robert Noland a74181ddb2 Bug #13233: Fix build on FreeBSD. 2007-11-18 22:42:40 -08:00
Dave Airlie a90510966e radeon: refactor out the fb/agp location read/write.
Add a new get param to get the fb location into userspace. Mesa currently
hits MMIO to do this, but this isn't always possible.
2007-11-18 19:25:31 +10:00
Stephane Marchesin 307fc3c92c nouveau: also mention the number of succcessfully copied bios bytes. 2007-11-16 15:02:47 +01:00
Stephane Marchesin baf5d20297 nouveau: be verbose about PPC bios for now. 2007-11-15 20:42:38 +01:00
Stephane Marchesin 9b2a95bc6c nouveau: revert the nv34 context size change, it was not the culprit after all. 2007-11-15 18:01:26 +01:00
Stephane Marchesin 3c998d8fcb nouveau: use get_property instead of of_get_property on pre-2.6.22 kernels. 2007-11-15 16:00:54 +01:00
Dave Airlie 2520d3fd99 modes: pass type to userspace for preferred showing 2007-11-15 16:52:04 +11:00
Dave Airlie f0fe478c15 Merge branch 'master' into modesetting-101
Conflicts:

	shared-core/i915_dma.c
	tests/ttmtest/src/ttmtest.c
2007-11-15 15:04:19 +11:00
Stephane Marchesin 2cf7ad0d9b nouveau: Copy the PPC bios to RAMIN on init, that lets us do proper output detection in user space. 2007-11-15 03:44:01 +01:00
Dave Airlie 2eee33ace5 intel: add flushing for i8xx chipsets.
Add a nut vs hammer style chipset flush for the i8xx chipsets - reenable TTM
code paths
2007-11-15 13:29:55 +11:00
Patrice Mandin 46235ea459 nouveau: nv30: missing ramin init, does it brake other hw? 2007-11-14 23:32:43 +01:00
Kristian Høgsberg 68cdcda1ea Add new shared header file drm_internal.h.
This header file is shared across linux and bsd, but is not installed
for user space to access.  It's the place to put prototypes and data
types that aren't platform or chipset specific, but still internal to
the drm.
2007-11-14 14:28:34 -05:00
Stephane Marchesin 448ccf13ba nouveau: adjust the size of the NV34 context. That fixes mobile PPC cards. 2007-11-14 02:59:00 +01:00
Ben Skeggs 2d7eb4434f nouveau: Also wait until CACHE1 gets emptied. 2007-11-14 05:36:20 +11:00
Ben Skeggs 7e4bb6099a Revert "nouveau: stub superioctl"
This reverts commit 2370ded79b.

Err.. didn't mean for that to slip in :)
2007-11-14 05:11:11 +11:00
Ben Skeggs eb5487b9ca Merge branch 'fifo-cleanup' into upstream-master 2007-11-14 05:09:07 +11:00
Ben Skeggs 7c1e59fb0c nouveau: Attempt to wait for channel idle before we destroy it. 2007-11-14 04:26:49 +11:00
Ben Skeggs 53ab6026cf nouveau: Use "new" NV40 USER control regs.
Probably entirely pointless, but a simple change in any case.
2007-11-14 04:15:13 +11:00
Ben Skeggs 7246a33dd1 nouveau: store user control reg offsets in channel struct 2007-11-14 04:09:53 +11:00
Ben Skeggs d0904f0f2b nouveau: funcs to determine active channel on PFIFO. 2007-11-14 03:27:37 +11:00