Commit Graph

3739 Commits (3e02f7fd310ae062d250d8db01ddc3b7de3d7943)

Author SHA1 Message Date
Eric Anholt 7dced2f33a [gem] Hold dev->struct_mutex to protect structure data. 2008-05-15 18:45:23 -07:00
Eric Anholt 3ab152da66 [gem] Rename the GTT LRU lists to active (executing) and inactive (idle). 2008-05-15 11:59:58 -07:00
Eric Anholt aafafe507b [gem] typo fix in comment. 2008-05-15 11:59:57 -07:00
Dave Airlie a09c0bbe11 ati_pcigart: oops wrong way around not that it actually mattered 2008-05-14 22:48:12 +10:00
Dave Airlie 4c6ec02eb8 ati_pcigart: stop working in the evenings you mess up too often 2008-05-14 22:44:22 +10:00
Dave Airlie 2712cdeec3 Revert "ati_pcigart: fixup properly this version might even work"
This reverts commit bc0836e12a.

tree has some kref hacks in it - oops
2008-05-14 22:43:28 +10:00
Dave Airlie bc0836e12a ati_pcigart: fixup properly this version might even work 2008-05-14 22:42:21 +10:00
Dave Airlie dd1f33f83c ati_pcigart: fill out 40-bit gart table support properly
Thanks to Alex for supplying this info.
2008-05-14 22:35:32 +10:00
Alex Deucher caace3692f RS4xx: separate out RS400 and RS480 IGP chips
RS400 (intel based IGP) and RS480 (AMD based IGP) have
different MC and GART setups.  Currently we only support
RS480.
2008-05-13 21:02:17 -04:00
Jesse Barnes e4f29968f4 Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101 2008-05-13 14:47:17 -07:00
Jesse Barnes ee631e1b86 i915: register definition & header file cleanup
It would be nice if one day the DRM driver was the canonical source for
register definitions and core macros.  To that end, this patch cleans
things up quite a bit, removing redundant definitions (some with
different names referring to the same register) and generally tidying up
the header file.
2008-05-13 14:44:17 -07:00
Jakob Bornecrantz 5be53a0881 i915: execbuf now works without i915_dma_init being called 2008-05-13 09:26:26 +02:00
Jesse Barnes d32ce7f621 i915: TV hotplug fixes
In order to avoid recursive ->detect->interrupt->detect->interrupt->...
we need to disable TV hotplug interrupts in
intel_tv.c:intel_tv_detect_type.  We also need to enable the TV interrupt
detection and hotplug sequence properly in i915_irq.c.
2008-05-12 15:47:19 -07:00
Eric Anholt 6e46a3c762 [GEM] Update testcases for new API. 2008-05-12 15:42:20 -07:00
Eric Anholt f650d7240a [GEM] Typo (and thinking) fixes in drm-gem.txt and doxygen. 2008-05-12 13:17:01 -07:00
Keith Packard 17e8000ac0 [intel] Minor kludge -- wait for the ring to be nearly empty before queuing
No need to fill the ring that much; wait for it to become nearly empty
before adding the execbuffer request. A better fix will involve scheduling
ring insertion in the irq handler.
2008-05-12 13:04:18 -07:00
Keith Packard 7e7ea313c4 [intel] When polling for ring space, sleep for a lot longer (10ms)
If the ring is full, the engine will surely be running for more than 10ms.
2008-05-12 13:03:16 -07:00
Keith Packard 6aeff6b9e3 [gem] Set write domain to CPU when doing pwrite.
Leave the flush call in place, which can fix domains up if necessary.
2008-05-12 13:01:57 -07:00
Keith Packard 6950b7da71 [gem] Clarify use of explicit domain control. Remove Gen3 from I-cache usage. 2008-05-12 13:00:55 -07:00
Hong Liu a51e38548c fix kernel oops when removing fb
drm_crtc->fb may point to NULL, f.e X server will allocate a new fb
and assign it to the CRTC at startup, when X server exits, it will destroy
the allocated fb, making drm_crtc->fb points to NULL.
2008-05-12 12:31:56 -07:00
Hong Liu b2dee13f5d free dummy read page if fail to init mm
Since drm_bo_driver_init will be called in driver_load, we need to free
what it alloced when error to avoid memory leak.
2008-05-12 12:07:27 -07:00
Hong Liu f1b9bbe2b8 modeset init code cleanup
moving modeset init code into one function and correct error
handling druing i915 init
2008-05-12 12:07:04 -07:00
Hong Liu af60d87869 fix G33 hardware status page in modeset
We need to alloc a hw status page bo for G33 if modeset is enabled since the 2D
driver can't alloc gfx memory when working in drm modeset.
2008-05-12 12:04:02 -07:00
Alex Deucher 10d754f0a2 RADEON: fix copy/pasto in last commit 2008-05-12 14:49:43 -04:00
Alex Deucher 75bc739bee R3/4/5: init pipe setup in drm
Similar (broken) code in mesa needs to be removed
2008-05-12 09:44:20 -04:00
Alex Deucher e16a7101e8 RADEON: cleanup radeon_do_engine_reset() 2008-05-12 09:35:06 -04:00
Alex Deucher 5532b8d2a0 R300+: fixup pixcache flush 2008-05-12 09:30:47 -04:00
Alex Deucher 3582e82f14 RS4xx: fix MCIND index mask 2008-05-12 09:24:13 -04:00
Alex Deucher d26af273f8 RADEON: write AGP_BASE_2 on chips that support it 2008-05-12 09:21:45 -04:00
Alex Deucher c307e50724 R300+: fixup PURGE/FLUSH macros 2008-05-12 09:18:28 -04:00
Alex Deucher fb9eaff747 Radeon IGP: merge RS4xx/RS6xx gart setup 2008-05-12 09:13:44 -04:00
Alex Deucher 68b7f550ba Radeon IGP: wrap MCIND access
first step in merging rs4xx/rs6xx gart setup
2008-05-12 09:00:40 -04:00
Alex Deucher a34025ce22 Radeon IGP: clean up registers and magic numbers 2008-05-12 08:56:11 -04:00
Dave Airlie 3f66a0005c drm: remove root only from a lot of drm ioctls to get stuff running as non-root 2008-05-12 16:29:22 +10:00
Dave Airlie 1eedeed091 drm: masters are always authenticated 2008-05-12 16:28:58 +10:00
Dave Airlie 8f7fc880e8 drm: fix oops on reading proc file with no master 2008-05-12 16:28:40 +10:00
Keith Packard ff39db099b [GEM] Make pread/pwrite manage memory domains. No luck with movnti though.
pread and pwrite must update the memory domains to ensure consistency with
the GPU. At some point, it should be possible to avoid clflush through this
path, but that isn't working for me.
2008-05-11 00:10:16 -07:00
Keith Packard 1b0bf30143 [intel-GEM] exec list can contain pinned, lru cannot.
The exec list contains all objects, in order of use. The lru list contains
only unpinned objects ready to be evicted. This required two changes -- the
first was to not migrate pinned objects from exec to lru, the second was to
search for the first unpinned object in the exec list when doing eviction.
2008-05-10 22:04:39 -07:00
Keith Packard 1f9eaceb71 Merge commit 'anholt/drm-gem' into drm-gem 2008-05-10 21:05:25 -07:00
Keith Packard 177b8b0703 [GEM] Add drm-gem.txt
Add some API and implementation documentation for GEM.
2008-05-10 21:04:42 -07:00
Keith Packard a37ac493da [intel-GEM] Clean up GEM ioctl naming.
Rename 'validate_entry' to 'exec_object', then clean up some field names in
structures (renaming buffer_offset to just offset, for example).
2008-05-10 21:04:18 -07:00
Eric Anholt 48a8531aa4 GEM: Fix arguments to drm_memrange_init so we don't exceed our allocation.
It takes (offset, size), not (offset, end).
2008-05-09 18:23:51 -07:00
Eric Anholt c5c59eab80 GEM: Separate the LRU into execution list and LRU list.
Now, the LRU list has objects that are completely done rendering and ready
to kick out, while the execution list has things with active rendering,
which have associated cookies and reference counts on them.
2008-05-09 17:38:32 -07:00
Eric Anholt f56f2acb5a GEM: Clear obj_priv->agp_mem when we free it.
Still managing to get something wrong with this, oopsing down in agp.
2008-05-09 15:07:49 -07:00
Eric Anholt f0ae335cd7 GEM: Avoid leaking refs on target objects on presumed offset success. 2008-05-09 15:02:50 -07:00
Hong Liu dce3442194 fixup i915 workqueue handling when modeset=1
Fixup workqueue creation error handling and make sure we destroy the queue on
unload.
2008-05-09 14:29:10 -07:00
Jesse Barnes 6ee0c09b0e i915: use BDB TV flag for TV detection
Even if the TV encoder hasn't been fused off, we may not have a TV connector on
the platform.  The BDB in the BIOS should give us this info in some cases.
2008-05-09 14:19:39 -07:00
Jesse Barnes 12725a37af i915: add basic VBT support
Map the VBIOS (and therefore VBT) at init time for use by various output
initialization routines.
2008-05-09 14:19:00 -07:00
Keith Packard 1e26ca44c9 [gem] API cleanup. allocate->create unreference->close name->flink
Make the API names a bit more consistent.
2008-05-09 12:18:09 -07:00
Alan Hourihane eeff906aa0 Fix build problems 2008-05-09 16:36:28 +01:00