Define two macros to avoid building errors.
Fixes: 7e6bf88cac (amdgpu: move asic id table to a separate file)
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher at amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
since bo_reference and bo_internal_free are
all only used by bo_free, so we just merge them
together
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
there is race issue between two threads on amdgpu_bo_reference and
amdgpu_bo_import, this patch tends to fix it by moving the
pthread_mutex_lock out of bo_free_internal and move to bo_reference
to cover the update_reference part.
The mutex_unlock in bo_import should also cover bo refcount
increasement.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
`ring` cannot be non-null, so the label reduces to a simple return.
Then, there is no point initialising `ring` just to overwrite it before
anyone reads it.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Rob Clark <robdclark@gmail.com>
`pipe` cannot be non-null, so the label reduces to a simple return.
Then, there is no point initialising `pipe` just to overwrite it before
anyone reads it.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
GCC 7 started warning when a switch case has neither a `break` nor
a "fallthrough" comment.
Let's be explicit that we meant to fall through here.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Analogous to previous commit (and the rest of the codebase), simply
discard the device if we cannot parse it.
Fixes: f8484ccbd1 ("xf86drm: Add USB support")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
On ChromeOS devices, readdir() processes the directory in
the following order:
-NAME- -TYPE-
. n/a
.. n/a
vgem n/a
card1 DRM_BUS_PLATFORM
renderD129 DRM_BUS_PLATFORM
card0 DRM_BUS_PCI
renderD128 DRM_BUS_PCI
controlD64 DRM_BUS_PCI
In drmGetDevices2, after drmProcessPlatformDevice fails for
/dev/dri/card1, we don't process the remaining directory entries.
As such, Vulkan fails to initialize since Mesa uses drmGetDevices2.
To fix this, continue if drmProcessPlatformDevice fails.
Fixes: 7b1f37f474 ("xf86drm: Add platform and host1x bus support")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
[Emil: correct the host1x platforms as well]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
This just sends chunks to the kernel API for a single command
stream.
This should provide a more future proof and extensible API
for command submission.
v2: use amdgpu_bo_list_handle, add two helper functions to
access bo and context internals.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
These are just wrappers using the amdgpu device handle.
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
It is safe to submit the full struct even on older kernels as such
kernels do not process the full struct. Without this change it
becomes quite challenging to extned the submit struct.
Freedreno has no special treatment too. See git commits
- freedreno: sync uapi header
- freedreno: add fence fd support
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Philipp Zabel <p.zabel@pengutronix.de>
No functional change. Just organizing the code
so it gets clear for future platforms.
Paulo deserves credits becuase he was the one
that just noticed this IS_9XX was in the wrong position
after CNL patches got introduced.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
As far as I understand, IS_9XX should return true for it.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
By the Spec all CNL Y skus are 2+2, i.e. GT2.
This is a copy of merged i915's
commit 95578277cbdb ("drm/i915/cnl: Add Cannonlake PCI IDs for Y-skus.")
v2: Add kernel commit id for reference.
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Platform enabling and its power-on are organized in different
skus (U x Y x S x H, etc). So instead of organizing it in
GT1 x GT2 x GT3 let's also use the platform sku.
This is a copy of merged i915's
commit e918d79a5d0a ("drm/i915/cnl: Add Cannonlake PCI IDs for U-skus.")
v2: Remove PCI IDs for SKU not mentioned in spec.
v3: Add kernel commit id for reference.
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Add the PCI IDs for U SKU IN CFL by following the spec.
v2: Update IDs
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Add the PCI IDs for H SKU IN CFL by following the spec.
v2: Update IDs
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Add the PCI IDs for S SKU IN CFL by following the spec.
v2: Update IDs.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
These ioctls are now in drm next so add the first set of libdrm APIs.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This syncs the drm.h header with my drm-next branch as of
6d61e70ccc21606ffb8a0a03bd3aba24f659502b.
It brings over the semaphore API changes.
Generated using make headers_install.
Generated from git://people.freedesktop.org/~airlied/linux drm-next commit 6d61e70ccc2.
[airlied: I split patch in two, split reviewed by across both]
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This syncs the amdgpu_drm header with my drm-next branch as of
6d61e70ccc21606ffb8a0a03bd3aba24f659502b.
It brings over the VM and semaphore API changes.
Generated using make headers_install.
Generated from git://people.freedesktop.org/~airlied/linux drm-next commit 6d61e70ccc2.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
v2: fix an off by one error and leading white spaces
v3: use thread safe strtok_r(); initialize len before calling getline();
change printf() to drmMsg(); add initial amdgpu.ids
v4: integrate some recent internal changes, including format changes
v5: fix line number for empty/commented lines; realloc to save memory;
indentation changes
v6: remove a line error
v7: [Michel Dänzer]
* Move amdgpu.ids to new data directory
* Remove placeholder entries from amdgpu.ids
* Set libdrmdatadir variable in configure.ac instead of Makefile.am
[Emil Velikov]
* Use isblank() instead of open-coding it [Emil Velikov]
* Don't leak asic_id_table memory if realloc fails [Emil Velikov]
* Check and bump table_max_size at the beginning of the while loop [Emil
Velikov]
* Initialize table_max_size to the number of entries in data/amdgpu.ids
v8: [Michel Dänzer]
* Make sure amdgpu_asic_id.c gets rebuilt when amdgpu.ids changes
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
The .editorconfig file in the toplevel directory doesn't match.
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
The device_id option [-d] was badly broken. This commit fixes
the width (was 8 is now 16 bits) as well as enables searches
without specifying a bus id. It was also comparing "dev" from
the bus field which is not the PCI device id.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Adds the C++ extern guards from
ebbb0e5cfd2ceb1150b1 drm: add extern C guard for the UAPI headers
Generated using `make headers_install` from airlied/drm-next
at commit 2a1720376adda5ecf8e636fbfb05339c7dad1c55
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
This adds a bunch of modifiers stuff, as well as a few new formats.
Includes the following changes:
ebbb0e5cfd2ceb1150b1 drm: add extern C guard for the UAPI headers
b9fb2a21ac8058965a6b drm_fourcc: Document linear modifier
af913418261d6d3e7a29 drm_fourcc: Fix DRM_FORMAT_MOD_LINEAR #define
fd056f05b9fcba35b77e drm: add fourcc codes for 16bit R and RG
73f1a5858bf82f3bf232 drm/fourcc: add vivante tiled layout format modifiers
ba2b5277dc52cc96944d drm: add RGB formats with separate alpha plane
5e91144dd702d068b22a drm/tegra: Add tiling FB modifiers
Generated using `make headers_install` from airlied/drm-next
at commit 2a1720376adda5ecf8e636fbfb05339c7dad1c55
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
In commit bbe998791d ("Android's major/minor/makedev live in
<sys/sysmacros.h>"), it didn't apply cleanly and I missed the trailing
\, so add it here.
Signed-off-by: Rob Herring <robh@kernel.org>
Chih-Wei Huang
Jan Vesely
Boyuan Zhang
Jason Ekstrand
Monk Liu
Eric Engestrom
Flora Cui
Hawking Zhang
Emil Velikov
Gurchetan Singh
Lucas Stach
Dave Airlie
coypu
Christian Gmeiner
Rodrigo Vivi
Paulo Zanoni
Ben Widawsky
Anusha Srivatsa
Eric Anholt
Xiaojie Yuan
Michel Dänzer
Tom St Denis
Leo Liu
Eric Engestrom
Rob Herring
Elliott Hughes
Marek Olšák