d0904f0f2b
nouveau: funcs to determine active channel on PFIFO.
2007-11-14 03:27:37 +11:00
7f6bf84c23
drm: remove lots of spurious whitespace.
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Kernel "cleanfile" script run.
2007-11-05 12:42:22 +10:00
fb3ed99fb1
nouveau : pgraph_ctx dynamic alloc for nv04, nv10
2007-09-30 14:50:22 +02:00
097db7a9b0
nouveau : nv1x fix strange corruption
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that appears when running glxgears and nouveau demo
2007-09-29 23:07:29 +02:00
72134e939e
nouveau : clean chan->pgraph_ctx stuff. We now do a static init of the array.
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This avoid hardcoding pgraph_ctx size and potential buffer overflow.
2007-09-28 21:29:58 +02:00
0bd8752a0c
nouveau: nv10: add combiner registers
2007-09-10 18:53:48 +02:00
00bb534a54
nouveau : nv10 fix NV10_PGRAPH_CTX_USER save/load
2007-09-09 15:49:33 +02:00
b2ee72f440
nouveau : nv10 pipe ctx switch load/save.
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This fix some issues with more than one 3D fifo, but there still some "corruption" sometimes
2007-09-09 12:13:00 +02:00
a331d2e352
nouveau : add NV04_PGRAPH_TRAPPED_ADDR definition
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- fix offset for nv04
- use it in nv10 graph ctx switch for getting next channel
- dump NV10_PGRAPH_TRAPPED_DATA_HIGH on nv10+
2007-08-26 20:48:32 +02:00
4182fce408
nouveau : nv1x graph reworks
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- add forgotten init value
- use the same PGRAPH_DEBUG than the blob
- remove init of ddx reg : it should be done with object
- better handle of channel destruction
hope I didn't break anything ;)
2007-08-25 22:10:45 +02:00
502bbdbe14
nouveau: nv10: output a warning if last channel invalid, and switch to next
2007-08-25 00:12:58 +02:00
9875011196
nouveau: nv10: check some NULL pointers inside context switch
2007-08-23 10:20:44 +02:00
4ad487190d
nouveau: enable/disable engine-specific interrupts in _init()/_takedown()
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All interrupts are still masked by PMC until init is finished.
2007-08-08 10:49:05 +10:00
beaa0c9a28
nouveau: Pass channel struct around instead of channel id.
2007-08-06 03:40:43 +10:00
2453ba19b6
nouveau:nv10: fill and use load,save graph context functions
2007-08-03 23:06:39 +02:00
0029713451
nouveau: nuke internal typedefs, and drm_device_t use.
2007-07-13 15:09:31 +10:00
c806bba466
nouveau/nv50: Initial channel/object support
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Should be OK on G84 for a single channel, multiple channels *almost* work.
Untested on G80.
2007-07-09 16:16:44 +10:00
5f05cd7086
nouveau: NV04/NV10/NV20 PGRAPH engtab functions
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NV04/NV10 load_context()/save_context() are stubs. I don't know enough about
how they work to implement them sanely. The "old" context_switch() code
remains hooked up, so it shouldn't break anything.
NV20 will probably break if load_context() works. No inital context values
are filled in, so when the first channel is created PGRAPH will probably end
up having its state zeroed. Some setup from nv20_graph_init() will probably
need to be moved to the per-channel context setup.
2007-06-24 19:00:26 +10:00
e9b604ed3f
nouveau : nv10 graph move clipping value to per channel init
2007-05-12 15:36:48 +02:00
5d623935c0
nouveau : nv10 graph clipping values were forgoten in ddx to drm commit
2007-05-12 15:36:48 +02:00
9b7211dd67
nouveau: nv10 per channel init from ddx
2007-04-10 23:20:13 +02:00
25cedcf76f
nouveau : nv10 ctx switch fix
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restoring NV10_PGRAPH_CTX_SWITCH1 now works
2007-04-01 14:21:29 +02:00
223061e084
nouveau : set the correct PGRAPH_CTX_CONTROL register
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"5a072f32 (Stephane Marchesin 2007-02-03 04:57:06 +0100" broke nv10 ctx switch by setting wrong PGRAPH_CTX_CONTROL reg
2007-04-01 00:44:11 +02:00
674cefd4fe
nouveau: move card initialisation into the drm
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The PGRAPH init for the various cards will need cleaning up at some point,
a lot of the values written there are per-context state left over from the
all the hardcoding done in the ddx.
It's possible some cards get broken by this commit, let me know.
Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
2007-03-26 20:59:37 +10:00
d69902db3b
nouveau: fix nv04 graph routines for new register names.
2007-02-03 05:25:36 +01:00
5a072f32c8
nouveau: rename registers to their proper names.
2007-02-03 04:57:06 +01:00
55f7859a25
nouveau: nv ctx switch opps the size of array was wrong
2007-02-02 23:01:03 +01:00
63cf3b3da7
nouveau: nv10 ctx switch, some regs are nv17+ only
2007-02-02 20:08:33 +01:00
ee4ac5c897
nouveau: determine chipset type at startup, instead of every time we use it.
2007-01-28 23:48:33 +11:00
c744bfde2d
make works ctx switch on nv10.
2007-01-26 21:57:44 +01:00
9c03ca81e7
nouveau: oops, wrong indexing in nv17 regs
2007-01-26 21:05:59 +01:00
5534c90ff3
nouveau: read gpu type once
2007-01-26 19:54:35 +01:00
05d3ed472e
nouveau: only save/restore nv17 regs on nv17,18 hw
2007-01-26 19:25:49 +01:00
d4c9f135b5
nouveau: add some nv10 pgraph defines
2007-01-26 18:10:31 +01:00
cd5f543b2f
nouveau: first step to make graph ctx works
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It is still not working, but now we could use some 3D commands
without needed to run nvidia blob before.
2007-01-13 21:44:50 +01:00
Ben Skeggs
Dave Airlie
Matthieu Castet
Patrice Mandin
Stephane Marchesin
Ben Skeggs
Matthieu Castet