Commit Graph

1439 Commits (9d9104ad5fcd2d284a0a87385e9eb1a77adc869e)

Author SHA1 Message Date
Ben Skeggs 6f4b3de284 nv40: allocate massive amount of PRAMIN for grctx on all chipsets.
More or less a workaround for issues on some chipsets where a context
switch results in critical data in PRAMIN being overwritten by the GPU.

The correct fix is known, but may take some time before it's a feasible
option.
2008-03-24 03:26:30 +11:00
Dave Airlie 36e11dd380 r500: fragment program upload is also used to upload constants.
Limit frag address to 8 bits
2008-03-21 16:59:52 +10:00
Jerome Glisse 71b66b0043 Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101 2008-03-20 17:44:32 +01:00
Jerome Glisse 6ef119abf5 radeon_ms: fix fence 2008-03-20 17:43:43 +01:00
Dave Airlie 316979356f drm: fixup r500fp submission 2008-03-20 14:20:53 +10:00
Stuart Bennett 1021799b6c nouveau: do not set on-board timer's numerator/denominator to bad values 2008-03-20 02:57:58 +00:00
Alex Deucher 9e4f908287 RADEON: switch over to new production microcode
This needs to be tested thoroughly before pushing to the
kernel.
2008-03-19 15:37:56 -04:00
Alex Deucher d8af16d2a7 RADEON: production microcode for all radeons, r1xx-r6xx
This updated microcode is not in use yet.
2008-03-19 14:57:42 -04:00
Dave Airlie a3c808d8fe move some more r300 regs into not allowed on r500 2008-03-19 16:10:37 +10:00
Dave Airlie d18c2c6842 drm: add new rs690 pci id 2008-03-18 09:07:45 +10:00
Dave Airlie 607964ed9e drm: add master set/drop protocol
this may not survive long - just need something for testing
2008-03-17 16:38:20 +10:00
Dave Airlie 2d0411cb75 i915: safety check the sarea map still exists 2008-03-17 16:38:18 +10:00
Dave Airlie 3add949403 initial r500 RS and FP register and upload code 2008-03-17 11:08:03 +10:00
Dave Airlie 1f96e9a982 drm/pcigart: fix the pci gart to use the drm_pci wrapper.
This is the correct fix for the RS690 and hopefully the dma coherent work.

For now we limit everybody to a 32-bit DMA mask but it is possible for
RS690 to use a 40-bit DMA mask for the GART table itself,
and the PCIE cards can use 40-bits for the table entries.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-03-17 07:05:46 +10:00
Thomas Hellstrom 1a2d8c4bfa Avoid unnecessary waits for command regulator pause. 2008-03-16 20:07:14 +01:00
Thomas Hellstrom 3a3a9485aa [via] Remove some leftover vars. 2008-03-16 11:45:58 +01:00
Thomas Hellstrom 7d3d15e67d [via] The millionth fixup for the millionth-1 attempt to stabilize the AGP
DMA command submission. It's worth remembering that all new bright ideas on how
to make this command reader work properly and according to docs
will probably fail :( Bring in some old code.
2008-03-16 11:45:57 +01:00
Thomas Hellstrom 563fe9dcd4 [via] Fix driver after vblank-rework merge. 2008-03-16 11:45:57 +01:00
Dave Airlie 5b1d9263d3 drm/rs690: set AGP_BASE_2 to 0 2008-03-16 14:00:16 +10:00
Dave Airlie dd9eb923ed drm: set rs690 gart base completly.
The docs state bits 4-11 represent bits 32-39 of a 40-bit address
2008-03-16 12:58:07 +10:00
Alex Deucher 9be916f353 Fix chip family for RV550 2008-03-12 11:16:12 -04:00
Ben Skeggs 1766e1c07b nv50: force channel vram access through vm
If we ever want to be able to use the 3D engine we have no choice.  It
appears that the tiling setup (required for 3D on G8x) is in the page tables.

The immediate benefit of this change however is that it's now not possible
for a client to use the GPU to render over the top of important engine setup
tables, which also live in VRAM.

G8x VRAM size is limited to 512MiB at the moment, as we use a 1-1 mapping
of real vram pages to their offset within the start of a channel's VRAM
DMA object and only populate a single PDE for VRAM use.
2008-03-13 00:23:52 +11:00
Thomas Hellstrom 88bd1e4a35 Merge branch 'intel-post-reloc'
Conflicts:

	linux-core/drm_compat.c
	linux-core/drm_compat.h
	linux-core/drm_ttm.c
	shared-core/i915_dma.c

Bump driver minor to 13 due to introduction of new
relocation type.
2008-03-12 11:34:29 +01:00
Alan Hourihane b6dc381fab Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
Conflicts:

	shared-core/i915_dma.c
	shared-core/i915_drv.h
	shared-core/i915_irq.c
2008-03-12 10:18:33 +00:00
Thomas Hellstrom 8a18d123f5 Avoid large kmallocs. 2008-03-12 09:49:27 +01:00
Alan Hourihane cf1a2499ed global hotplug events happen in the pipe A stat register,
they are not pipe A specific. Remove pipe B code.
2008-03-11 21:24:29 +00:00
Alan Hourihane 903d9231d6 Add support for monitor hotplug signals/waits
Also adjust i915 irq handling as it follows the 16bit'ism's
of the i8xx series.
2008-03-11 20:30:25 +00:00
Stuart Bennett f13936f7fc nouveau: move AGP reset to mem_init_agp
Also, power cycle PGRAPH when resetting AGP -- it seems to fix problems encountered by p0g on nv25
2008-03-11 16:45:35 +00:00
Dave Airlie 5a7f4b3074 drm: fix oops on unload.
if we are unloading the module, there is no master so therefore no lock
2008-03-11 16:05:26 +10:00
Dave Airlie 52748d1792 drm: hopefully fix cursors on 965 2008-03-11 13:23:33 +10:00
Jerome Glisse a7e6ca62ad Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101 2008-03-10 23:36:27 +01:00
Jerome Glisse a7dc4d08b9 rradeon_ms: rework fence code and bring radeon ms up to date 2008-03-10 23:35:07 +01:00
Keith Packard 2848f04861 Switch from PIPE_VBLANK to PIPE_EVENT interrupts.
My 965GM gets interrupts stuck when using the old PIPE_VBLANK interrupt.
Switch to the PIPE_EVENT interrupt mechanism, and set the PIPE*STAT
registers to use START_VBLANK on 965 and VBLANK on previous chips.
2008-03-08 00:04:30 -08:00
Dave Airlie ce3733572e drm/radeon: check sarea_priv exists 2008-03-08 08:30:30 +10:00
Ben Skeggs 1ccccbd4ce nouveau: redo channel idle detection
Will hopefully work a bit better than previous code, which depended on
knowing the channel's most recent PUT value.  Some chips always return
0 on reading these regs, and currently userspace is the only other entity
which knows the value.
2008-03-07 15:18:34 +11:00
Ben Skeggs cd924de029 nouveau: don't touch NV_USER regs on channel destroy.
Not only was this entirely pointless, it actually causes my NV30GL to
die randomly when channels are destroyed.
2008-03-07 15:18:34 +11:00
Dave Airlie cf28ca4212 actually turn the irq off 2008-03-07 13:03:32 +11:00
Dave Airlie ccae12a837 I really screwed up that merge somehow 2008-03-07 08:58:24 +10:00
Dave Airlie 48a166af14 woah somehow got these upstream 2008-03-07 08:49:27 +10:00
Dave Airlie 44a2209790 Merge branch 'master' of ../../drm into modesetting-101
Conflicts:

	shared-core/drm.h
2008-03-06 05:39:07 +10:00
Dave Airlie d5c0101252 ttm: make sure userspace can't destroy kernel create memory managers
this adds something to say the kernel initialised the memory region not
the userspace. and blocks userspace from deallocating kernel areas
2008-03-06 05:37:54 +10:00
Dave Airlie 180c9188f4 drm/ttm: add ioctl to get back memory managed area sized
taken from modesetting branch but could be useful outside it.
2008-03-06 05:31:50 +10:00
Dave Airlie e00dea812d Merge branch 'master' of ../../drm into modesetting-101
Conflicts:

	linux-core/drmP.h
	linux-core/drm_drv.c
	linux-core/drm_proc.c
	linux-core/drm_stub.c
	linux-core/drm_sysfs.c
2008-03-06 05:26:23 +10:00
Dave Airlie 12574590cd drm: reorganise minor number handling using code from modesetting branch
Rip out the whole head thing and replace it with an idr and drm_minor
structure.
2008-03-06 05:21:50 +10:00
Xiang, Haihao 638353103d i915: Evict if relocatee buffer is CACHED_MAPPED before
writting relocations, otherwise the GPU probably sees some
inconsistent data. Fix fd.o bug#14656
2008-03-05 15:09:17 +08:00
Dave Airlie 4dbf447f43 drm: fixup compat with old x.org drivers 2008-03-05 15:28:38 +10:00
Dave Airlie 43891ff2d0 Merge remote branch 'origin/master' into modesetting-101
Conflicts:

	linux-core/drm_compat.c
2008-03-05 10:37:02 +10:00
Eric Anholt a6a2f2c8c4 Clarify when WAIT_LAZY is relevant to users. 2008-03-04 13:45:41 -08:00
Eric Anholt 3332a0add6 Remove unused DRM_FENCE_FLAG_WAIT_IGNORE_SIGNALS. 2008-03-04 13:41:30 -08:00
Zou Nan hai 63fd6f284d [i915] 2D driver may reset Frame count value, this may lead driver
to leap it's vblank count a huge value.
  This will stall some applications that switch video mode if vblank_mode is set to a non zero value in drirc.
2008-03-03 14:49:49 +08:00
Alan Hourihane 9c5ba9f5d1 Add FENCE registers to MMIO list 2008-03-02 21:48:40 +00:00
Thomas Hellstrom 612c22f131 Working revision. 2008-02-29 15:38:55 +01:00
Thomas Hellstrom 2305100c0f More post-ioctl work. 2008-02-29 13:25:55 +01:00
Dave Airlie 01dcc47d89 drm: add modesetting as a driver feature.
This change adds a driver feature that for i915 is controlled by a module
parameter. You now need to do insmod i915.ko modeset=1 to enable it the
modesetting paths.

It also fixes up lots of X paths. I can run my new DDX driver on this code
with and without modesetting enabled
2008-02-28 16:24:17 +10:00
Thomas Hellstrom fd595fa4dc Reinstate buffer idle before applying relocations. 2008-02-27 21:44:40 +01:00
Thomas Hellstrom 72983ff301 Don't wait for buffer idle before applying relocations. 2008-02-27 19:46:28 +01:00
Jerome Glisse 75c9e0d346 radeon: remove TTM from an earlier merge 2008-02-26 23:30:45 +01:00
Alan Hourihane 1e66322633 Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
Conflicts:

	shared-core/i915_dma.c
2008-02-26 15:42:41 +00:00
Thomas Hellstrom e87cec1968 [i915] Relocation fixes. 2008-02-26 10:47:05 +01:00
Dave Airlie b92e343dc4 i915: fix typos 2008-02-26 16:20:27 +10:00
Dave Airlie 35d1b13b4a i915_mmio: add overlay regs 2008-02-26 16:13:06 +10:00
Thomas Hellstrom 56bb29cf37 Make the execbuffer code reasonably safe against errors.
In particular -EAGAINs, which should be common during Xserver operation.
Also handle the fence creation failure case.
2008-02-26 00:05:26 +01:00
Roland Scheidegger d6098db140 fix texture uploads with large 3d textures (bug 13980)
Texture uploads could hit the blitter coordinate limit, adjust the texture
offset when uploading the pieces. Make sure to check the end address of the
upload too.
2008-02-23 11:01:36 +01:00
Maarten Maathuis 0d32015974 nouveau: Remove some random (french) comment. 2008-02-22 19:28:54 +01:00
Maarten Maathuis 7e5f9c8bd3 nouveau: A single define of dma skips is more than enough. 2008-02-22 19:28:54 +01:00
Kristian Høgsberg b7086e6ae5 Fix one last occurance of struct _drm_i915_batchbuffer.
Thanks to Todd Merrill for pointing it out.
2008-02-22 11:22:52 -05:00
Kristian Høgsberg b0fee67a30 i915: Remove leading underscore from struct tags.
This matches the changes in mesa to use the system drm includes
for the definitions of the drm ioctl structs.
2008-02-22 00:12:39 -05:00
Dave Airlie cdad850ebc add ioctl to get back memory managed area sized - used for kernel inited areas 2008-02-22 13:49:51 +10:00
Alan Hourihane 9d1061b8cf fix SAREA 2008-02-20 22:23:31 +00:00
Alan Hourihane 3f6c8f64aa fix SAREA 2008-02-20 22:22:49 +00:00
Dave Airlie 8844245cfc drm/fb: get rid of offset from structure use bo offset 2008-02-20 11:27:22 +10:00
Dave Airlie 2c409f9a07 ttm: make sure userspace can't destroy kernel create memory managers 2008-02-20 11:27:22 +10:00
Alan Hourihane 8caf6e9571 Fix up conflicts for DRI2 (untested) 2008-02-19 15:17:24 +00:00
Alan Hourihane f24ed2ad6c Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
Conflicts:

	linux-core/i915_fence.c
	linux-core/via_fence.c
	shared-core/i915_dma.c
	shared-core/i915_drv.h
	shared-core/i915_irq.c
2008-02-18 22:35:46 +00:00
Keith Packard 5d8c754bc2 [915]: more registers for S3 (DSPCLK_GATE_D, CACHE_MODE_0, MI_ARB_STATE)
Failing to preserve the MI_ARB_STATE register was causing FIFO underruns on
the VGA output on my HP 2510p after resume.
2008-02-16 20:14:49 -08:00
Stephane Marchesin cd87e6352b nouveau: no GART on ia64 either. 2008-02-16 03:50:29 +01:00
Jesse Barnes 2b1c9cd696 i915: initial (and untested) TV out support
Ported from xf86-video-intel.  Still need to tie in TV modes somehow, though
preferably w/o using the properties mechanism.
2008-02-15 16:13:21 -08:00
Ben Skeggs 15cbde683f nv40: actually init all tile regs. 2008-02-16 04:47:02 +11:00
Dave Airlie 8bf8cd63bb missing bits 2008-02-14 07:37:34 +10:00
Kristian Høgsberg 373dbcf8b2 i915: Add a dri2 init path that gets the lock from the dri2 sarea. 2008-02-13 13:34:02 -05:00
Kristian Høgsberg db3f03ae35 i915: Only look up dev_priv->mmio_map if it's not already set up 2008-02-13 13:34:02 -05:00
Kristian Høgsberg ee15459483 i915: Add I915_PARAM_CHIPSET_ID param to get chipset ID. 2008-02-13 13:34:02 -05:00
Kristian Høgsberg 4feb0638f1 i915: Make sarea_priv setup optional. 2008-02-13 13:34:02 -05:00
Jerome Glisse 04257f1a5a radeon_ms: bring radeon_ms up to date with lastest changes 2008-02-09 18:23:35 +01:00
Jesse Barnes 6f19473191 Fix saveGR array size
Make sure we have enough room for all the GR registers or we'll end up
clobbering the AR index register (which should actually be harmless
unless the BIOS is making an assumption about it).
2008-02-07 11:21:09 -08:00
Jesse Barnes 8b6c96dedd i915: save/restore interrupt state
On resume, if the interrupt state isn't restored correctly, we may end
up with a flood of unexpected or ill-timed interrupts, which could cause
the kernel to disable the interrupt or vblank events to happen at the
wrong time.  So save/restore them properly.
2008-02-07 10:48:08 -08:00
Jakob Bornecrantz 0618ac8a07 Added kernel part of hotplug ioctl 2008-02-07 19:24:58 +01:00
Jakob Bornecrantz 34b76e0fac Added hotplug ioctl 2008-02-07 19:23:27 +01:00
Alan Hourihane 53937a189f build fix for older kernels 2008-02-05 10:12:21 +00:00
Thomas Hellstrom 76748efae2 i915: Re-report breadcrumbs on poll to the fence manager,
since a breadcrumb may actually turn up before a corresponding fence object
has been placed on the fence ring.
2008-02-05 10:36:49 +01:00
Stuart Bennett a0781e7622 nouveau: make nv34 work every time, not just every 2nd time
And make nv30_graph_init a bit more like mmio-traces
2008-02-04 16:38:31 +00:00
Maarten Maathuis 733e07663e nouveau: NV40 can/should now be able to run after the blob.
- Moved the fix from the ddx to drm, because it seemed more appropriate.
- Don't be shy, report if it works for you or not.
2008-02-02 12:46:47 +01:00
Thomas Hellstrom 47ee6237fe i915: Avoid calling drm_fence_flush_old excessively. 2008-01-30 22:14:02 +01:00
Thomas Hellstrom f1edb7ad91 Simplify the fencing code and differentiate between flushes and
waiting types.
Add a "command_stream_barrier" method to the bo driver.
2008-01-30 22:06:02 +01:00
Ben Skeggs 9a7e45858d nv40: some more nv67 changes
With some luck the drm-side will be OK now for this chipset.
2008-01-30 11:50:17 +11:00
Mirko 0744cb153a Add new RV380 pci id
bug 14289
2008-01-29 10:11:27 -05:00
Jakob Bornecrantz a2254c5a96 Added cursor support 2008-01-28 03:14:56 +01:00
Maciej Cencora b8755ff7c3 drm: add initial rs690 support for drm.
This adds support for configuring the RS690 GART.
2008-01-27 12:50:31 +10:00
George Sapountzis 6bfb9b639a mach64: fix after vblank-rework
don't disable vblank interrupts (similar to r128)
2008-01-25 16:54:29 +02:00
Dave Airlie fa7b779c91 don't reinit ring if already initialised 2008-01-25 16:32:09 +10:00