Dave Airlie
21ee6fbfb8
drm: remove drmP.h internal typedefs
2007-07-16 12:32:51 +10:00
Dave Airlie
1a07256d60
drm: remove ttm userspace typedefs
2007-07-16 11:30:53 +10:00
Dave Airlie
b95ac8b7b3
drm: detypedef drm.h and fixup all problems
2007-07-16 11:22:15 +10:00
Dave Airlie
f174f835ff
drm: remove typedefs in drm.h to their own section
2007-07-16 10:13:58 +10:00
Dave Airlie
2134193af6
Merge branch 'drm-ttm-cleanup-branch'
2007-07-16 10:05:20 +10:00
Patrice Mandin
bc7d6c76fa
nouveau: nv10 and nv11/15 are different
2007-07-14 18:32:11 +02:00
Arthur Huillet
aa6d9199fa
applied patch from Ian Romanick fixing PCI DMA object creation code
2007-07-13 20:51:52 +02:00
Arthur Huillet
5ae3ad4f01
now attempting to create PCI object only when there is a pci_heap
2007-07-13 16:00:03 +02:00
Ben Skeggs
0029713451
nouveau: nuke internal typedefs, and drm_device_t use.
2007-07-13 15:09:31 +10:00
Ben Skeggs
851c950d98
nouveau: unbreak AGP
2007-07-13 02:18:59 +10:00
Ben Skeggs
af317f1cc7
nouveau: mem_alloc() returns offsets, not absolute addresses now.
2007-07-12 11:55:47 +10:00
Ben Skeggs
522a0c868c
nouveau: nuke left over debug message
2007-07-12 11:39:45 +10:00
Ben Skeggs
750371cb6e
nouveau: separate region_offset into map_handle and offset.
2007-07-12 10:46:57 +10:00
Arthur Huillet
5fbdf9da8b
fixed object creation code to not Oops on 64bits, worked around memalloc not working on 64bit for PCIGART
2007-07-12 02:35:39 +02:00
Arthur Huillet
b301a9051b
NV50 will not attempt to use PCIGART now
2007-07-11 15:01:37 +02:00
Arthur Huillet
d26ae22c2b
fixed bug that prevented PCIE cards from actually using PCIGART - NV50 will probably still have a problem
2007-07-11 14:56:27 +02:00
Ben Skeggs
5ccadac9e3
nouveau/nv50: G80 fixes.
...
Again, no hardware, so no idea if it'll even work yet. I understand how
the PRAMIN setup works now, un-hardcoding stuff will come "RealSoonNow(tm)".
2007-07-11 14:22:59 +10:00
Ben Skeggs
13e1377044
nouveau: Some checks on userspace object handles.
2007-07-11 12:39:30 +10:00
Dave Airlie
2c9e05cf4c
Merge branch 'master' into cleanup
...
Conflicts:
libdrm/xf86drm.c
linux-core/drm_bo.c
linux-core/drm_fence.c
2007-07-11 11:23:41 +10:00
Arthur Huillet
694e1c5c3f
Added support for PCIGART for PCI(E) cards. Bumped DRM interface patchlevel.
2007-07-11 02:35:10 +02:00
Ben Skeggs
023f7d9c00
nouveau: Allocate mappable VRAM for notifiers..
2007-07-09 23:58:00 +10:00
Ben Skeggs
31e33813e8
nouveau: Don't be so strict on <NV50
2007-07-09 20:02:14 +10:00
Ben Skeggs
3c58195ccd
nouveau: Avoid oops
...
Turns out lastclose() gets called even if firstopen() has never been...
2007-07-09 16:16:44 +10:00
Ben Skeggs
c806bba466
nouveau/nv50: Initial channel/object support
...
Should be OK on G84 for a single channel, multiple channels *almost* work.
Untested on G80.
2007-07-09 16:16:44 +10:00
Ben Skeggs
3324342e42
nouveau: enable reporting for all PFIFO/PGRAPH irqs
2007-07-09 16:16:44 +10:00
Ben Skeggs
163f852612
nouveau: rewrite gpu object code
...
Allows multiple references to a single object, needed to support PCI(E)GART
scatter-gather DMA objects which would quickly fill PRAMIN if each channel
had its own.
Handle per-channel private instmem areas. This is needed to support NV50,
but might be something we want to do on earlier chipsets at some point?
Everything that touches PRAMIN is a GPU object.
2007-07-09 16:16:44 +10:00
Michel Dänzer
91990946fa
One more spinlock initializer cleanup.
2007-07-03 12:33:51 +02:00
Ben Skeggs
e26ec51146
nouveau: small RAMFC cleanups
2007-06-29 14:20:50 +10:00
Ben Skeggs
1c32fecd6d
nouveau: Hack around possible Xv blit adaptor breakage
2007-06-28 21:01:17 +10:00
Ben Skeggs
2dd85772aa
nouveau/nv10: Fix earlier NV1x chips
...
Can't use nv04 code for them, since an extra field was inserted into
RAMFC after DMA_PUT/GET.
2007-06-28 04:23:17 +10:00
Ben Skeggs
68ecf61647
nouveau: never touch PRAMIN with NV_WRITE, cleanup RAMHT code a bit
2007-06-28 03:26:44 +10:00
Ben Skeggs
18a6d1c9c3
nouveau: simplify PRAMIN access
2007-06-28 03:26:44 +10:00
Ben Skeggs
38617b6a26
nouveau: name some regs
2007-06-28 03:26:44 +10:00
Ben Skeggs
ce0d528d3c
nouveau/nv50: skeletal backend
2007-06-28 03:26:43 +10:00
Ben Skeggs
695599f18d
nouveau: Nuke DMA_OBJECT_INIT ioctl (bumps interface to 0.0.7)
...
For various reasons, this ioctl was a bad idea.
At channel creation we now automatically create DMA objects covering
available VRAM and GART memory, where the client used to do this themselves.
However, there is still a need to be able to create DMA objects pointing at
specific areas of memory (ie. notifiers). Each channel is now allocated a
small amount of memory from which a client can suballocate things (such as
notifiers), and have a DMA object created which covers the suballocated area.
The NOTIFIER_ALLOC ioctl exposes this functionality.
2007-06-28 03:26:43 +10:00
Ben Skeggs
4f2dd78ff3
nouveau/nv04: Set NV_PFIFO_CACHE1_PUSH1 correctly + small tweaks
2007-06-28 03:04:48 +10:00
Thomas Hellstrom
9b9a127ed0
More 64-bit padding.
2007-06-26 23:25:40 +02:00
Ian Romanick
5c27f8a70e
Add support SiS based XGI chips to SiS DRM.
2007-06-26 09:51:55 -07:00
Ben Skeggs
9f617522d9
nouveau: NV49/NV4B PGRAPH setup from jb17bsome and stephan_2303
2007-06-25 01:57:57 +10:00
Ben Skeggs
3dfc13e2da
nouveau: kill some dead code
2007-06-24 19:00:44 +10:00
Ben Skeggs
5f05cd7086
nouveau: NV04/NV10/NV20 PGRAPH engtab functions
...
NV04/NV10 load_context()/save_context() are stubs. I don't know enough about
how they work to implement them sanely. The "old" context_switch() code
remains hooked up, so it shouldn't break anything.
NV20 will probably break if load_context() works. No inital context values
are filled in, so when the first channel is created PGRAPH will probably end
up having its state zeroed. Some setup from nv20_graph_init() will probably
need to be moved to the per-channel context setup.
2007-06-24 19:00:26 +10:00
Ben Skeggs
5d55b0655c
nouveau: NV3X PGRAPH engtab functions
2007-06-24 18:58:38 +10:00
Ben Skeggs
341bc78207
nouveau: NV1X/2X/3X PFIFO engtab functions
...
Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC
entry size.
2007-06-24 18:58:14 +10:00
Ben Skeggs
05d86d950a
nouveau: NV04 PFIFO engtab functions
2007-06-24 18:57:09 +10:00
Ben Skeggs
acb710d1a5
nouveau: NV4X PGRAPH engtab functions
2007-06-24 18:56:40 +10:00
Ben Skeggs
f2e64d5276
nouveau: NV4X PFIFO engtab functions
2007-06-24 18:56:01 +10:00
Ben Skeggs
0afb3b518e
nouveau: split PFIFO/PGRAPH context creation
2007-06-24 18:55:23 +10:00
Ben Skeggs
9dbf322d26
nouveau: (mostly) hook up put_base again
2007-06-24 18:55:06 +10:00
Ben Skeggs
24b71c318a
nouveau: prototype PFIFO/PGRAPH engtab API
2007-06-24 18:54:51 +10:00
Ben Skeggs
5c7c07fd49
nouveau: rename engtab functions
2007-06-24 18:54:36 +10:00
Michel Dänzer
068ffc1e1b
radeon: Acknowledge all interrupts we're interested in.
...
Failure to do so was probably the root cause of fd.o bug 11287.
2007-06-22 11:55:26 +02:00
Oliver McFadden
40f6a696cb
r300: Synchronized the register defines file; documentation changes.
2007-06-21 14:35:11 +00:00
Oliver McFadden
213732af43
r300: Allow writes to R300_VAP_PVS_WAITIDLE.
2007-06-21 14:32:58 +00:00
Oliver McFadden
215787e429
r300: Registers 0x2220-0x2230 are known as R300_VAP_CLIP_X_0-R300_VAP_CLIP_Y_1.
2007-06-18 08:42:46 +00:00
Oliver McFadden
8038e7b60f
r300: Synchronized the register defines file again.
2007-06-18 08:36:50 +00:00
Michel Dänzer
3d5d41fa98
i915: Fix handling of breadcrumb counter wraparounds.
2007-06-15 17:13:11 +02:00
Thomas Hellstrom
f984b1b8d1
Fix some obvious bugs.
2007-06-12 12:30:33 +02:00
Thomas Hellstrom
b6b5df24b9
Try to make buffer object / fence object ioctl args 64-bit safe.
...
Introduce tile members for future tiled buffer support.
Allow user-space to explicitly define a fence-class.
Remove the implicit fence-class mechanism.
64-bit wide buffer object flag member.
2007-06-12 12:21:38 +02:00
Oliver McFadden
3181573073
r300: Added the CP maximum fetch size and ring rptr update variables.
2007-06-08 19:40:57 +00:00
Oliver McFadden
39625f9621
r300: Small correction to the previous commit.
2007-06-05 19:19:42 +00:00
Alex Deucher
9e0bd88c61
r300: Document more of the RADEON_RBBM_STATUS register.
2007-06-05 19:05:49 +00:00
Wang Zhenyu
109e2a10f2
Add support for the G33, Q33, and Q35 chipsets.
...
These require that the status page be referenced by a pointer in GTT, rather
than phsyical memory. So, we have the X Server allocate that memory and tell
us the address, instead.
2007-06-05 11:15:29 -07:00
Maurice van der Pot
4327d7f314
nouveau: fix RAMHT wrapping
2007-06-04 10:49:30 +10:00
Dave Airlie
a05d4fecd3
radeon: refine irq acking for vbl on crtc 2
2007-06-03 18:30:52 +10:00
root
8d95f4bd91
Revert "move i915 to new drm_wait_on function"
...
This reverts commit feb6803778
.
This was a bad idea, the macro is actually a bit harder to convert
to a static for the other use cases
2007-06-03 18:11:44 +10:00
Dave Airlie
4e9d215bdf
radeon: add support for vblank on crtc2
...
This add support for CRTC2 vblank on radeon similiar to the i915 support
2007-06-03 16:28:21 +10:00
Wang Zhenyu
5c394b309d
i915: Add support for 945GME chip
2007-05-31 11:09:15 +01:00
Wang Zhenyu
3917f85c73
i915: Add support for 965GME/GLE chip.
2007-05-31 11:09:07 +01:00
Jung-uk Kim
b0c8d885ce
Update a bunch of FreeBSD port code.
...
Tested on r200/r300. i915 updates still remain to be done.
2007-05-29 15:02:44 -07:00
Thomas Gleixner
2bb7703698
drm: spinlock initializer cleanup
2007-05-26 05:20:59 +10:00
Dave Airlie
ad02c536df
radeon: add other IGP chipsets
2007-05-26 04:02:55 +10:00
Dave Airlie
58b2ed7832
Revert "drm/ttm: cleanup mm_ioctl ioctls to be separate ioctls."
...
This reverts commit 3fdef0dc20
.
ditto not on master yet
2007-05-26 03:48:08 +10:00
Dave Airlie
375f3f2884
Revert "drm/ttm: cleanup most of fence ioctl split out"
...
This reverts commit 3dfc1400e9
.
this shouldn't have gone on master yet
2007-05-26 03:47:48 +10:00
Dave Airlie
ce58e53a01
whitespace fixups from kernel
2007-05-26 03:32:34 +10:00
Dave Airlie
3dfc1400e9
drm/ttm: cleanup most of fence ioctl split out
2007-05-26 03:32:34 +10:00
Dave Airlie
3fdef0dc20
drm/ttm: cleanup mm_ioctl ioctls to be separate ioctls.
...
This is the first bunch of ioctls
2007-05-26 03:32:34 +10:00
Dave Airlie
7b48f0022a
drm: cleanup use of Linux list handling macros
...
This makes the drms use of the list handling macros a lot cleaner
and more along the lines of how they should be used.
2007-05-26 04:26:24 +10:00
Oliver McFadden
ca725bba84
r300: Added my comments into r300_reg.h.
2007-05-13 16:18:54 +00:00
Oliver McFadden
c6ff0caaa3
r300: Synchronized R300 register defines file.
...
Just moved the indent control comments so that indent doesn't try to change
anything.
2007-05-13 07:53:57 +00:00
Matthieu Castet
e9b604ed3f
nouveau : nv10 graph move clipping value to per channel init
2007-05-12 15:36:48 +02:00
Matthieu Castet
5d623935c0
nouveau : nv10 graph clipping values were forgoten in ddx to drm commit
2007-05-12 15:36:48 +02:00
Keith Packard
e4d163d81a
Allow vblank interrupts to remain disabled across VT switch.
...
i915_driver_irq_postinstall was forcing vblank interrupts to pipe A when
called with vblank interrupts disabled. This caused vblank interrupts to be
accidentally re-enabled when VT switching the X server. Instead, start the
driver with vblank interrupts enabled on pipe A to support older X servers,
but then leave control over the state to the X server if it is able to do so.
2007-05-10 13:15:32 -07:00
Oliver McFadden
e0056c7eb4
r300: Synchronized R300 register defines file.
2007-05-09 18:31:31 +00:00
Oliver McFadden
a02b045142
r300: Synchronized R300 register defines file.
2007-05-09 15:22:40 +00:00
Matthieu Castet
59784116bf
nouveau : fix fifo context size for nv10
2007-05-08 21:20:25 +02:00
Dave Airlie
b2a875ba89
ttm: complete drm buffer object ioctl split
...
retain the op operation for validate/fence operations
2007-05-08 18:25:15 +10:00
Dave Airlie
25c51f539f
drm/ttm: ioctl cleanup for buffer object - user side only
...
This just cleans up the xf86drm.c to what I want and drm.h,
I need to fix up the kernel internals to suit these changes now.
I've moved to using struct instead of typedefs for the bo and it doesn't look
that bad so I'll do the same thing for mm and fence..
2007-05-08 17:53:58 +10:00
Oliver McFadden
4e858f8811
r300: Synchronize the register file from Mesa.
2007-05-06 12:47:03 +00:00
Oliver McFadden
87ec1fea6c
r300: Use the defined names for known registers.
2007-05-06 12:35:16 +00:00
Dave Airlie
6a62941eca
drm/ttm: cleanup most of fence ioctl split out
2007-05-06 11:35:11 +10:00
Dave Airlie
ee8954cb53
drm/ttm: cleanup mm_ioctl ioctls to be separate ioctls.
...
This is the first bunch of ioctls
2007-05-06 11:17:30 +10:00
Michel Dänzer
f06ad82ecd
Fix userspace ABI breakage from 3c384a9ad5
.
2007-05-01 17:03:55 +02:00
Michel Dänzer
ca1cd3257c
radeon: Don't mess up page flipping when a file descriptor is closed.
...
There can still be other contexts that may use page flipping later on, so don't
just unilaterally 'clean it up', which could lead to the wrong page being
displayed, e.g. when running 3D apps with a GLX compositing manager such as
compiz using page flipping.
2007-04-29 12:37:51 +02:00
Dave Airlie
feb6803778
move i915 to new drm_wait_on function
2007-04-28 15:07:43 +10:00
Dave Airlie
9f9c19065c
remove DRM_GETSAREA and replace with drm_getsarea function
2007-04-28 15:07:43 +10:00
George Sapountzis
e88934274a
Revert "bug 7092 : add pci ids for mach64 in Dell poweredge 4200"
...
This reverts commit 255f3e6f76
.
Rage IIc does not have a vertex setup engine.
2007-04-26 14:16:51 +03:00
George Sapountzis
942d9be296
freebsd: remove stray apperance of IN_MODULE.
...
The xserver no longer uses the libc-wrapper.
2007-04-26 14:16:13 +03:00
Jesse Barnes
3c384a9ad5
Add new buffer object type for kernel allocations that don't initially have a user mapping.
...
(cherry picked from commit 2e21779992
)
2007-04-26 16:04:09 +10:00
Stephane Marchesin
61477d60c4
nouveau: fix wacky pci id
2007-04-23 22:37:36 +02:00
Thomas Hellstrom
e805ca959d
via: Make sure we flush write-combining using a follow-up read.
2007-04-17 08:58:23 +02:00