116870a908
I915 suspend/resume for FreeBSD
2008-06-08 13:56:14 -04:00
b44f2da380
drm: nopage compat fixup for drm_vm
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The kernel has removed nopage so move the old nopage codepaths into a compat vm file and switch to using the fault paths.
nopfn is on its way out in the future also, so we should switch to using fault
for that path as well soon
2008-05-07 15:10:23 +10:00
a244d29050
nouveau: silence warning
2008-03-24 03:26:37 +11:00
2305100c0f
More post-ioctl work.
2008-02-29 13:25:55 +01:00
7e4bb6099a
Revert "nouveau: stub superioctl"
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This reverts commit 2370ded79b
2007-11-14 05:11:11 +11:00
2370ded79b
nouveau: stub superioctl
2007-11-14 03:00:25 +11:00
20eecf2b88
Add missing drm_regman.c file.
2007-11-06 09:36:29 +01:00
2dc2ee7a5a
nouveau: put it all together.
2007-11-02 19:47:48 -04:00
31847b4b62
nouveau: ttm stubs
2007-10-31 20:13:01 -04:00
2489062a33
i915: add backwards compat chipset flushing code
2007-10-31 11:27:44 +11:00
3b19b50cb5
Remove the need for the hardware lock in the buffer manager.
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Add interface entry cleaning a memory type without touching NO_EVICT buffers.
2007-10-21 12:20:56 +02:00
48b5eaf303
Simple replacement for hardware lock in some cases.
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Fix i915 since last commit.
2007-10-20 16:49:43 +02:00
9d779e2c88
nouveau: mandatory "oops I forgot half of the files" commit
2007-10-12 22:40:08 +02:00
aa135ba8e8
nouveau: rename nv30_graph.c to nv20_graph.c
2007-09-30 22:16:01 +03:00
205403aea8
nouveau: nv30 graph function renames, removed nv20_graph.c
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All nv30 functions in nv30_graph.c that can be used on nv20 are renamed
as accordingly. nv20 specific parts from nv20_graph.c are moved into
nv30_graph.c.
2007-09-30 22:16:01 +03:00
a3881ad2fe
Add ioc32 compat layer for XGI DRM.
2007-09-18 11:03:49 -07:00
fee49e2071
Merge branch 'master' of ssh+git://git.freedesktop.org/git/mesa/drm into xgi-0-0-2
2007-08-31 10:54:55 -07:00
d8a800b63d
Implement fence support.
2007-08-15 21:05:26 -07:00
cf04641bc6
nouveau: Give DRM its own gpu channel
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If your card doesn't have working context switching, it is now broken.
2007-08-06 22:05:31 +10:00
c561cb4650
Merge branch 'master' of ssh+git://git.freedesktop.org/git/mesa/drm into xgi-0-0-2
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Conflicts:
linux-core/drmP.h
linux-core/drm_scatter.c
2007-07-26 16:58:28 -07:00
ec67c2def9
nouveau: G8x PCIEGART
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Actually a NV04-NV50 ttm backend for both PCI and PCIEGART, but PCIGART
support for G8X using the current mm has been hacked on top of it.
2007-07-17 13:51:14 +10:00
5522136b7f
Merge branch 'master' into xgi-0-0-2
2007-07-12 15:28:17 -07:00
c806bba466
nouveau/nv50: Initial channel/object support
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Should be OK on G84 for a single channel, multiple channels *almost* work.
Untested on G80.
2007-07-09 16:16:44 +10:00
ce0d528d3c
nouveau/nv50: skeletal backend
2007-06-28 03:26:43 +10:00
695599f18d
nouveau: Nuke DMA_OBJECT_INIT ioctl (bumps interface to 0.0.7)
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For various reasons, this ioctl was a bad idea.
At channel creation we now automatically create DMA objects covering
available VRAM and GART memory, where the client used to do this themselves.
However, there is still a need to be able to create DMA objects pointing at
specific areas of memory (ie. notifiers). Each channel is now allocated a
small amount of memory from which a client can suballocate things (such as
notifiers), and have a DMA object created which covers the suballocated area.
The NOTIFIER_ALLOC ioctl exposes this functionality.
2007-06-28 03:26:43 +10:00
3a776fa01e
Add XGI driver to Makefiles.
2007-06-26 13:26:10 -07:00
341bc78207
nouveau: NV1X/2X/3X PFIFO engtab functions
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Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC
entry size.
2007-06-24 18:58:14 +10:00
05d86d950a
nouveau: NV04 PFIFO engtab functions
2007-06-24 18:57:09 +10:00
f2e64d5276
nouveau: NV4X PFIFO engtab functions
2007-06-24 18:56:01 +10:00
674cefd4fe
nouveau: move card initialisation into the drm
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The PGRAPH init for the various cards will need cleaning up at some point,
a lot of the values written there are per-context state left over from the
all the hardcoding done in the ddx.
It's possible some cards get broken by this commit, let me know.
Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
2007-03-26 20:59:37 +10:00
ef71b6230b
remove i830 reference
2007-03-19 11:46:35 +00:00
cbe31d0dc7
Remove old i830 kernel driver.
2007-03-19 11:46:35 +00:00
e0f53e59be
Simple fence object sample driver for via, based on idling the GPU.
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Buffer object driver for via.
Some changes to buffer object driver callbacks.
Improve fence flushing.
2007-02-16 20:22:24 +01:00
a78f70faad
Merge branch 'ttm-vram-0-1-branch'
2007-02-14 15:33:40 +01:00
af24465b2e
Fix a stray unlock_kernel() in drm_vm.c
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Add a file for memory move helpers, drm_bo_move.c
Implement generic memory move.
Cached, no_move and unmapped memory temporarily broken.
2007-02-07 12:52:23 +01:00
d69902db3b
nouveau: fix nv04 graph routines for new register names.
2007-02-03 05:25:36 +01:00
f04347f371
nouveau: nv20 graph ctx switch.
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Untested...
2007-01-13 23:19:41 +01:00
cd5f543b2f
nouveau: first step to make graph ctx works
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It is still not working, but now we could use some 3D commands
without needed to run nvidia blob before.
2007-01-13 21:44:50 +01:00
4297a83b48
nouveau: get nv30 context switching to work.
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* Pulled in some registers from nv10reg.h. Needed for context switching.
* Filled in nv30 graphics context (based on nv40_graph.c).
* Figure out nv30 context table, set up on context creation. Allows the cards automatic switching to work.
2007-01-12 00:14:54 -05:00
0e0d954584
nouveau: Add nv40-specific PGRAPH code, not hooked up yet.
2007-01-02 14:52:43 +11:00
1e90b7ee8c
Merge branch 'master' into nouveau-1
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Conflicts:
linux-core/Makefile.kernel
2006-11-06 08:03:18 +11:00
94ab96c4d8
nouveau: add compat ioc32 support
2006-11-05 20:39:13 +11:00
fef9b30a2b
initial import of nouveau code from nouveau CVS
2006-08-27 08:55:02 +10:00
4c03030b12
Checkpoint commit
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Buffer object code.
2006-08-25 18:05:35 +02:00
7058d06317
Initial i915 buffer object driver
2006-08-22 10:24:48 +02:00
700bf80ca9
Bring in stripped TTM functionality.
2006-08-22 09:47:33 +02:00
e089de33e8
i915 fence object driver implementing 2 fence object types:
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0x00 EXE fence. Signals when command stream interpreter has reached the point
where the fence was emitted.
0x01 FLUSH fence. Signals when command stream interpreter has reached the point
where the fence was emitted, and all previous drawing operations have been
completed and flushed.
Implements busy wait (for fastest response time / high CPU) and
lazy wait (User interrupt or timer driven).
2006-08-21 21:36:00 +02:00
657bacc395
Add missing fence type define.
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Add drm_fence.o to Makefile
2006-08-21 21:04:36 +02:00
1c787f0d39
Backwards compatibility code for ttms.
2006-08-21 20:38:57 +02:00
42c2cfcf7d
Generic DRM support base-class support for user-space objects, like
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fence objects and buffer objects:
Refcounting,
Inter-process sharing,
Synchronization
Destruction.
2006-08-21 20:30:19 +02:00
Robert Noland
Dave Airlie
Ben Skeggs
Thomas Hellstrom
Jeremy Kolb
Dave Airlie
Arthur Huillet
Pekka Paalanen
Ian Romanick
Alan Hourihane
Stephane Marchesin
Matthieu Castet
Ben Skeggs
Dave Airlie