Commit Graph

2109 Commits (d85e243259259d7702db0d344ae1ff7d26598227)

Author SHA1 Message Date
Thomas Hellstrom d85e243259 Fix an oops when trying to clean a not yet initialized memory type. 2007-04-03 10:29:14 +02:00
Thomas Hellstrom 72d457fc19 Make sure CMA (Can't map aperture) pages are mapped uncached.
(Should really make this write-combined using PATs, at some point).
2007-04-03 10:29:14 +02:00
Oliver McFadden 5395a92d40 r300: Synchronize the register header file again.
It's a good idea to keep these synchronized; even though the DRM doesn't use all
the defines, maintaining two different copies is prone to errors when the diff
gets bigger.
2007-04-02 19:45:10 +00:00
Matthieu Castet cbbdbd5e65 nouveau: fix usage of PGRAPH_CTX_CONTROL on nv20+
http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=17985f07d68322519919a7f629a6d2d9bf3916ed could have broken some nvxx_graph code : it rename NV03_PGRAPH_CTX_CONTROL to NV10_PGRAPH_CTX_CONTROL, but forgot to update it in nvxx_graph file.

Also when migrating init stuff in http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=674cefd4fe4b537a20a10edcb4ec5df55facca8e, NV04_PGRAPH_CTX_CONTROL is used everywhere but the old ddx code use NV_PGRAPH_CTX_CONTROL_NV04 or NV_PGRAPH_CTX_CONTROL.
2007-04-01 14:31:41 +02:00
Matthieu Castet 25cedcf76f nouveau : nv10 ctx switch fix
restoring NV10_PGRAPH_CTX_SWITCH1 now works
2007-04-01 14:21:29 +02:00
Matthieu Castet 223061e084 nouveau : set the correct PGRAPH_CTX_CONTROL register
"5a072f32        (Stephane Marchesin     2007-02-03 04:57:06 +0100" broke nv10 ctx switch by setting wrong PGRAPH_CTX_CONTROL reg
2007-04-01 00:44:11 +02:00
Eric Anholt ddb1715e06 Merge branch 'crestline-qa', adding support for the 965GM chipset. 2007-03-30 13:11:39 -07:00
Eric Anholt cd4c82176f Merge branch 'origin' 2007-03-30 12:56:08 -07:00
Dave Airlie 3f70518f0b drm/bo: avoid oops if the memory manager for this type isn't initialised 2007-03-29 09:25:04 +10:00
Stephane Marchesin bdabc8f998 nouveau: fix nv04 context switches. 2007-03-29 00:54:18 +02:00
Dave Airlie 81b811da37 drm/i915: set the bo up at firstopen time not after DMA init
This is required to use TTM to allocate the ring buffer.
2007-03-27 18:01:31 +10:00
Dave Airlie 72a1190f6d drm/ttm: make sure dev_mapping is set-up for the first opener of the drm
This was causing an oops in my miniglx code to try and use a TTM-only setup.
2007-03-27 17:59:30 +10:00
Nian Wu 406a894e52 Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-27 12:53:13 +08:00
Ben Skeggs 674cefd4fe nouveau: move card initialisation into the drm
The PGRAPH init for the various cards will need cleaning up at some point,
a lot of the values written there are per-context state left over from the
all the hardcoding done in the ddx.

It's possible some cards get broken by this commit, let me know.
Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
2007-03-26 20:59:37 +10:00
Nian Wu ddc87d3025 Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-25 17:00:36 +08:00
Eric Anholt 5d69640a6a Catch up to new interrupt API, and retire FreeBSD 4.x support here. 2007-03-24 09:39:09 -07:00
Dave Airlie 5ad43f4675 vm: cleanup drm_vm.c along lines of cleanups queued for kernel 2007-03-24 17:58:27 +11:00
Nian Wu e7cd5a1e2d Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-23 17:00:41 +08:00
Ben Skeggs 4988fa4886 nouveau: rework nouveau_fifo_alloc() so the drm can create internal FIFOs 2007-03-23 15:25:37 +11:00
Dave Airlie 8d918b0b63 cleanup more whitespace from ttm merge 2007-03-23 14:56:39 +11:00
Dave Airlie 39795501a8 drm: remove second spinlock init for tasklet lock 2007-03-23 14:56:28 +11:00
Ben Skeggs 2bb9de96d5 nouveau: remove unused cruft 2007-03-23 13:45:29 +11:00
Nian Wu 0467ad4118 Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-21 17:00:43 +08:00
Ben Skeggs e22225416a nouveau: support multiple channels per client (breaks drm interface) 2007-03-21 17:57:47 +11:00
Nian Wu fe4cc50983 Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-20 13:11:02 +08:00
Dave Airlie 209870a882 rename badly named define 2007-03-20 10:13:58 +11:00
Alan Hourihane ef71b6230b remove i830 reference 2007-03-19 11:46:35 +00:00
Alan Hourihane cbe31d0dc7 Remove old i830 kernel driver. 2007-03-19 11:46:35 +00:00
Nian Wu 8398b99d8d Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-19 17:00:31 +08:00
Dave Airlie 1e77e52755 more return values fixup 2007-03-19 09:20:04 +11:00
Dave Airlie 46fac17082 fixup return values in drm ioctl 2007-03-19 09:12:08 +11:00
Dave Airlie 26aba875e1 more whitespace issues 2007-03-19 08:56:24 +11:00
Dave Airlie c991f8e049 cleanup ioctl expansion code 2007-03-19 08:46:39 +11:00
Dave Airlie a2e3bae8e2 oops missing else 2007-03-19 08:46:25 +11:00
Dave Airlie bbb6fc9307 make drm fops const from kernel 2007-03-19 08:36:01 +11:00
Dave Airlie 483f6a113d use ARRAY_SIZE 2007-03-19 08:32:25 +11:00
Dave Airlie 2d7ecb8422 more tab/space conversion 2007-03-19 08:29:07 +11:00
Dave Airlie 2463b03cb4 whitespace cleanup pending a kernel merge 2007-03-19 08:23:43 +11:00
Dave Airlie 6c4428d40c clean up more of inline functions agp_remap/drm_lookup_map 2007-03-19 08:09:21 +11:00
Dave Airlie 27197d7836 deinline agp_remap along lines of kernel 2007-03-18 21:45:07 +11:00
Dave Airlie c4808e206b remove drm_lookup_map unused now 2007-03-18 21:42:48 +11:00
Nian Wu df73975980 Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-14 17:00:27 +08:00
Oliver McFadden 93f66af76a r300: Renamed the CACHE_CTLSTAT values to include UNKNOWN in the name; not
enough information is known about them to be sure as to what the values mean.
2007-03-13 14:48:01 +00:00
Nian Wu 80d0018bc0 Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-13 17:00:31 +08:00
Oliver McFadden a90c2854a7 Add defines for the values written to R300_RB3D_ZCACHE_CTLSTAT.
Note that just like the values written to R300_RB3D_DSTCACHE_CTLSTAT these
values are really unknown; ideally more reverse engineering should be done to
determine what these values mean and when they should be set.
2007-03-13 06:25:04 +00:00
Ben Skeggs 90f8c691a5 nouveau: make sure cmdbuf object gets destroyed 2007-03-13 14:55:54 +11:00
Ben Skeggs 1775202cf9 nouveau: associate all created objects with a channel + cleanups 2007-03-13 14:55:54 +11:00
Ben Skeggs 7e2bbe2954 nouveau: s/fifo/channel/ 2007-03-13 14:55:54 +11:00
Oliver McFadden 462a6ea4ca Corrected values written to R300_RB3D_DSTCACHE_CTLSTAT to either
R300_RB3D_DSTCACHE_02 or R300_RB3D_DSTCACHE_0A, rather than hexadecimal values.
2007-03-13 01:19:56 +00:00
Oliver McFadden 5667396e05 Guess another unknown register used for R300 pacification. 2007-03-13 00:50:05 +00:00