Stephane Marchesin
7fbd10d933
nouveau: nv2a drm context switch support.
2007-10-04 03:44:23 +02:00
Pekka Paalanen
a72eb27fbc
nouveau: nv20 graph_create_context difference
...
nv20 writes the chan->id to a different place than nv28.
This still does not make nv20 run nv10_demo.
2007-10-02 22:18:47 +03:00
Pekka Paalanen
afc57ef1df
nouveau: fix nv25_graph_context_init
...
It was writing 4x the data in a loop.
2007-10-02 22:18:47 +03:00
Stuart Bennett
ffa3173ec4
nouveau: nv20 graph context init
2007-10-02 22:18:46 +03:00
Maarten Maathuis
69fcfb413e
nouveau: Fix dereferencing a NULL pointer when erroring out during initialization.
2007-10-01 22:21:23 +02:00
Stephane Marchesin
e1600646a9
nouveau: flip the ctx switch bit on. it seems to be ignored on nv34 but causes nv30 issues.
2007-10-01 03:28:10 +02:00
Matthieu Castet
75e8f4b5cf
nouveau : nv30 remove harcoded NV20_PGRAPH_CHANNEL_CTX_TABLE
2007-09-30 23:19:39 +02:00
Matthieu Castet
9cd6ece307
nouveau : nv20_graph replace nouveau_graph_wait_idle by nouveau_wait_for_idle
...
Also clean PGRAPH_CHANNEL macros
2007-09-30 23:09:30 +02:00
Pekka Paalanen
aa135ba8e8
nouveau: rename nv30_graph.c to nv20_graph.c
2007-09-30 22:16:01 +03:00
Pekka Paalanen
205403aea8
nouveau: nv30 graph function renames, removed nv20_graph.c
...
All nv30 functions in nv30_graph.c that can be used on nv20 are renamed
as accordingly. nv20 specific parts from nv20_graph.c are moved into
nv30_graph.c.
2007-09-30 22:16:01 +03:00
Pekka Paalanen
a67060c810
nouveau: graph ctx init nv25
...
According to mmio_trace_900XGL.tar.bz2 by Evan Fraser the nv25 init is
exactly the same as nv28 init.
2007-09-30 22:16:01 +03:00
Pekka Paalanen
aa2c337991
nouveau: nv28 graph context init
2007-09-30 22:16:01 +03:00
Pekka Paalanen
8ad605a264
nouveau: let nv20 hardware do ctx switching automatically.
2007-09-30 22:16:01 +03:00
Pekka Paalanen
dc592c8b7b
nouveau: Make nv20 use the nv30 PGRAPH ctx functions.
2007-09-30 22:16:01 +03:00
Pekka Paalanen
88bdb38cea
nouveau: Change couple constants to symbols.
2007-09-30 22:16:01 +03:00
Pekka Paalanen
a45fce7712
nouveau: NV30 should never call nouveau_nv20_context_switch().
2007-09-30 22:16:01 +03:00
Matthieu Castet
fb3ed99fb1
nouveau : pgraph_ctx dynamic alloc for nv04, nv10
2007-09-30 14:50:22 +02:00
Matthieu Castet
c76e04828b
nouveau : nv04 don't use chan->pgraph_ctx array
...
This commit is a first step to dynamic alloc pgraph context on nv04, nv10.
2007-09-30 14:21:47 +02:00
Matthieu Castet
f8f31f0457
nouveau : stop the fifo of the channel we are deleting
2007-09-29 23:07:29 +02:00
Matthieu Castet
097db7a9b0
nouveau : nv1x fix strange corruption
...
that appears when running glxgears and nouveau demo
2007-09-29 23:07:29 +02:00
chaohong guo
f863d23e01
radeon: Commit the ring after each partial texture upload blit.
...
This makes sure each blit starts as early as possible, which may improve
texture upload performance in some cases.
2007-09-29 18:08:04 +02:00
Matthieu Castet
72134e939e
nouveau : clean chan->pgraph_ctx stuff. We now do a static init of the array.
...
This avoid hardcoding pgraph_ctx size and potential buffer overflow.
2007-09-28 21:29:58 +02:00
Jesse Barnes
0bb2395a8b
Revert drm_i915_flip_t braindamage
...
I should not have renamed this field.
I should not have renamed this field.
I should not have renamed this field.
On the plus side, it was at least binary compatible.
2007-09-28 10:10:08 -07:00
Thomas Hellstrom
c4b3a0f602
Merge branch 'master' into pre-superioctl-branch
...
Conflicts:
linux-core/drm_bo.c
linux-core/drm_fence.c
linux-core/drm_objects.h
shared-core/drm.h
2007-09-25 18:03:31 +02:00
Dave Airlie
03c47f1420
drm: use fence_class as name instead of class
2007-09-25 16:17:17 +10:00
Thomas Hellstrom
da63f4ba0f
Add fence error member.
...
Modify the TTM backend bind arguments.
Export a number of functions needed for driver-specific super-ioctls.
Add a function to map buffer objects from the kernel, regardless of where they're
currently placed.
A number of error fixes.
2007-09-22 13:57:13 +02:00
Eric Anholt
24e33627c5
Merge branch 'bo-set-pin'
...
This branch replaces the NO_MOVE/NO_EVICT flags to buffer validation with a
separate privileged ioctl to pin buffers like NO_EVICT meant before. The
functionality that was supposed to be covered by NO_MOVE may be reintroduced
later, possibly in a different way, after the superioctl branch is merged.
2007-09-21 17:12:19 -07:00
Eric Anholt
e7bfeb3031
Add some more verbosity to drm_bo_set_pin_req comments.
2007-09-21 16:14:22 -07:00
Stephane Marchesin
7587e9682c
nouveau: fix ppc and get it right this time.
2007-09-21 22:42:39 +02:00
Stephane Marchesin
dc60c452e6
nouveau: fix notifiers on PPC.
2007-09-21 22:27:53 +02:00
Stephane Marchesin
74c6f2f47a
nouveau: add some checks to the nv04 graph switching code.
2007-09-21 22:04:50 +02:00
Eric Anholt
3d3a96ad4e
Merge branch 'origin' into bo-set-pin
2007-09-19 15:55:58 -07:00
Michel Dänzer
e349b58b4a
i915: Reinstate check that drawable has valid information in i915_vblank_swap.
2007-09-18 21:06:55 +01:00
Michel Dänzer
78d111fa96
i915: Fix scheduled buffer swaps.
...
One instance of unlocking a spinlock was converted incorrectly when this code
was fixed to build on BSD.
2007-09-18 21:06:55 +01:00
Ian Romanick
a3881ad2fe
Add ioc32 compat layer for XGI DRM.
2007-09-18 11:03:49 -07:00
Jesse Barnes
852232fb80
Remove plane->pipe mapping from SAREA private after all
...
We can figure out which pipe a given plane is mapped to by looking at the
display control registers instead of tracking it in a new SAREA private field.
If this becomes a performance problem, we could move to an ioctl based solution
by adding a new parameter for the DDX to set (defaulting to the old behavior if
the param was never set of course).
2007-09-12 08:55:33 -07:00
Jesse Barnes
7fdf98051a
Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/drm
2007-09-11 03:50:17 -07:00
Jesse Barnes
3cb8acd5ab
Disambiguate planes & pipes for swap operations
...
This mod makes the SAREA track plane to pipe mappings and corrects the name of
the plane info variables (they were mislabeled as pipe info since until now all
code assumed a direct mapping between planes and pipes).
It also updates the flip ioctl argument to take a set of planes rather than
pipes, since planes are flipped while pipes generate vblank events.
2007-09-11 03:48:46 -07:00
Patrice Mandin
0bd8752a0c
nouveau: nv10: add combiner registers
2007-09-10 18:53:48 +02:00
Matthieu Castet
00bb534a54
nouveau : nv10 fix NV10_PGRAPH_CTX_USER save/load
2007-09-09 15:49:33 +02:00
Matthieu Castet
b2ee72f440
nouveau : nv10 pipe ctx switch load/save.
...
This fix some issues with more than one 3D fifo, but there still some "corruption" sometimes
2007-09-09 12:13:00 +02:00
Maarten Maathuis
f19d80b046
nouveau: Add Quadro NVS 140 pciid
2007-09-08 22:19:00 +02:00
Ben Skeggs
06bb072595
nouveau: Use nv41 ctxprog/vals on nv42.
2007-09-07 20:07:13 +10:00
Ian Romanick
54c96cbc46
Merge branch 'xgi-0-0-2'
2007-09-06 15:37:52 -07:00
Stephane Marchesin
edf5a86a26
nouveau: fix some nv04 graph switching.
2007-09-06 02:47:06 +02:00
Stephane Marchesin
ff9a019cf0
nouveau: add pure nv30 support.
2007-09-06 02:47:06 +02:00
Maarten Maathuis
ef4944de85
Add context init voodoo and context switch code for NV41.
2007-09-04 18:51:57 +02:00
Ian Romanick
fee49e2071
Merge branch 'master' of ssh+git://git.freedesktop.org/git/mesa/drm into xgi-0-0-2
2007-08-31 10:54:55 -07:00
Stephane Marchesin
bac3f49daa
nouveau: nv04 context switching support. Works for starting X up at least.
2007-08-31 01:40:00 +02:00
Stephane Marchesin
69b11f44f0
nouveau: give nv03 the last cut.
2007-08-31 01:40:00 +02:00
Keith Packard
c78e610fa4
Add register defines for hw binning
2007-08-28 12:23:51 -07:00
Dave Airlie
589707b765
drm: remove XFREE86_VERSION macros
2007-08-28 15:17:36 +10:00
Matthieu Castet
a331d2e352
nouveau : add NV04_PGRAPH_TRAPPED_ADDR definition
...
- fix offset for nv04
- use it in nv10 graph ctx switch for getting next channel
- dump NV10_PGRAPH_TRAPPED_DATA_HIGH on nv10+
2007-08-26 20:48:32 +02:00
Matthieu Castet
4182fce408
nouveau : nv1x graph reworks
...
- add forgotten init value
- use the same PGRAPH_DEBUG than the blob
- remove init of ddx reg : it should be done with object
- better handle of channel destruction
hope I didn't break anything ;)
2007-08-25 22:10:45 +02:00
Patrice Mandin
502bbdbe14
nouveau: nv10: output a warning if last channel invalid, and switch to next
2007-08-25 00:12:58 +02:00
Patrice Mandin
9875011196
nouveau: nv10: check some NULL pointers inside context switch
2007-08-23 10:20:44 +02:00
Matthieu Castet
8645dac895
nouveau : fix some potential crashes with objects causing hash collision
2007-08-22 23:20:14 +02:00
Ben Skeggs
11c46afe75
nouveau/nv40: Preserve other bits in 0x400304/0x400310 like NVIDIA do.
2007-08-22 13:23:49 +10:00
Ben Skeggs
a654c0341a
nouveau/nv40: Dump extra info on ucode state if ctx switch fails.
2007-08-22 13:19:21 +10:00
Ben Skeggs
81eaff44c4
nouveau: NV4c ctx ucode.
...
Seems we already have a nv4c_ctx_init() somehow, a quick check shows the
ucode matches it still.
2007-08-22 13:09:27 +10:00
Ben Skeggs
ae883c97ad
nouveau/nv50: Correct thinko for 8800 chips + cleanup a bit.
2007-08-22 12:54:26 +10:00
Stephane Marchesin
c8ee6a6cab
nouveau: redo nv30_graph.c. Should work better, but we still lack a couple of cards.
2007-08-22 04:20:50 +02:00
Stephane Marchesin
76337bdb19
nouveau: fix the comment and debug message for PCIGART size
2007-08-22 04:20:50 +02:00
Ben Skeggs
03c0490129
nouveau: Add NV44 ctx ucode. Patch from stillunknown.
...
Microcode is similar enough to the NV4A one that it should be able to use
the same initial PGRAPH context. One day this mess will go away, honest..
2007-08-21 02:23:21 +10:00
Ben Skeggs
216f1b0573
nouveau: Poke 0x2230 on NV47 also.
...
Makes 0x2220 work the same way as on NV40.
2007-08-21 02:18:27 +10:00
Patrice Mandin
c8760c7999
Check also for Linux, as it's not supported on different OS
2007-08-19 18:45:01 +02:00
Patrice Mandin
a122e7dabf
Function pci_get_bus_and_slot needs 2.6.19 or later
2007-08-19 18:41:18 +02:00
Eric Anholt
0055fd5c35
Merge branch 'master' into bo-set-pin
2007-08-16 09:23:09 -07:00
Ben Skeggs
8a4d7f34d9
nouveau: Detect memory on NFORCE/NFORCE2 correctly.
2007-08-17 01:12:46 +10:00
Ben Skeggs
10f9b7bd0b
nouveau: Use count parameter in nouveau_notifier_alloc().
2007-08-15 14:14:23 +10:00
Ben Skeggs
a615d2fde7
nouveau: Turn some messages into DRM_DEBUGs..
2007-08-15 14:01:35 +10:00
Ben Skeggs
c3faa589b0
nouveau: Allow GART notifiers when using sgdma code.
2007-08-15 13:36:54 +10:00
Ben Skeggs
ee01d3755a
nouveau: Workaround mysterious PRAMIN clobbering by the card.
2007-08-15 13:34:57 +10:00
Ian Romanick
f563a50d14
Eliminate unused / useless ioctls.
2007-08-14 13:44:51 -07:00
Ben Skeggs
a6ea60c77e
nouveau: Catch all NV4x chips instead of just NV_40.
2007-08-15 01:40:46 +10:00
Ben Skeggs
02c4e0e757
nouveau/nv40: Fix channel scheduling.
...
Ensure NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLE gets set, otherwise channels
will appear to "freeze" in some circumstances.
2007-08-15 01:04:41 +10:00
Dave Airlie
da27986870
i915: i965 non-secure batchbuffer bit has moved.
2007-08-11 08:57:53 +10:00
Ben Skeggs
a46104674f
nouveau/nv50: demagic instmem setup.
2007-08-10 14:22:50 +10:00
Ben Skeggs
39907f613b
nouveau: Allow creation of gpuobjs before any other init has taken place.
2007-08-10 13:53:10 +10:00
Ian Romanick
aea6b4dea9
Unify alloc and free ioctls.
...
The DRM_XGI_PCIE_ALLOC and DRM_XGI_FB_ALLOC ioctls (and the matching
free ioctls) are unified to DRM_XGI_ALLOC. The desired memory region
is selected by xgi_mem_alloc::location. The region is magically
encoded in xgi_mem_alloc::index, which is used to release the memory.
Bump to version 0.11.0. This update requires a new DDX.
2007-08-09 15:30:36 -07:00
Ben Skeggs
7784e8c6e7
nouveau: silence irq handler a bit
2007-08-09 11:12:13 +10:00
Ben Skeggs
7281463f8d
nouveau/nv40: add some missing pciids.
2007-08-09 10:23:36 +10:00
Matthieu Castet
e326acf549
nouveau : nv10, nv20, nv30 : don't save all channel in the same RAMFC entry
...
This should improve multi fifo
2007-08-08 22:55:32 +02:00
Ben Skeggs
05633ca370
nouveau: Always allocate drm's push buffer in VRAM
...
Fixes #11868
2007-08-08 16:37:55 +10:00
Ben Skeggs
40f2156356
nouveau: return channel id
2007-08-08 16:12:19 +10:00
Ben Skeggs
296050eee6
nouveau/nv50: hack up initial channel context from current state
...
We really should be providing static values like the nv40 PGRAPH code does,
however, this will do for now to keep X at least working.
2007-08-08 13:01:29 +10:00
Ben Skeggs
4ad487190d
nouveau: enable/disable engine-specific interrupts in _init()/_takedown()
...
All interrupts are still masked by PMC until init is finished.
2007-08-08 10:49:05 +10:00
Matthieu Castet
a4759b8513
nouveau : fix enable irq (in the previous code all irq were masked by engine
...
init after irq_postinstall)
2007-08-07 23:09:44 +02:00
Ben Skeggs
66f5232d93
nouveau: Init global gpuobj list early, unbreaks sgdma code.
2007-08-07 01:52:49 +10:00
Stephane Marchesin
ac24f328ec
nouveau: Bump PCI GART to 16MB
2007-08-06 17:16:05 +02:00
Ben Skeggs
8d5a8ebc31
nouveau: ouch, add nouveau_dma.[ch] files..
2007-08-06 22:32:36 +10:00
Ben Skeggs
7a0a812ea4
nouveau: Remove PGRAPH_SURFACE hack, it wont work now anyway.
...
Need to find another way of doing this, ideally someone'd hunt down which
object/method controls it! The Xv blit adaptor is likely now broken on
cards that have pNv->WaitVSyncPossible enabled.
2007-08-06 22:09:15 +10:00
Ben Skeggs
cf04641bc6
nouveau: Give DRM its own gpu channel
...
If your card doesn't have working context switching, it is now broken.
2007-08-06 22:05:31 +10:00
Ben Skeggs
51f24be578
nouveau: Determine trapped channel id from active grctx on >=NV40
2007-08-06 21:46:55 +10:00
Ben Skeggs
97770db720
nouveau: Various internal and external API changes
...
1. DRM_NOUVEAU_GPUOBJ_FREE
Used to free GPU objects. The obvious usage case is for Gr objects,
but notifiers can also be destroyed in the same way.
GPU objects gain a destructor method and private data fields with
this change, so other specialised cases (like notifiers) can be
implemented on top of gpuobjs.
2. DRM_NOUVEAU_CHANNEL_FREE
3. DRM_NOUVEAU_CARD_INIT
Ideally we'd do init during module load, but this isn't currently
possible. Doing init during firstopen() is bad as X has a love of
opening/closing the DRM many times during startup. Once the
modesetting-101 branch is merged this can go away.
IRQs are enabled in nouveau_card_init() now, rather than having the
X server call drmCtlInstHandler(). We'll need this for when we give
the kernel module its own channel.
4. DRM_NOUVEAU_GETPARAM
Add CHIPSET_ID value, which will return the chipset id derived
from NV_PMC_BOOT_0.
4. Use list_* in a few places, rather than home-brewed stuff.
2007-08-06 21:45:18 +10:00
Ben Skeggs
beaa0c9a28
nouveau: Pass channel struct around instead of channel id.
2007-08-06 03:40:43 +10:00
Patrice Mandin
2453ba19b6
nouveau:nv10: fill and use load,save graph context functions
2007-08-03 23:06:39 +02:00
Arthur Huillet
f01026eae6
nouveau: creating notifier in PCI memory for PCIGART
2007-07-27 15:48:04 +02:00
Ian Romanick
c561cb4650
Merge branch 'master' of ssh+git://git.freedesktop.org/git/mesa/drm into xgi-0-0-2
...
Conflicts:
linux-core/drmP.h
linux-core/drm_scatter.c
2007-07-26 16:58:28 -07:00
Eric Anholt
cf2d569dac
Replace NO_MOVE/NO_EVICT flags to buffer objects with an ioctl to set pinning.
...
This cleans up the create/validate interfaces for this very uncommon path, and
makes pinned object creation much easier to use for the X Server.
2007-07-26 10:15:11 -07:00
Ian Romanick
887cb31ee9
Fix bug preventing X server from restarting.
...
The core DRM lastclose routine automatically destroys all mappings and
releases SG memory. XP10 DRM and DDX assumed this data stayed around
until module unload. xgi_bootstrap was reworked to recreate all these
mappings. In addition, the drm_addmap for the GART backing store was
moved into the kernel. This causes a change to the ioctl protocol and
a version bump.
2007-07-24 13:27:44 -07:00
Ian Romanick
877296ade0
xgi_mem_alloc::offset is a hardware offset, so it should be u32, not long.
2007-07-21 21:36:11 -07:00
Ian Romanick
5d6fdd9d79
Clean up xgi_cmd_info and associated code.
...
There were numerous unnecessary fields in xgi_cmd_info. The remaining
fields had pretty crummy names. Cut out the cruft, and rename the
rest. As a result, the unused parameter "triggerCounter" to
triggerHWCommandList can be removed.
2007-07-21 20:34:56 -07:00
Eric Anholt
5b38e13416
Replace DRM_IOCTL_ARGS with (dev, data, file_priv) and remove DRM_DEVICE.
...
The data is now in kernel space, copied in/out as appropriate according to the
This results in DRM_COPY_{TO,FROM}_USER going away, and error paths to deal
with those failures. This also means that XFree86 4.2.0 support for i810 DRM
is lost.
2007-07-20 18:16:42 -07:00
Eric Anholt
c1119b1b09
Replace filp in ioctl arguments with drm_file *file_priv.
...
As a fallout, replace filp storage with file_priv storage for "unique
identifier of a client" all over the DRM. There is a 1:1 mapping, so this
should be a noop. This could be a minor performance improvement, as everything
on Linux dereferenced filp to get file_priv anyway, while only the mmap ioctls
went the other direction.
2007-07-20 13:39:45 -07:00
Eric Anholt
e39286eb5e
Remove DRM_ERR OS macro.
...
This was used to make all ioctl handlers return -errno on linux and errno on
*BSD. Instead, just return -errno in shared code, and flip sign on return from
shared code to *BSD code.
2007-07-20 12:53:52 -07:00
Ian Romanick
5ba94c2ab8
Initial pass at converting driver to DRM infrastructure.
2007-07-19 10:29:18 -07:00
Eric Anholt
f4e1c1d05c
FreeBSD warnings cleanup.
2007-07-19 06:46:13 -07:00
Eric Anholt
05204b9c8d
Merge branch 'origin'
2007-07-19 06:31:26 -07:00
Ben Skeggs
0c95d489ab
nouveau/nv50: get non-default push buffer sizes working.
2007-07-19 16:43:37 +10:00
Eric Anholt
33a50412c2
Add dry-coded DRM drawable private information storage for FreeBSD.
...
With this, all modules build again.
2007-07-18 14:22:49 -07:00
Pekka Paalanen
af4cfa624a
nouveau: Make nouveau_wait_for_idle() read PTIMER.
...
Following my nv28 kmmio dumps, nouveau_wait_for_idle() is modified to
read PTIMER and NV03_PMC_ENABLE. Also a timeout based on PTIMER value is
added, so wait_for_idle() cannot stall indefinitely (unless PTIMER is
halted). The timeout was selected as 1 giga-ticks, which for me is 1s.
2007-07-18 14:23:41 +03:00
Pekka Paalanen
696bee093f
nouveau: Add read() method to Engine.timer.
...
This is not called from anywhere, yet.
2007-07-18 14:12:26 +03:00
Pekka Paalanen
0c77f5abea
nouveau: Add bitfield names for NSOURCE and NSTATUS.
...
Name strings and pretty-printing in nouveau_graph_dump_trap_info().
2007-07-18 14:00:04 +03:00
Pekka Paalanen
14ecf8d6c2
nouveau: Replace 0x00400104 and 0x00400108 with names.
...
NV03_PGRAPH_NSTATUS and NV03_PGRAPH_NSOURCE.
The prefix NV03 is chosen because nv10reg.h had no versioned prefix,
and the code using these registers does not check card_type.
2007-07-18 13:52:39 +03:00
Dave Airlie
a64b5d8d37
fix some missing whitespace/tab
2007-07-18 15:49:45 +10:00
Dave Airlie
6ad1df2176
drm: remove drm_u64_t, replace with uint64_t everwhere
...
This might break something, stdint.h inclusion in drm.h maybe required
but I'm not sure yet what platforms have it what ones don't.
2007-07-18 09:42:06 +10:00
Ian Romanick
8d60bf2f19
Add XP5 and XP10 PCI IDs.
2007-07-16 22:15:41 -07:00
Ian Romanick
2b6ea46513
Eliminate unnecessary structures and defines.
2007-07-16 21:11:22 -07:00
Ben Skeggs
875dd1e538
nouveau: Destroy PGRAPH context table on PGRAPH takedown
2007-07-17 14:06:05 +10:00
Ian Romanick
658ff2daf3
Eliminate several useless ioctls and associated cruft.
...
The ioctlss XGI_ESC_DEVICE_INFO, XGI_ESC_MEM_COLLECT,
XGI_ESC_PCIE_CHECK, XGI_ESC_GET_SCREEN_INFO, XGI_ESC_PUT_SCREEN_INFO,
XGI_ESC_MMIO_INFO, and XGI_ESC_SAREA_INFO, are completely unnecessary.
The will be doubly useless when the driver is converted to the DRM
infrastructure.
2007-07-16 20:58:43 -07:00
Ben Skeggs
ec67c2def9
nouveau: G8x PCIEGART
...
Actually a NV04-NV50 ttm backend for both PCI and PCIEGART, but PCIGART
support for G8X using the current mm has been hacked on top of it.
2007-07-17 13:51:14 +10:00
Ian Romanick
70a8a60a3e
Correct errors in the usage of pci_map_page.
...
With these changes the driver no longer instantly hard-locks a 6600LE
on a PowerPC G5. I haven't tested any 3D apps yet.
2007-07-16 10:56:43 -07:00
Eric Anholt
3f04fe7890
Fix FreeBSD build.
2007-07-16 01:53:06 -07:00
Dave Airlie
24311d5d82
drm: remove drm_buf_t
2007-07-16 13:42:11 +10:00
Dave Airlie
be85ad0333
drm: detypedef ttm/bo/fence code
2007-07-16 13:37:02 +10:00
Dave Airlie
6dce9e0735
drm: remove hashtab/sman and object typedefs
2007-07-16 12:48:44 +10:00
Dave Airlie
21ee6fbfb8
drm: remove drmP.h internal typedefs
2007-07-16 12:32:51 +10:00
Dave Airlie
1a07256d60
drm: remove ttm userspace typedefs
2007-07-16 11:30:53 +10:00
Dave Airlie
b95ac8b7b3
drm: detypedef drm.h and fixup all problems
2007-07-16 11:22:15 +10:00
Dave Airlie
f174f835ff
drm: remove typedefs in drm.h to their own section
2007-07-16 10:13:58 +10:00
Dave Airlie
2134193af6
Merge branch 'drm-ttm-cleanup-branch'
2007-07-16 10:05:20 +10:00
Patrice Mandin
bc7d6c76fa
nouveau: nv10 and nv11/15 are different
2007-07-14 18:32:11 +02:00
Arthur Huillet
aa6d9199fa
applied patch from Ian Romanick fixing PCI DMA object creation code
2007-07-13 20:51:52 +02:00
Arthur Huillet
5ae3ad4f01
now attempting to create PCI object only when there is a pci_heap
2007-07-13 16:00:03 +02:00
Ben Skeggs
0029713451
nouveau: nuke internal typedefs, and drm_device_t use.
2007-07-13 15:09:31 +10:00
Ian Romanick
5522136b7f
Merge branch 'master' into xgi-0-0-2
2007-07-12 15:28:17 -07:00
Ben Skeggs
851c950d98
nouveau: unbreak AGP
2007-07-13 02:18:59 +10:00
Ben Skeggs
af317f1cc7
nouveau: mem_alloc() returns offsets, not absolute addresses now.
2007-07-12 11:55:47 +10:00
Ben Skeggs
522a0c868c
nouveau: nuke left over debug message
2007-07-12 11:39:45 +10:00
Ben Skeggs
750371cb6e
nouveau: separate region_offset into map_handle and offset.
2007-07-12 10:46:57 +10:00
Arthur Huillet
5fbdf9da8b
fixed object creation code to not Oops on 64bits, worked around memalloc not working on 64bit for PCIGART
2007-07-12 02:35:39 +02:00
Arthur Huillet
b301a9051b
NV50 will not attempt to use PCIGART now
2007-07-11 15:01:37 +02:00
Arthur Huillet
d26ae22c2b
fixed bug that prevented PCIE cards from actually using PCIGART - NV50 will probably still have a problem
2007-07-11 14:56:27 +02:00
Ben Skeggs
5ccadac9e3
nouveau/nv50: G80 fixes.
...
Again, no hardware, so no idea if it'll even work yet. I understand how
the PRAMIN setup works now, un-hardcoding stuff will come "RealSoonNow(tm)".
2007-07-11 14:22:59 +10:00
Ben Skeggs
13e1377044
nouveau: Some checks on userspace object handles.
2007-07-11 12:39:30 +10:00
Dave Airlie
2c9e05cf4c
Merge branch 'master' into cleanup
...
Conflicts:
libdrm/xf86drm.c
linux-core/drm_bo.c
linux-core/drm_fence.c
2007-07-11 11:23:41 +10:00
Arthur Huillet
694e1c5c3f
Added support for PCIGART for PCI(E) cards. Bumped DRM interface patchlevel.
2007-07-11 02:35:10 +02:00
Ian Romanick
a9c49be6f8
Fix ioctl types.
...
I had moved code from xgi_drv.h to xgi_drm.h before changing the ioctl
types for XGI_IOCTL_(FB|PCIE)_ALLOC.
2007-07-09 18:52:43 -07:00
Ian Romanick
1f4e24b429
Move types shared with user mode to xgi_drm.h.
2007-07-09 16:33:14 -07:00