63cf3b3da7
nouveau: nv10 ctx switch, some regs are nv17+ only
2007-02-02 20:08:33 +01:00
63f2abd721
Make also later kernels work with buffer object vm
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and clean up some function names.
2007-02-02 19:49:11 +01:00
c269d560e4
Make vm handle buffer objects instead of ttm objects.
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Remove ttm objects.
Make vm aware of PCI memory type buffer objects.
(Only works for pre 2.6.16 kernels for now).
2007-02-02 14:47:44 +01:00
8c17edf23c
Make git ignore generated config.h.in.
2007-02-02 13:24:19 +01:00
6c04185857
via: Try to improve command-buffer chaining.
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Bump driver date and patchlevel.
2007-02-02 09:22:30 +01:00
70bba11bc7
Disable AGP DMA for chips with the new 3D engine.
2007-02-02 09:22:15 +01:00
77a6d8ae93
Add Intel 965GM chipset support
2007-02-02 09:52:37 +08:00
9907b32c67
Revert origin crestline pci id patch
2007-02-02 09:51:38 +08:00
dd733dea38
Fix missing ttm_open_vma call from previous commit.
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Honour the ttm backend cant-use-aperture flag.
2007-02-01 13:19:05 +01:00
9677c5ecc6
Prepare for removal of the ttm_object type.
2007-02-01 10:53:55 +01:00
333c6af47a
Protect drm_mmap against disappearing maps.
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The map lists and hash tables are protected using dev->struct_mutex,
but drm_mmap strangely never locked this mutex.
2007-02-01 00:38:57 +01:00
3024f23c65
memory manager: Make device driver aware of different memory types.
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Memory types are either fixed (on-card or pre-bound AGP) or not fixed
(dynamically bound) to an aperture. They also carry information about:
1) Whether they can be mapped cached.
2) Whether they are at all mappable.
3) Whether they need an ioremap to be accessible from kernel space.
In this way VRAM memory and, for example, pre-bound AGP appear
identical to the memory manager.
This also makes support for unmappable VRAM simple to implement.
2007-01-31 14:50:57 +01:00
07fabc3fd8
Make the utility runnable also for normal users.
2007-01-31 11:41:44 +01:00
36d50687dd
Fix an error-path oops.
2007-01-31 11:03:53 +01:00
d399fcf46f
Add a buffer object transfer function.
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Creates a placeholder for the old buffer contents
when it is transfered to / from static memory like VRAM.
2007-01-30 16:20:23 +01:00
0932269656
Indent according to xorg rules.
2007-01-30 14:54:12 +01:00
2bc925430b
Add license header.
2007-01-30 14:54:12 +01:00
9968a21be1
Add some relevant tests for the new buffer object interface.
2007-01-30 14:54:12 +01:00
c01fe2cdd4
Add the ttmtest test utility.
2007-01-30 14:54:12 +01:00
9bbdc0fb10
Clean up buffer object destruction somewhat.
2007-01-30 12:35:49 +01:00
9a654e71bd
Use pre-defined list_splice function.
2007-01-29 13:37:02 +01:00
45418bb1b1
s/buf/bo/ for consistency.
2007-01-29 13:37:02 +01:00
1e4c7d69f5
Some cleanup. A buffer object should only have one active memory type.
2007-01-29 13:37:02 +01:00
ee4ac5c897
nouveau: determine chipset type at startup, instead of every time we use it.
2007-01-28 23:48:33 +11:00
c744bfde2d
make works ctx switch on nv10.
2007-01-26 21:57:44 +01:00
9c03ca81e7
nouveau: oops, wrong indexing in nv17 regs
2007-01-26 21:05:59 +01:00
5534c90ff3
nouveau: read gpu type once
2007-01-26 19:54:35 +01:00
05d3ed472e
nouveau: only save/restore nv17 regs on nv17,18 hw
2007-01-26 19:25:49 +01:00
e7ba15a003
nouveau: add extra pgraph registers
2007-01-26 19:24:34 +01:00
d4c9f135b5
nouveau: add some nv10 pgraph defines
2007-01-26 18:10:31 +01:00
6d9ef1a960
nouveau: simplify and fix BIG_ENDIAN flags
2007-01-25 23:06:48 +01:00
3886b7e629
Merge branch 'master' into crestline
2007-01-25 13:30:46 -08:00
582637641a
Remove a scary error printed when we were leaking memory caches.
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We don't use memory caches anymore...
Fix memory accounting initialization to only use low or DMA32 memory.
2007-01-25 14:27:29 +01:00
90ae39d2f0
nouveau: nv4c default context
2007-01-25 11:11:01 +11:00
aa7266385e
nouveau: always print nsource/nstatus regs on PGRAPH errors
2007-01-25 08:16:23 +11:00
7d4e6b1445
vblank interrupt fix
2007-01-24 16:33:21 +08:00
19ba074938
nouveau: fix getparam from 32-bit client on 64-bit kernel
2007-01-19 15:41:51 +11:00
4291df69bd
nouveau: re-add 6150 Go pciid (0x0244)
2007-01-19 15:16:18 +11:00
a40de938fa
nouveau: cleanup nv30_graph.c
2007-01-18 21:40:21 -05:00
ab72a7714e
nouveau: Remove write to CTX_SIZE. This gives us proper nv3x PGRAPH switching.
2007-01-18 21:40:21 -05:00
bd0418cb01
add missing quadro id
2007-01-18 17:35:28 +11:00
78a4f5c1bc
nouveau: Try to get nv35 pgraph switching working. Doesn't quite yet.
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Hook into nv20 pgraph switching functions (they're identical for nv3x).
Actually call nv30_pgraph_context_init so the ctx_table is allocated.
Thanks to Carlos Martin for the help.
2007-01-17 08:46:59 -05:00
9f5cda44db
Merge branch 'master' into crestline
2007-01-16 09:49:20 +08:00
fdbc34fab0
nouveau: opps nv20 ctx ramin size was wrong
2007-01-14 20:04:20 +01:00
06cd155595
nouveau: opps restored the wrong channel
2007-01-13 23:30:43 +01:00
f04347f371
nouveau: nv20 graph ctx switch.
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Untested...
2007-01-13 23:19:41 +01:00
cd5f543b2f
nouveau: first step to make graph ctx works
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It is still not working, but now we could use some 3D commands
without needed to run nvidia blob before.
2007-01-13 21:44:50 +01:00
4ae64a1b58
nouveau: add and indent pgraph regs
2007-01-13 21:44:50 +01:00
1967aa82cf
nouveau: Oops, fix the nv04 RAMFC_DMA_FETCH value.
2007-01-13 12:32:50 +01:00
69a98d89d5
nouveau: add missing symlink
2007-01-13 08:43:15 +11:00
Matthieu Castet
Thomas Hellstrom
Michel Dänzer
Wang Zhenyu
Ben Skeggs
Patrice Mandin
Nian Wu
Zou Nan hai
Jeremy Kolb
Dave Jones
Xiang, Haihao
Matthieu Castet
Stephane Marchesin
Dave Airlie