8efddd01e8
sparse cleanups from kernel: Al Viro
2004-07-15 13:03:55 +00:00
4cfd0d5cee
whitespace align with kernel
2004-07-05 11:44:30 +00:00
43c244ebba
fix whitespace issue in previous patch
2004-05-18 23:30:46 +00:00
aa142ff1b5
add R200_EMIT_RB3D_BLENDCOLOR state packet to support GL_EXT_blend_color,
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GL_EXT_blend_func_separate and GL_EXT_blend_equation_separate on r200
2004-05-18 23:03:22 +00:00
bc1428035c
fixes from Linux kernel
2004-04-08 12:05:25 +00:00
0dea4de288
Make sure that all state packets are handled in
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radeon_check_and_fixup_packets()
Fix state packet IDs of R200 cubic offsets
2004-01-10 20:59:16 +00:00
7b62ed9aed
R200_PP_CUBIC_OFFSET_F1_[0-6] state packets only contain 5 offsets, not 6
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(thanks to Andreas Stenglein for spotting this)
2004-01-10 12:28:06 +00:00
2655ccddf4
Memory layout transition:
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the 2D driver initializes MC_FB_LOCATION and related registers sanely
the DRM deduces the layout from these registers
clients use the new SETPARAM ioctl to tell the DRM where they think the
framebuffer is located in the card's address space
the DRM uses all this information to check client state and fix it up if
necessary
This is a prerequisite for things like direct rendering with IGP chips and
video capturing.
2003-11-04 00:46:05 +00:00
062751ac47
Remove artificial PCI GART limitations, rename AGP to GART where
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appropriate
2003-08-26 15:44:01 +00:00
9e7d6177d1
Possibly fix stanford checker complaints about sarea
2003-06-16 10:40:52 +00:00
0b01c70d59
Texture rectangle support for r100
2003-06-10 18:54:17 +00:00
98840144b1
Revert bogus last commit
2003-06-09 23:12:33 +00:00
1062b9930f
Don't activate blend fallbacks unless blending is enabled
2003-06-09 23:11:23 +00:00
13211ad82c
add more get_param queries for embedded project
2003-04-22 09:49:14 +00:00
1728bc637d
merged drm-filp-0-1-branch
2003-03-28 14:27:37 +00:00
fac2ed4d10
fix EAGAIN handling in radeon_cp_dispatch_texture() (fixes corruption of
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large textures), and get rid of superfluous local y variable
2003-02-06 18:20:00 +00:00
9b9b099471
Add cast to avoid void * arithmetic warning
2003-01-26 22:25:35 +00:00
b03fa556b2
Rewrite radeon_cp_dispatch_texture() to avoid pingponging back to userspace
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when issue large (multi-buffer) uploads.
2002-12-06 12:22:43 +00:00
5e1b8ed88a
preserve CRTC{,2}_OFFSET_CNTL in 2D driver to avoid bad effects when
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pageflipping after a mode switch
take current page into account in AdjustFrame(); writing the CRTC offset
via the CP was probably a bad idea as this can happen asynchronously,
reverted
take frame offset into account when flipping pages
handle CRTC2 as well for pageflipping (untested)
preserve GEN_INT_CNTL on mode switches to prevent interrupts from getting
disabled
2002-10-29 13:49:26 +00:00
ff25e7016c
merge from mesa-4-1-branch to get cube-map registers. bumped version to 1.7
2002-10-28 19:05:40 +00:00
f40674ea9f
change RADEON_PARAM_IRQ_ACTIVE to RADEON_PARAM_IRQ_NR
2002-09-25 19:48:51 +00:00
f1c8fe9557
merged r200-0-2-branch to trunk
2002-09-23 17:26:43 +00:00
4fcde1efc1
standardize use of __FUNCTION__ (Linus)
2002-08-29 07:34:49 +00:00
48cc350e21
merged r200-0-1-branch
2002-08-26 22:16:18 +00:00
33d57137da
zero-cliprect case patch from Jacek
2002-08-12 07:26:00 +00:00
d0ac4e5ad0
test scratch register writeback before using it
2002-08-11 15:56:44 +00:00
881a9b214d
fix off-by-one error for right bottom corner in radeon_emit_clip_rect()
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(Jacek Rosik)
2002-07-18 23:17:13 +00:00
8fa8db126a
Workaround for Radeon lockups on fast machines
2002-07-17 08:30:36 +00:00
fd86ac9561
Don't read scratch registers directly, obtain the values via the GET_PARAM
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ioctl. The DRM reads them from memory addresses the chip writes to on
updates. Fall back to reading the registers directly with an old DRM.
(Tim Smith, cleanups by myself)
2002-07-11 20:31:12 +00:00
74ef13fd00
merged bsd-3-0-0-branch
2002-07-05 08:31:11 +00:00
Dave Airlie
Roland Scheidegger
Michel Daenzer
Keith Whitwell
Leif Delgass
Brian Paul
Tim Smith
Alan Hourihane