2a2d02bbc5
Added small modesetting test
2007-09-24 14:53:10 +02:00
9ccb8440f3
Changed mode config spinlock to mutex
2007-07-20 11:36:57 +02:00
43c9abdedc
Fix unlocking of spinlock when we should not
2007-07-19 16:58:23 +02:00
70fd9351ed
Move out the code from i915_dma_cleanup to unload to match
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existing code.
This needs verifying.
2007-06-29 21:04:17 +01:00
adff58223f
Bring back code from merge that was accidentally removed.
2007-06-29 20:58:16 +01:00
14c49df06b
merge fixes
2007-06-29 20:14:09 +01:00
8a78dead29
Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
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Conflicts:
linux-core/drm_drv.c
linux-core/drm_fops.c
linux-core/drm_objects.h
linux-core/drm_stub.c
shared-core/i915_dma.c
2007-06-29 20:09:44 +01:00
a27af4c4a6
Avoid hitting BUG() for kernel-only fence objects.
2007-06-29 15:22:28 +02:00
00f1a66f22
Fence object reference / dereference cleanup.
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Buffer object dereference cleanup.
Add a struct drm_device member to fence objects:
This can simplify code, particularly in drivers.
2007-06-29 12:58:45 +02:00
e26ec51146
nouveau: small RAMFC cleanups
2007-06-29 14:20:50 +10:00
e79e2a5816
Fix type/flags usage problem to check for preferred modes.
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Add more debugging to help diagnose problems.
2007-06-28 21:25:13 +01:00
1c32fecd6d
nouveau: Hack around possible Xv blit adaptor breakage
2007-06-28 21:01:17 +10:00
2dd85772aa
nouveau/nv10: Fix earlier NV1x chips
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Can't use nv04 code for them, since an extra field was inserted into
RAMFC after DMA_PUT/GET.
2007-06-28 04:23:17 +10:00
68ecf61647
nouveau: never touch PRAMIN with NV_WRITE, cleanup RAMHT code a bit
2007-06-28 03:26:44 +10:00
18a6d1c9c3
nouveau: simplify PRAMIN access
2007-06-28 03:26:44 +10:00
38617b6a26
nouveau: name some regs
2007-06-28 03:26:44 +10:00
ce0d528d3c
nouveau/nv50: skeletal backend
2007-06-28 03:26:43 +10:00
695599f18d
nouveau: Nuke DMA_OBJECT_INIT ioctl (bumps interface to 0.0.7)
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For various reasons, this ioctl was a bad idea.
At channel creation we now automatically create DMA objects covering
available VRAM and GART memory, where the client used to do this themselves.
However, there is still a need to be able to create DMA objects pointing at
specific areas of memory (ie. notifiers). Each channel is now allocated a
small amount of memory from which a client can suballocate things (such as
notifiers), and have a DMA object created which covers the suballocated area.
The NOTIFIER_ALLOC ioctl exposes this functionality.
2007-06-28 03:26:43 +10:00
4f2dd78ff3
nouveau/nv04: Set NV_PFIFO_CACHE1_PUSH1 correctly + small tweaks
2007-06-28 03:04:48 +10:00
5c27f8a70e
Add support SiS based XGI chips to SiS DRM.
2007-06-26 09:51:55 -07:00
9f617522d9
nouveau: NV49/NV4B PGRAPH setup from jb17bsome and stephan_2303
2007-06-25 01:57:57 +10:00
3dfc13e2da
nouveau: kill some dead code
2007-06-24 19:00:44 +10:00
5f05cd7086
nouveau: NV04/NV10/NV20 PGRAPH engtab functions
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NV04/NV10 load_context()/save_context() are stubs. I don't know enough about
how they work to implement them sanely. The "old" context_switch() code
remains hooked up, so it shouldn't break anything.
NV20 will probably break if load_context() works. No inital context values
are filled in, so when the first channel is created PGRAPH will probably end
up having its state zeroed. Some setup from nv20_graph_init() will probably
need to be moved to the per-channel context setup.
2007-06-24 19:00:26 +10:00
5d55b0655c
nouveau: NV3X PGRAPH engtab functions
2007-06-24 18:58:38 +10:00
341bc78207
nouveau: NV1X/2X/3X PFIFO engtab functions
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Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC
entry size.
2007-06-24 18:58:14 +10:00
05d86d950a
nouveau: NV04 PFIFO engtab functions
2007-06-24 18:57:09 +10:00
acb710d1a5
nouveau: NV4X PGRAPH engtab functions
2007-06-24 18:56:40 +10:00
f2e64d5276
nouveau: NV4X PFIFO engtab functions
2007-06-24 18:56:01 +10:00
0afb3b518e
nouveau: split PFIFO/PGRAPH context creation
2007-06-24 18:55:23 +10:00
9dbf322d26
nouveau: (mostly) hook up put_base again
2007-06-24 18:55:06 +10:00
24b71c318a
nouveau: prototype PFIFO/PGRAPH engtab API
2007-06-24 18:54:51 +10:00
5c7c07fd49
nouveau: rename engtab functions
2007-06-24 18:54:36 +10:00
068ffc1e1b
radeon: Acknowledge all interrupts we're interested in.
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Failure to do so was probably the root cause of fd.o bug 11287.
2007-06-22 11:55:26 +02:00
40f6a696cb
r300: Synchronized the register defines file; documentation changes.
2007-06-21 14:35:11 +00:00
213732af43
r300: Allow writes to R300_VAP_PVS_WAITIDLE.
2007-06-21 14:32:58 +00:00
215787e429
r300: Registers 0x2220-0x2230 are known as R300_VAP_CLIP_X_0-R300_VAP_CLIP_Y_1.
2007-06-18 08:42:46 +00:00
8038e7b60f
r300: Synchronized the register defines file again.
2007-06-18 08:36:50 +00:00
638ebbab54
fix radeon setparam on 32/64 systems, harder.
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Commit 9b01bd5b284bbf519b726b39f1352023cb5e9e69 introduced a
compat_ioctl handler for RADEON_SETPARAM, the sole purpose of which was
to handle the fact that on i386, alignof(uint64_t)==4.
Unfortunately, this handler was installed for _all_ 64-bit
architectures, instead of only x86_64 and ia64. And thus it breaks
32-bit compatibility on every other arch, where 64-bit integers are
aligned to 8 bytes in 32-bit mode just the same as in 64-bit mode.
Arnd has a cunning plan to use 'compat_u64' with appropriate alignment
attributes according to the 32-bit ABI, but for now let's just make the
compat_radeon_cp_setparam routine entirely disappear on 64-bit machines
whose 32-bit compat support isn't for i386. It would be a no-op with
compat_u64 anyway.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2007-06-18 12:46:00 +10:00
3d5d41fa98
i915: Fix handling of breadcrumb counter wraparounds.
2007-06-15 17:13:11 +02:00
84bea38353
Fix i915 sequence mask.
2007-06-15 10:35:52 +02:00
3ee31a1f35
Indentation fixes.
2007-06-15 10:31:32 +02:00
d34b2c7b9e
Fix refcounting / lock race.
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Reported by Steve Wilkins / Michel Dnzer.
2007-06-15 10:26:51 +02:00
e1b8eabeee
Locking fixes and instrumentation.
2007-06-15 10:26:51 +02:00
2407ce57de
Fix drmMMUnlock / drmMMLock return values.
2007-06-13 15:59:28 +02:00
62082ab3e6
Make sure we read fence->signaled while spinlocked.
2007-06-13 15:38:59 +02:00
5156f1c897
Fix fence object deref race.
2007-06-13 15:19:30 +02:00
280083d4a2
use krh's idr mods to remove lists from idr code
2007-06-10 15:40:21 +10:00
3181573073
r300: Added the CP maximum fetch size and ring rptr update variables.
2007-06-08 19:40:57 +00:00
7426da7538
oops must fix this properly at some point
2007-06-07 18:45:00 +10:00
e22f428f5f
drm: fix radeon setparam alignment issues on 32/64-bit
2007-06-07 18:41:18 +10:00
Jakob Bornecrantz
Alan Hourihane
Thomas Hellstrom
Ben Skeggs
Ian Romanick
Michel Dänzer
Oliver McFadden
David Woodhouse
Dave Airlie