Commit Graph

163 Commits (653b16f2dd32b5fdbd5f97277edc1c6df66755a9)

Author SHA1 Message Date
Dave Airlie b4803991c8 radeon: update proper chip family 2008-11-03 09:30:48 +10:00
Dave Airlie 3fd0e1483e radeon: fixup scratch register interactions properly 2008-11-03 09:29:22 +10:00
Dave Airlie a066a5f908 radeon: make writeback work again 2008-11-03 09:28:56 +10:00
Dave Airlie 0dbe3436ee radeon: fix some warnings 2008-11-03 09:28:36 +10:00
Dave Airlie 52ef9d87db radeon: fix small typo in agp code 2008-11-03 09:27:00 +10:00
Dave Airlie d275f99c9a radeon: don't enable dynclks on rs48x 2008-11-03 09:26:00 +10:00
Dave Airlie f74721fc25 radeon: fix unused agp functionality 2008-11-03 09:24:13 +10:00
Dave Airlie 26076bf24a radeon: add initial agp support.
This add agpmode command line option.
2008-10-16 10:59:31 +10:00
Dave Airlie 972f657265 Merge remote branch 'origin/master' into modesetting-gem
Conflicts:

	libdrm/Makefile.am
	libdrm/dri_bufmgr.h
	linux-core/drm_irq.c
	linux-core/drm_sysfs.c
	linux-core/drm_ttm.c
	shared-core/i915_dma.c
	shared-core/i915_irq.c
	shared-core/nouveau_drv.h
	shared-core/radeon_cp.c
2008-09-30 14:13:49 +10:00
Dave Airlie 35e379ce5a radeon: add r600 modesetting registers writes 2008-09-24 15:25:35 +10:00
Alex Deucher 34af71c42a radeon: add function to configure PCIE lanes 2008-09-18 16:07:41 -04:00
Alex Deucher e1e782af5d Radeon: restructure PLL data
- store pixel clocks, core clock, and memory clocks separately
- grab all pll limits from bios tables
2008-09-18 15:11:48 -04:00
Dave Airlie 8f38c28a39 radeon: fail properly if we can't create the ring.
Normally this will be due to an AGP driver needing updating
2008-09-18 10:19:08 +10:00
Dave Airlie 515aa0800c radeon: do proper memory controller init and setup 2008-09-18 10:17:27 +10:00
Dave Airlie ed961cb428 radeon: remove unneeded debugging 2008-09-18 10:14:32 +10:00
Dave Airlie 2a6dad31d8 radeon: add initial suspend/resume support
plus a bunch of fixes
2008-09-18 10:11:23 +10:00
Dave Airlie cd7d71f19c radeon: make writeback work after suspend/resume.
While re-writing this for modesetting, I find we disable writeback on
resume.
2008-08-31 07:27:26 +10:00
Alex Deucher aed70622ab radeon: first pass at bios scratch regs
- todo: updated connected status
2008-08-17 18:09:07 -04:00
Dave Airlie 30ff279e42 radeon: add support for memory map init 2008-08-14 14:43:51 +10:00
Dave Airlie 2d4420c666 Merge branch 'radeon-gem-cs' into modesetting-gem
Conflicts:

	libdrm/xf86drm.c
	linux-core/Makefile.kernel
	linux-core/drmP.h
	linux-core/drm_compat.h
	linux-core/drm_drv.c
	linux-core/drm_stub.c
	linux-core/drm_vm.c
	shared-core/i915_dma.c
	shared-core/r300_cmdbuf.c
	shared-core/radeon_drv.h
2008-08-14 09:36:34 +10:00
Alex Deucher 5f427e9aae Brute force port of legacy crtc/encoder code
- removed save/init/restore chain with set functions
2008-08-14 09:19:02 +10:00
Dave Airlie c2184e450e radeon: add initial support for legacy crtc/encoders.
not all there yet
2008-08-08 16:04:45 +10:00
Dave Airlie 513d4c3ff1 radeon: fix setting new memmap in right place 2008-08-06 10:21:20 +10:00
Dave Airlie aa8e15f8b5 radeon: add userspace mm enable switch 2008-08-04 14:59:17 +10:00
Dave Airlie af6efc3d77 i915/radeon: use rmmap locked 2008-08-04 14:54:02 +10:00
Kristian Høgsberg 5052e966ec Merge commit 'origin/master' into modesetting-gem
Conflicts:
	linux-core/Makefile.kernel
	linux-core/ati_pcigart.c
	linux-core/drm_compat.h
	linux-core/drm_irq.c
	linux-core/drm_lock.c
	linux-core/i915_drv.c
	shared-core/i915_dma.c
	shared-core/i915_drv.h
	shared-core/i915_irq.c
	shared-core/nouveau_mem.c
	shared-core/radeon_cp.c
	shared-core/radeon_drv.h
2008-07-31 15:18:32 -04:00
Dave Airlie dc3a7c023d r300: initial command stream parser for packet 0.
this at least parses the DDX stream and lets me run gnome-terminal/metacity
2008-07-28 17:27:24 +10:00
Dave Airlie 38835f9cd2 radeon command submission start
take code from Jerome munge into a TTM IB re-use
2008-07-28 15:21:13 +10:00
Dave Airlie df9871064e radeon: add initial atombios modesetting and GEM -> TTM translation layer.
This is an initial import of the atom bios parser with modesetting support
for r500 hw using atombios. It also includes a simple memory manager
layer that translates a radeon GEM style interface onto TTM internally.

So far this memory manager has only been used for pinned object allocation
for the DDX to test modesetting.
2008-07-26 08:56:23 +10:00
Dave Airlie 7cfdba2b30 radeon: remove microcode version 2008-07-18 14:36:47 +10:00
Dave Airlie abdd523c75 drm: add fix for PAT on radeon with 2.6.26 2008-07-15 16:18:22 +10:00
Jerome Glisse 59112c9e52 radeon: *really* fix screen corruption thanks to Lukasz Krotowski 2008-06-15 20:18:29 +02:00
Jerome Glisse 1aafbb83d9 radeon: r345xx fixe hard lockup
This patch should fixe hard lockup and convert them in
softlockup (ie you can ssh the box but the gpu is busted
and we are waiting in loop for it to come back to reason).
2008-06-13 09:54:05 +02:00
Alex Deucher a07c82183a RADEON: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTAT
According to the hw guys, you should use DSTCACHE_CTLSTAT to flush
the 2D dst cache rather than RB2D_DSTCACHE_CTLSTAT.
2008-06-11 18:25:47 -04:00
Alex Deucher 4b8aecbde8 RADEON: Add untested support for RS400 chips
GART setup appears to work the same as RS480 chips.
Also RC4xx chips are actually RS400 based, not RS480 based.
2008-06-09 16:58:06 -04:00
Alex Deucher f6982b54c9 RADEON: switch IGP gart to use radeon_write_agp_base() 2008-06-09 16:28:35 -04:00
Dennis Kasprzyk 6905c7a29d radeon: Restore software interrupt on resume.
Fixes performance drop after suspend/resume on some systems.
2008-06-05 18:23:37 +02:00
Alex Deucher a12cbf8aa5 RADEON: fix typo in last commit 2008-05-30 18:20:01 -04:00
Dave Airlie 6e8a2cff66 r500: attempt to make AGP work by programming agp base in the MC correctly 2008-05-30 20:27:31 +10:00
Dave Airlie 5b86823fa3 radeon: split microcode out into a separate header file. 2008-05-28 11:12:57 +10:00
Alex Deucher 59c953245c RADEON: add get_param for number of GB pipes 2008-05-27 18:34:33 -04:00
Alex Deucher caace3692f RS4xx: separate out RS400 and RS480 IGP chips
RS400 (intel based IGP) and RS480 (AMD based IGP) have
different MC and GART setups.  Currently we only support
RS480.
2008-05-13 21:02:17 -04:00
Alex Deucher 10d754f0a2 RADEON: fix copy/pasto in last commit 2008-05-12 14:49:43 -04:00
Alex Deucher 75bc739bee R3/4/5: init pipe setup in drm
Similar (broken) code in mesa needs to be removed
2008-05-12 09:44:20 -04:00
Alex Deucher e16a7101e8 RADEON: cleanup radeon_do_engine_reset() 2008-05-12 09:35:06 -04:00
Alex Deucher 5532b8d2a0 R300+: fixup pixcache flush 2008-05-12 09:30:47 -04:00
Alex Deucher 3582e82f14 RS4xx: fix MCIND index mask 2008-05-12 09:24:13 -04:00
Alex Deucher d26af273f8 RADEON: write AGP_BASE_2 on chips that support it 2008-05-12 09:21:45 -04:00
Alex Deucher fb9eaff747 Radeon IGP: merge RS4xx/RS6xx gart setup 2008-05-12 09:13:44 -04:00
Alex Deucher 68b7f550ba Radeon IGP: wrap MCIND access
first step in merging rs4xx/rs6xx gart setup
2008-05-12 09:00:40 -04:00