Commit Graph

2971 Commits (65dd0e68ff0e0e354925adb7d5fffeb0ffbb485c)

Author SHA1 Message Date
Thomas Hellstrom 65dd0e68ff Fix up buffer manager locking. 2008-04-14 12:13:17 +02:00
Keith Packard b986d7d2c9 Save and restore dsparb and d_state regs 2008-04-11 20:31:07 -07:00
Patrice Mandin db61f02bd7 Missing KERNEL_VERSION macro 2008-04-07 22:24:24 +02:00
Hasso Tepper 27c3785d3f Add DragonFly BSD support for device creation
DragonFly behaves just like FreeBSD in this regard.
2008-04-07 15:27:43 +03:00
Ben Skeggs dfa9f03992 nouveau: enable accelerated move to sysmem 2008-04-07 13:29:11 +10:00
Ben Skeggs c12b60b509 nouveau: enable m2mf for tt<->vram moves, fix fence_poll 2008-04-07 13:05:51 +10:00
Thomas Hellstrom e89710bef7 Place highmem pages last in the ttm page array. 2008-04-06 11:21:22 +02:00
Thomas Hellstrom c3888b97f6 Use clflush() when available for cache flushing. 2008-04-06 10:32:02 +02:00
Thomas Hellstrom 51a0fdcf3f [I915] Fix VRAM eviction. 2008-04-06 10:30:27 +02:00
Thomas Hellstrom 87ae5b22e3 Fix emergency allocation accounting. 2008-04-06 10:30:27 +02:00
Maarten Maathuis 1692d30cea nv50: primitive i2c interrupt handler 2008-04-05 21:02:00 +02:00
Maarten Maathuis 3fc444a5e8 nv50: primitive display interrupt handler. 2008-04-03 01:13:31 +02:00
Dave Airlie 562f95ea96 nouveau: fix return from function..
dude kernel moduless use kernel errors :)

this fixes an oops on init when this codepath hits.
2008-03-31 11:34:48 +10:00
Thomas Hellstrom 22d931f966 Initialize the fence::error member. 2008-03-30 21:30:43 +02:00
Thomas Hellstrom 1f4ba62567 [i915] Report buffer state _after_ fence submission to user-space.
This fixes a problem where the wrong bo->fence_type was reported, and
also saves some memory space.
[bo core] export the drm_bo_fill_rep_arg function.
2008-03-30 15:14:45 +02:00
Thomas Hellström b8567bafff Don't call fence::poll during irq if there are no waiters. 2008-03-30 15:11:47 +02:00
Maarten Maathuis cf3c0123a0 nouveau: forgot to add a break 2008-03-30 14:50:41 +02:00
Maarten Maathuis 68b83a8813 nouveau: Add ctx values for nv86.
- Note that this may not work for all nv86.
2008-03-30 14:48:55 +02:00
Dave Airlie 753a4bdf1b drm/r300: fix wait interface mixup
This interface was defined completely wrong, however userspace has only
ever used 4 values from it (0x1, 0x2, 0x3 and 0x6), so fix the interface to do what userspace actually expected but define new defines for new users to use
it properly.
2008-03-30 07:33:39 +10:00
Oliver McFadden 1674d28179 r300: Correctly translate the value for the R300_CMD_WAIT command.
Previously, the R300_CMD_WAIT command would write the passed directly to the
hardware. However this is incorrect because the R300_WAIT_* values used are
internal interface values that do not map directly to the hardware.

The new function I have added translates the R300_WAIT_* values into appropriate
values for the hardware before writing the register.

Thanks to John Bridgman for pointing this out. :-)
2008-03-29 17:31:39 +00:00
Stuart Bennett a81d07f64d nouveau: nv20 bios does not initialise PTIMER
The wait functions depend on PTIMER, so write the old (incorrect, but working) values for uninitialised hw
2008-03-25 18:32:26 +00:00
Dave Airlie b0817a42e7 i915: fix oops on agp=off
Kernel bug 10289.
2008-03-24 18:52:26 +10:00
Dave Airlie 4323ee3e5b Merge branch 'r500-fp' 2008-03-24 18:47:50 +10:00
Ben Skeggs a244d29050 nouveau: silence warning 2008-03-24 03:26:37 +11:00
Ben Skeggs 24ba0c9c3b nv40: voodoo - not quite. 2008-03-24 03:26:34 +11:00
Ben Skeggs 6f4b3de284 nv40: allocate massive amount of PRAMIN for grctx on all chipsets.
More or less a workaround for issues on some chipsets where a context
switch results in critical data in PRAMIN being overwritten by the GPU.

The correct fix is known, but may take some time before it's a feasible
option.
2008-03-24 03:26:30 +11:00
Dave Airlie 36e11dd380 r500: fragment program upload is also used to upload constants.
Limit frag address to 8 bits
2008-03-21 16:59:52 +10:00
Dave Airlie 316979356f drm: fixup r500fp submission 2008-03-20 14:20:53 +10:00
Stuart Bennett 1021799b6c nouveau: do not set on-board timer's numerator/denominator to bad values 2008-03-20 02:57:58 +00:00
Alex Deucher 9e4f908287 RADEON: switch over to new production microcode
This needs to be tested thoroughly before pushing to the
kernel.
2008-03-19 15:37:56 -04:00
Alex Deucher d8af16d2a7 RADEON: production microcode for all radeons, r1xx-r6xx
This updated microcode is not in use yet.
2008-03-19 14:57:42 -04:00
Dave Airlie a3c808d8fe move some more r300 regs into not allowed on r500 2008-03-19 16:10:37 +10:00
Dave Airlie d18c2c6842 drm: add new rs690 pci id 2008-03-18 09:07:45 +10:00
Thomas Hellstrom 602800a280 Evict cached_mapped relocatee before applying reloc.
Fix that got left out after the intel-post-reloc merge.
2008-03-17 11:38:46 +01:00
Dave Airlie 3add949403 initial r500 RS and FP register and upload code 2008-03-17 11:08:03 +10:00
Dave Airlie 1f96e9a982 drm/pcigart: fix the pci gart to use the drm_pci wrapper.
This is the correct fix for the RS690 and hopefully the dma coherent work.

For now we limit everybody to a 32-bit DMA mask but it is possible for
RS690 to use a 40-bit DMA mask for the GART table itself,
and the PCIE cards can use 40-bits for the table entries.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-03-17 07:05:46 +10:00
Thomas Hellstrom 1a2d8c4bfa Avoid unnecessary waits for command regulator pause. 2008-03-16 20:07:14 +01:00
Thomas Hellstrom 3a3a9485aa [via] Remove some leftover vars. 2008-03-16 11:45:58 +01:00
Thomas Hellstrom b81d7b3b8d [via] Allow a little larger stride for SG DMA DownloadFromScreen. 2008-03-16 11:45:57 +01:00
Thomas Hellstrom 7d3d15e67d [via] The millionth fixup for the millionth-1 attempt to stabilize the AGP
DMA command submission. It's worth remembering that all new bright ideas on how
to make this command reader work properly and according to docs
will probably fail :( Bring in some old code.
2008-03-16 11:45:57 +01:00
Thomas Hellstrom 563fe9dcd4 [via] Fix driver after vblank-rework merge. 2008-03-16 11:45:57 +01:00
Dave Airlie afa803ee40 ati: fix rs690 igp gart by allocating the page table in 32-bit memory 2008-03-16 15:02:53 +10:00
Dave Airlie 5b1d9263d3 drm/rs690: set AGP_BASE_2 to 0 2008-03-16 14:00:16 +10:00
Dave Airlie dd9eb923ed drm: set rs690 gart base completly.
The docs state bits 4-11 represent bits 32-39 of a 40-bit address
2008-03-16 12:58:07 +10:00
Dave Airlie 76946ed83d drm: this u32 should be a dma_addr_t
doesn't fix anything but just making it consistent
2008-03-16 12:56:11 +10:00
Alan Hourihane 1ea8a470fe fix build problems 2008-03-14 00:25:42 +00:00
Mike Isely ae1bb96a7e drm: Fix race that can lockup the kernel
The i915_vblank_swap() function schedules an automatic buffer swap
upon receipt of the vertical sync interrupt.  Such an operation is
lengthy so it can't be allowed to happen in normal interrupt context,
thus the DRM implements this by scheduling the work in a kernel
softirq-scheduled tasklet.  In order for the buffer swap to work
safely, the DRM's central lock must be taken, via a call to
drm_lock_take() located in drivers/char/drm/drm_irq.c within the
function drm_locked_tasklet_func().  The lock-taking logic uses a
non-interrupt-blocking spinlock to implement the manipulations needed
to take the lock.  This semantic would be safe if all attempts to use
the spinlock only happen from process context.  However this buffer
swap happens from softirq context which is really a form of interrupt
context.  Thus we have an unsafe situation, in that
drm_locked_tasklet_func() can block on a spinlock already taken by a
thread in process context which will never get scheduled again because
of the blocked softirq tasklet.  This wedges the kernel hard.

To trigger this bug, run a dual-head cloned mode configuration which
uses the i915 drm, then execute an opengl application which
synchronizes buffer swaps against the vertical sync interrupt.  In my
testing, a lockup always results after running anywhere from 5 minutes
to an hour and a half.  I believe dual-head is needed to really
trigger the problem because then the vertical sync interrupt handling
is no longer predictable (due to being interrupt-sourced from two
different heads running at different speeds).  This raises the
probability of the tasklet trying to run while the userspace DRI is
doing things to the GPU (and manipulating the DRM lock).

The fix is to change the relevant spinlock semantics to be the
interrupt-blocking form.  After this change I am no longer able to
trigger the lockup; the longest test run so far was 20 hours (test
stopped after that point).

Note: I have examined the places where this spinlock is being
employed; all are reasonably short bounded sequences and should be
suitable for interrupts being blocked without impacting overall kernel
interrupt response latency.

Signed-off-by: Mike Isely <isely@pobox.com>
2008-03-14 09:53:05 +10:00
Alex Deucher 9be916f353 Fix chip family for RV550 2008-03-12 11:16:12 -04:00
Ben Skeggs 1766e1c07b nv50: force channel vram access through vm
If we ever want to be able to use the 3D engine we have no choice.  It
appears that the tiling setup (required for 3D on G8x) is in the page tables.

The immediate benefit of this change however is that it's now not possible
for a client to use the GPU to render over the top of important engine setup
tables, which also live in VRAM.

G8x VRAM size is limited to 512MiB at the moment, as we use a 1-1 mapping
of real vram pages to their offset within the start of a channel's VRAM
DMA object and only populate a single PDE for VRAM use.
2008-03-13 00:23:52 +11:00
Thomas Hellstrom 88bd1e4a35 Merge branch 'intel-post-reloc'
Conflicts:

	linux-core/drm_compat.c
	linux-core/drm_compat.h
	linux-core/drm_ttm.c
	shared-core/i915_dma.c

Bump driver minor to 13 due to introduction of new
relocation type.
2008-03-12 11:34:29 +01:00