00f1a66f22
Fence object reference / dereference cleanup.
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Buffer object dereference cleanup.
Add a struct drm_device member to fence objects:
This can simplify code, particularly in drivers.
2007-06-29 12:58:45 +02:00
475c1e67ba
Remove unused type 'struct xgi_pcie_list_s' / xgi_pcie_list_t.
2007-06-28 23:40:36 -07:00
8fa24c53f5
Minor clean up of variable declarations in xgi_find_pcie_virt.
2007-06-28 22:32:11 -07:00
9c85fb866d
Clean up debug log messages in xgi_find_pcie_block.
2007-06-28 22:26:39 -07:00
11ffe4632a
Convert comment header of xgi_find_pcie_virt to kernel doc format.
2007-06-28 22:20:13 -07:00
e26ec51146
nouveau: small RAMFC cleanups
2007-06-29 14:20:50 +10:00
e79e2a5816
Fix type/flags usage problem to check for preferred modes.
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Add more debugging to help diagnose problems.
2007-06-28 21:25:13 +01:00
1c32fecd6d
nouveau: Hack around possible Xv blit adaptor breakage
2007-06-28 21:01:17 +10:00
2dd85772aa
nouveau/nv10: Fix earlier NV1x chips
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Can't use nv04 code for them, since an extra field was inserted into
RAMFC after DMA_PUT/GET.
2007-06-28 04:23:17 +10:00
68ecf61647
nouveau: never touch PRAMIN with NV_WRITE, cleanup RAMHT code a bit
2007-06-28 03:26:44 +10:00
18a6d1c9c3
nouveau: simplify PRAMIN access
2007-06-28 03:26:44 +10:00
38617b6a26
nouveau: name some regs
2007-06-28 03:26:44 +10:00
ce0d528d3c
nouveau/nv50: skeletal backend
2007-06-28 03:26:43 +10:00
695599f18d
nouveau: Nuke DMA_OBJECT_INIT ioctl (bumps interface to 0.0.7)
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For various reasons, this ioctl was a bad idea.
At channel creation we now automatically create DMA objects covering
available VRAM and GART memory, where the client used to do this themselves.
However, there is still a need to be able to create DMA objects pointing at
specific areas of memory (ie. notifiers). Each channel is now allocated a
small amount of memory from which a client can suballocate things (such as
notifiers), and have a DMA object created which covers the suballocated area.
The NOTIFIER_ALLOC ioctl exposes this functionality.
2007-06-28 03:26:43 +10:00
4f2dd78ff3
nouveau/nv04: Set NV_PFIFO_CACHE1_PUSH1 correctly + small tweaks
2007-06-28 03:04:48 +10:00
9b9a127ed0
More 64-bit padding.
2007-06-26 23:25:40 +02:00
8cee7dca95
Clean up warnings about unused variables and functions.
2007-06-26 13:46:36 -07:00
b9ef1467fe
Clean up mixed declarations and code.
2007-06-26 13:39:01 -07:00
3547fbda63
Revert over-zealous change from previous commit.
2007-06-26 13:29:28 -07:00
3a776fa01e
Add XGI driver to Makefiles.
2007-06-26 13:26:10 -07:00
47bf6239aa
Clean up compile-time kernel feature detection.
2007-06-26 13:20:15 -07:00
7a053306a9
linux/config.h is deprecated or gone.
2007-06-26 13:16:04 -07:00
ec9e494eb9
Gut support for pre-2.6 kernels.
2007-06-26 13:15:22 -07:00
434657a258
dos2unix and Lindent
2007-06-26 13:10:30 -07:00
7af9d67037
Initial XP10 code drop from XGI.
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See attachment 10246 on https://bugs.freedesktop.org/show_bug.cgi?id=5921
2007-06-26 13:05:29 -07:00
5c27f8a70e
Add support SiS based XGI chips to SiS DRM.
2007-06-26 09:51:55 -07:00
9f617522d9
nouveau: NV49/NV4B PGRAPH setup from jb17bsome and stephan_2303
2007-06-25 01:57:57 +10:00
3dfc13e2da
nouveau: kill some dead code
2007-06-24 19:00:44 +10:00
5f05cd7086
nouveau: NV04/NV10/NV20 PGRAPH engtab functions
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NV04/NV10 load_context()/save_context() are stubs. I don't know enough about
how they work to implement them sanely. The "old" context_switch() code
remains hooked up, so it shouldn't break anything.
NV20 will probably break if load_context() works. No inital context values
are filled in, so when the first channel is created PGRAPH will probably end
up having its state zeroed. Some setup from nv20_graph_init() will probably
need to be moved to the per-channel context setup.
2007-06-24 19:00:26 +10:00
5d55b0655c
nouveau: NV3X PGRAPH engtab functions
2007-06-24 18:58:38 +10:00
341bc78207
nouveau: NV1X/2X/3X PFIFO engtab functions
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Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC
entry size.
2007-06-24 18:58:14 +10:00
05d86d950a
nouveau: NV04 PFIFO engtab functions
2007-06-24 18:57:09 +10:00
acb710d1a5
nouveau: NV4X PGRAPH engtab functions
2007-06-24 18:56:40 +10:00
f2e64d5276
nouveau: NV4X PFIFO engtab functions
2007-06-24 18:56:01 +10:00
0afb3b518e
nouveau: split PFIFO/PGRAPH context creation
2007-06-24 18:55:23 +10:00
9dbf322d26
nouveau: (mostly) hook up put_base again
2007-06-24 18:55:06 +10:00
24b71c318a
nouveau: prototype PFIFO/PGRAPH engtab API
2007-06-24 18:54:51 +10:00
5c7c07fd49
nouveau: rename engtab functions
2007-06-24 18:54:36 +10:00
7f2a1cf275
Merge branch 'vblank-rework' into vblank
2007-06-22 11:12:02 -07:00
97dcd7fd25
more vblank rework
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- use a timer for disabling vblank events to avoid enable/disable calls too
often
- make i915 work with pre-965 chips again (would like to structure this
better, but this hack works on my test system)
2007-06-22 11:06:51 -07:00
068ffc1e1b
radeon: Acknowledge all interrupts we're interested in.
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Failure to do so was probably the root cause of fd.o bug 11287.
2007-06-22 11:55:26 +02:00
d2d53024fb
Fix vblank wait condition.
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Sync-to-vblank actually works again for me with radeon.
2007-06-22 11:45:23 +02:00
2738bca6f5
Use drm_calloc instead of assigning 0.
2007-06-22 11:44:38 +02:00
6e2cd7c163
drm_modeset_ctl_t fixes.
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s/u64/drm_u64_t/ to allow userspace code using drm.h to compile.
Move 64 bit arg member to the beginning to avoid alignment issues with 32
bit userspace on 64 bit kernels.
2007-06-22 11:44:19 +02:00
b8dd314875
Remove mask parameter from radeon_acknowledge_irqs().
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Simply always acknowledge all interrupts we're interested in, to avoid hard
hangs when an unexpected interrupt is flagged.
2007-06-22 11:42:54 +02:00
24c09faec1
Merge branch 'vblank-rework' into vblank
2007-06-21 15:26:34 -07:00
afe842297f
RADEON: fix race in vblank interrupt handling
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It's possible that we disable vblank interrupts and clear the
corresponding flag in irq_enable_reg, but receive an interrupt at just
the wrong time, causing us to not ack it properly, nor report to the
core kernel that it was handled. Fix that case by always handling
vblank interrupts, even if the irq_enable_reg field is clear.
2007-06-21 15:23:20 -07:00
40f6a696cb
r300: Synchronized the register defines file; documentation changes.
2007-06-21 14:35:11 +00:00
213732af43
r300: Allow writes to R300_VAP_PVS_WAITIDLE.
2007-06-21 14:32:58 +00:00
2d24455ed8
Remove broken CRTC enable checks and incorrect user irq enable in set_pipe
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routine.
2007-06-18 17:43:58 -07:00
Thomas Hellstrom
Ian Romanick
Ben Skeggs
Alan Hourihane
Jesse Barnes
Michel Dänzer
Jesse Barnes
Oliver McFadden