Commit Graph

133 Commits (d9c2f65dd8e50736a33e97a55c257ef6843e1ce7)

Author SHA1 Message Date
Alex Deucher 728d8e226f radeon: add comment to clarify bus mastering on PCIE chips 2008-10-06 12:12:49 -04:00
Alex Deucher 6f9dfa098f radeon: fix duplicate define in my last commit
That's what I get for committing at 3 AM.
2008-10-06 12:01:11 -04:00
Alex Deucher 4b98f6d74f radeon: fix bus master enabled bits on newer asics 2008-10-06 03:08:27 -04:00
Mihail Zenkov 5a36cce349 radeon: fix missing bit from rs740 patch
See bug 17908
2008-10-06 00:49:15 -04:00
Alex Deucher ce40261012 radeon: Add support for HD2100 IGP (RS740) 2008-10-04 20:43:21 -04:00
Dave Airlie 589f968173 radeon: fix typo with a better typo 2008-07-22 18:47:27 +10:00
Dave Airlie c669489813 radeon: fix type DST vs Z cache flush 2008-07-22 18:10:03 +10:00
Dave Airlie 7cfdba2b30 radeon: remove microcode version 2008-07-18 14:36:47 +10:00
Jerome Glisse 00b4063906 radeon: bump driver date to know if lockup fix is in 2008-06-13 10:02:41 +02:00
Jerome Glisse 1aafbb83d9 radeon: r345xx fixe hard lockup
This patch should fixe hard lockup and convert them in
softlockup (ie you can ssh the box but the gpu is busted
and we are waiting in loop for it to come back to reason).
2008-06-13 09:54:05 +02:00
Alex Deucher a07c82183a RADEON: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTAT
According to the hw guys, you should use DSTCACHE_CTLSTAT to flush
the 2D dst cache rather than RB2D_DSTCACHE_CTLSTAT.
2008-06-11 18:25:47 -04:00
Alex Deucher 4b8aecbde8 RADEON: Add untested support for RS400 chips
GART setup appears to work the same as RS480 chips.
Also RC4xx chips are actually RS400 based, not RS480 based.
2008-06-09 16:58:06 -04:00
Dennis Kasprzyk 6905c7a29d radeon: Restore software interrupt on resume.
Fixes performance drop after suspend/resume on some systems.
2008-06-05 18:23:37 +02:00
Dave Airlie 6e8a2cff66 r500: attempt to make AGP work by programming agp base in the MC correctly 2008-05-30 20:27:31 +10:00
Dave Airlie c06096d34f radeon: bump release date/version for r500 3D support 2008-05-28 10:02:20 +10:00
Alex Deucher 59c953245c RADEON: add get_param for number of GB pipes 2008-05-27 18:34:33 -04:00
Robert Noland 8cd045079e [FreeBSD] Add vblank-rework support and get drivers building.
The i915 driver now works again.
2008-05-27 14:25:20 -07:00
Dave Airlie 91c6c4b240 rs690/r500: vblank support.
The new display controller has the vblank interrupts in a different place.

Add support for vbl interrupts for these chips
2008-05-21 21:27:33 +10:00
Alex Deucher caace3692f RS4xx: separate out RS400 and RS480 IGP chips
RS400 (intel based IGP) and RS480 (AMD based IGP) have
different MC and GART setups.  Currently we only support
RS480.
2008-05-13 21:02:17 -04:00
Alex Deucher 75bc739bee R3/4/5: init pipe setup in drm
Similar (broken) code in mesa needs to be removed
2008-05-12 09:44:20 -04:00
Alex Deucher 3582e82f14 RS4xx: fix MCIND index mask 2008-05-12 09:24:13 -04:00
Alex Deucher c307e50724 R300+: fixup PURGE/FLUSH macros 2008-05-12 09:18:28 -04:00
Alex Deucher fb9eaff747 Radeon IGP: merge RS4xx/RS6xx gart setup 2008-05-12 09:13:44 -04:00
Alex Deucher 68b7f550ba Radeon IGP: wrap MCIND access
first step in merging rs4xx/rs6xx gart setup
2008-05-12 09:00:40 -04:00
Alex Deucher a34025ce22 Radeon IGP: clean up registers and magic numbers 2008-05-12 08:56:11 -04:00
Dave Airlie 5b1d9263d3 drm/rs690: set AGP_BASE_2 to 0 2008-03-16 14:00:16 +10:00
Maciej Cencora b8755ff7c3 drm: add initial rs690 support for drm.
This adds support for configuring the RS690 GART.
2008-01-27 12:50:31 +10:00
Jesse Barnes 0cd4cbc9a6 Merge branch 'master' into vblank-rework, including mach64 support
Conflicts:

	linux-core/drmP.h
	linux-core/drm_drv.c
	shared-core/i915_drv.h
	shared-core/i915_irq.c
	shared-core/mga_irq.c
	shared-core/radeon_irq.c
	shared-core/via_irq.c

Mostly trivial conflicts.

mach64 support from Mathieu Bérard.
2008-01-22 09:42:37 -08:00
Márton Németh 9ab620d661 drm: cleanup DRM_DEBUG() parameters
As DRM_DEBUG macro already prints out the __FUNCTION__ string (see
drivers/char/drm/drmP.h), it is not worth doing this again. At some
other places the ending "\n" was added.

airlied:- I cleaned up a few that this patch missed also
2008-01-03 16:56:04 +10:00
Dave Airlie 814f695135 Merge branch 'master' into r500-support 2007-12-10 15:53:59 +10:00
Dave Airlie e51b3c8ff4 r500: add a bunch of all r5xx pci ids..
fix up a range that may be needed for r500 mesa
2007-11-27 08:43:14 +10:00
Dave Airlie 5dc5c36e62 drm: major whitespace/coding style realignment with kernel 2007-11-22 16:10:36 +10:00
Dave Airlie dc0ec76d60 radeon: add initial r5xx support 2007-11-20 08:44:33 +10:00
Dave Airlie a90510966e radeon: refactor out the fb/agp location read/write.
Add a new get param to get the fb location into userspace. Mesa currently
hits MMIO to do this, but this isn't always possible.
2007-11-18 19:25:31 +10:00
Dave Airlie 7f6bf84c23 drm: remove lots of spurious whitespace.
Kernel "cleanfile" script run.
2007-11-05 12:42:22 +10:00
Dave Airlie bb5f2158db radeon: set the address to access the aperture on the CPU side correctly
This code relied on the CPU and GPU address for the aperture being the same,
On some r5xx hardware I was playing with I noticed that this isn't always true.
I wonder if this will fix some of those r4xx DRI issues we've seen in the past.
2007-11-03 00:39:44 +10:00
Jesse Barnes 91aae7e683 Merge branch 'master' into vblank-rework, fixup remaining drivers
Conflicts:

	linux-core/drmP.h
	linux-core/drm_drv.c
	linux-core/drm_irq.c
	shared-core/i915_drv.h
	shared-core/i915_irq.c
	shared-core/mga_drv.h
	shared-core/mga_irq.c
	shared-core/radeon_drv.h
	shared-core/radeon_irq.c

Merge in the latest master bits and update the remaining drivers (except
mach64 which math_b is working on).  Also remove the 9xx hack from the i915
driver; it seems to be correct.
2007-10-30 12:52:46 -07:00
Eric Anholt 5b38e13416 Replace DRM_IOCTL_ARGS with (dev, data, file_priv) and remove DRM_DEVICE.
The data is now in kernel space, copied in/out as appropriate according to the
This results in DRM_COPY_{TO,FROM}_USER going away, and error paths to deal
with those failures.  This also means that XFree86 4.2.0 support for i810 DRM
is lost.
2007-07-20 18:16:42 -07:00
Eric Anholt c1119b1b09 Replace filp in ioctl arguments with drm_file *file_priv.
As a fallout, replace filp storage with file_priv storage for "unique
identifier of a client" all over the DRM.  There is a 1:1 mapping, so this
should be a noop.  This could be a minor performance improvement, as everything
on Linux dereferenced filp to get file_priv anyway, while only the mmap ioctls
went the other direction.
2007-07-20 13:39:45 -07:00
Dave Airlie 24311d5d82 drm: remove drm_buf_t 2007-07-16 13:42:11 +10:00
Dave Airlie 21ee6fbfb8 drm: remove drmP.h internal typedefs 2007-07-16 12:32:51 +10:00
Dave Airlie b95ac8b7b3 drm: detypedef drm.h and fixup all problems 2007-07-16 11:22:15 +10:00
Michel Dänzer 5b726b6390 radeon: Improve vblank counter.
The frame counter seems to increase only at the end of vertical blank, so we
need to add 1 while in vertical blank.
2007-07-06 09:50:50 +02:00
Michel Dänzer d8ed021d29 radeon: VBlank rework fixups.
Fix range of frame counter registers.

Use DRM_ERR() instead of Linux specific error codes in shared code.

Remove duplicate register definitions and superfluous local variables.
2007-06-18 13:10:37 +02:00
Jesse Barnes b6610363e3 First cut at radeon support for the vblank rework. 2007-06-15 11:21:57 -07:00
Jesse Barnes db689c7b95 Initial checkin of vblank rework. Code attempts to reduce the number
of vblank interrupt in order to save power.
2007-06-12 10:44:21 -07:00
Oliver McFadden 3181573073 r300: Added the CP maximum fetch size and ring rptr update variables. 2007-06-08 19:40:57 +00:00
Oliver McFadden 39625f9621 r300: Small correction to the previous commit. 2007-06-05 19:19:42 +00:00
Alex Deucher 9e0bd88c61 r300: Document more of the RADEON_RBBM_STATUS register. 2007-06-05 19:05:49 +00:00
Dave Airlie 4e9d215bdf radeon: add support for vblank on crtc2
This add support for CRTC2 vblank on radeon similiar to the i915 support
2007-06-03 16:28:21 +10:00