Commit Graph

111 Commits (fb9eaff74712b7b29a7e76209d803fec21c0318c)

Author SHA1 Message Date
Alex Deucher fb9eaff747 Radeon IGP: merge RS4xx/RS6xx gart setup 2008-05-12 09:13:44 -04:00
Alex Deucher 68b7f550ba Radeon IGP: wrap MCIND access
first step in merging rs4xx/rs6xx gart setup
2008-05-12 09:00:40 -04:00
Alex Deucher a34025ce22 Radeon IGP: clean up registers and magic numbers 2008-05-12 08:56:11 -04:00
Dave Airlie 5b1d9263d3 drm/rs690: set AGP_BASE_2 to 0 2008-03-16 14:00:16 +10:00
Maciej Cencora b8755ff7c3 drm: add initial rs690 support for drm.
This adds support for configuring the RS690 GART.
2008-01-27 12:50:31 +10:00
Jesse Barnes 0cd4cbc9a6 Merge branch 'master' into vblank-rework, including mach64 support
Conflicts:

	linux-core/drmP.h
	linux-core/drm_drv.c
	shared-core/i915_drv.h
	shared-core/i915_irq.c
	shared-core/mga_irq.c
	shared-core/radeon_irq.c
	shared-core/via_irq.c

Mostly trivial conflicts.

mach64 support from Mathieu Bérard.
2008-01-22 09:42:37 -08:00
Márton Németh 9ab620d661 drm: cleanup DRM_DEBUG() parameters
As DRM_DEBUG macro already prints out the __FUNCTION__ string (see
drivers/char/drm/drmP.h), it is not worth doing this again. At some
other places the ending "\n" was added.

airlied:- I cleaned up a few that this patch missed also
2008-01-03 16:56:04 +10:00
Dave Airlie 814f695135 Merge branch 'master' into r500-support 2007-12-10 15:53:59 +10:00
Dave Airlie e51b3c8ff4 r500: add a bunch of all r5xx pci ids..
fix up a range that may be needed for r500 mesa
2007-11-27 08:43:14 +10:00
Dave Airlie 5dc5c36e62 drm: major whitespace/coding style realignment with kernel 2007-11-22 16:10:36 +10:00
Dave Airlie dc0ec76d60 radeon: add initial r5xx support 2007-11-20 08:44:33 +10:00
Dave Airlie a90510966e radeon: refactor out the fb/agp location read/write.
Add a new get param to get the fb location into userspace. Mesa currently
hits MMIO to do this, but this isn't always possible.
2007-11-18 19:25:31 +10:00
Dave Airlie 7f6bf84c23 drm: remove lots of spurious whitespace.
Kernel "cleanfile" script run.
2007-11-05 12:42:22 +10:00
Dave Airlie bb5f2158db radeon: set the address to access the aperture on the CPU side correctly
This code relied on the CPU and GPU address for the aperture being the same,
On some r5xx hardware I was playing with I noticed that this isn't always true.
I wonder if this will fix some of those r4xx DRI issues we've seen in the past.
2007-11-03 00:39:44 +10:00
Jesse Barnes 91aae7e683 Merge branch 'master' into vblank-rework, fixup remaining drivers
Conflicts:

	linux-core/drmP.h
	linux-core/drm_drv.c
	linux-core/drm_irq.c
	shared-core/i915_drv.h
	shared-core/i915_irq.c
	shared-core/mga_drv.h
	shared-core/mga_irq.c
	shared-core/radeon_drv.h
	shared-core/radeon_irq.c

Merge in the latest master bits and update the remaining drivers (except
mach64 which math_b is working on).  Also remove the 9xx hack from the i915
driver; it seems to be correct.
2007-10-30 12:52:46 -07:00
Eric Anholt 5b38e13416 Replace DRM_IOCTL_ARGS with (dev, data, file_priv) and remove DRM_DEVICE.
The data is now in kernel space, copied in/out as appropriate according to the
This results in DRM_COPY_{TO,FROM}_USER going away, and error paths to deal
with those failures.  This also means that XFree86 4.2.0 support for i810 DRM
is lost.
2007-07-20 18:16:42 -07:00
Eric Anholt c1119b1b09 Replace filp in ioctl arguments with drm_file *file_priv.
As a fallout, replace filp storage with file_priv storage for "unique
identifier of a client" all over the DRM.  There is a 1:1 mapping, so this
should be a noop.  This could be a minor performance improvement, as everything
on Linux dereferenced filp to get file_priv anyway, while only the mmap ioctls
went the other direction.
2007-07-20 13:39:45 -07:00
Dave Airlie 24311d5d82 drm: remove drm_buf_t 2007-07-16 13:42:11 +10:00
Dave Airlie 21ee6fbfb8 drm: remove drmP.h internal typedefs 2007-07-16 12:32:51 +10:00
Dave Airlie b95ac8b7b3 drm: detypedef drm.h and fixup all problems 2007-07-16 11:22:15 +10:00
Michel Dänzer 5b726b6390 radeon: Improve vblank counter.
The frame counter seems to increase only at the end of vertical blank, so we
need to add 1 while in vertical blank.
2007-07-06 09:50:50 +02:00
Michel Dänzer d8ed021d29 radeon: VBlank rework fixups.
Fix range of frame counter registers.

Use DRM_ERR() instead of Linux specific error codes in shared code.

Remove duplicate register definitions and superfluous local variables.
2007-06-18 13:10:37 +02:00
Jesse Barnes b6610363e3 First cut at radeon support for the vblank rework. 2007-06-15 11:21:57 -07:00
Jesse Barnes db689c7b95 Initial checkin of vblank rework. Code attempts to reduce the number
of vblank interrupt in order to save power.
2007-06-12 10:44:21 -07:00
Oliver McFadden 3181573073 r300: Added the CP maximum fetch size and ring rptr update variables. 2007-06-08 19:40:57 +00:00
Oliver McFadden 39625f9621 r300: Small correction to the previous commit. 2007-06-05 19:19:42 +00:00
Alex Deucher 9e0bd88c61 r300: Document more of the RADEON_RBBM_STATUS register. 2007-06-05 19:05:49 +00:00
Dave Airlie 4e9d215bdf radeon: add support for vblank on crtc2
This add support for CRTC2 vblank on radeon similiar to the i915 support
2007-06-03 16:28:21 +10:00
Michel Dänzer ca1cd3257c radeon: Don't mess up page flipping when a file descriptor is closed.
There can still be other contexts that may use page flipping later on, so don't
just unilaterally 'clean it up', which could lead to the wrong page being
displayed, e.g. when running 3D apps with a GLX compositing manager such as
compiz using page flipping.
2007-04-29 12:37:51 +02:00
Oliver McFadden 059b5d9077 rs480: Renamed some unknown registers. See dri-devel list. 2007-04-09 23:23:40 +00:00
Dave Airlie 29f8fe8046 radeon: bump version for IGPGART support 2007-04-09 22:00:34 +10:00
Dave Airlie a70f8e0ab2 radeon: add support for reverse engineered xpress200m
The IGPGART setup code was traced using mmio-trace on fglrx by myself
and Phillip Ezolt <phillipezolt@gmail.com> on dri-devel.

This code doesn't let the 3D driver work properly as the card has no
vertex shader support.

Thanks to Matthew Garrett + Ubuntu for providing me some hardware to do this
work on.
2007-04-09 21:52:59 +10:00
Dave Airlie 188a93c9df radeon: make PCI GART aperture size variable, but making table size variable
This is precursor to getting a TTM backend for this stuff, and also
allows the PCI table to be allocated at fb 0
2007-03-04 19:10:46 +11:00
Michel Dänzer aefc7a3443 Unify radeon offset checking.
Replace r300_check_offset() with generic radeon_check_offset(), which doesn't
reject valid offsets when the framebuffer area is at the very end of the card's
32 bit address space. Make radeon_check_and_fixup_offset() use
radeon_check_offset() as well.

This fixes https://bugs.freedesktop.org/show_bug.cgi?id=7697 .
2006-12-14 19:31:56 +01:00
Michel Dänzer 6ba9127753 Use register writes instead of BITBLT_MULTI packets for buffer swap blits.
This takes up two more ring buffer entries per rectangle blitted but makes sure
the blit is performed top to bottom, reducing the likelyhood of tearing.
2006-09-15 16:55:40 +02:00
Dave Airlie 3cc64a943a drm: use radeon specific names for radeon flags 2006-09-12 06:13:14 +10:00
Dave Airlie 9b984b34e9 drm: lots of small cleanups and whitespace issues fixed up
remove a mach64 warning, align a lot of things from linux kernel
2006-08-28 11:31:43 +10:00
Michel Dänzer 645453ce11 Bug #7629: Fix for CHIP_IS_AGP getting 'restored' with non-AGP cards
Commit 2a47f6bfec caused the CHIP_IS_AGP flag to
get 'restored' with PCI(e) cards. I can't think of a way to fix this without
introducing a (otherwise redundant) CHIP_IS_PCI flag.
2006-07-26 18:19:27 +02:00
Michel Dänzer d5e0f8bdaf Use RADEON_RB3D_DSTCACHE_CTLSTAT instead of RADEON_RB2D_DSTCACHE_CTLSTAT.
The latter seems to be a read-only mirror of the former.
2006-07-19 19:18:32 +02:00
Michel Dänzer c91748e702 When writeback isn't used, actually disable it in the hardware.
Not doing this might waste bus bandwidth or even cause memory corruption or
system crashes on systems that check bus transfers. No such incident has been
reported though.
2006-07-19 19:13:00 +02:00
Roland Scheidegger f4e6e4499c Add support for r200 vertex programs (R200_EMIT_VAP_PVS_CNTL, and new
packet type for making it possible to address whole tcl vector space
    and have a larger count)
2006-05-24 18:36:24 +00:00
Roland Scheidegger 9e0320a0ad add forgotten register define for previous commit 2006-05-20 09:20:05 +00:00
Dave Airlie 985738f203 radeon fix up the PCI ids for new memory map like the kernel one.. not
perfect but should be very safe... align some other kernel bits i810
    align with kernel
2006-03-25 07:16:14 +00:00
Aapo Tahkola b3fdf9bb7a Add general-purpose packet for manipulating scratch registers (r300) 2006-03-06 20:08:50 +00:00
Roland Scheidegger 06e8bd2a0d Add all radeon pci ids known by ddx, but only r350/rv350 and below (new
chips may be problematic). Leave the existing entries for new chips in
    though. Remove ids not known by ddx (secondary ids, non-existant,...).
    Correct some entries (name/family). Make the radeon family enum look
    more alike the ddx/dri versions. See #5413
2006-02-25 09:51:15 +00:00
Dave Airlie 9fad101da9 add benh's memory management patch 2006-02-18 03:04:30 +00:00
Aapo Tahkola 9a01593f1a Add support for texture cache flushes (R300_TX_CNTL) 2006-01-20 21:45:28 +00:00
Dave Airlie bbcba83ef7 The radeon DRM wasn't passing sparse checking in the kernel, this fixes it
by adding a new kernel internal cmd buffer type, that has no userspace
    members, and passes it around.
2006-01-02 05:39:19 +00:00
Dave Airlie 780e90e4a2 add radeon card type get param so userspace can avoid walking PCI 2005-12-29 00:17:51 +00:00
Dave Airlie 274fdf482b fix radeon memory mapping from Ben Herrenschmidt 2005-12-16 08:02:17 +00:00