Commit Graph

5260 Commits (305478ce02ebd908a75c9830ecea15f6e2469b42)

Author SHA1 Message Date
Ben Skeggs 891517f511 nouveau: disallow pushbuf BOs in multiple memory types
Under certain circumstances it's possible for libdrm to decide to move
a GART|VRAM pushbuf to be VRAM-only.  This causes the kernel to reject
the command submission on GF8 and up, due to a stricter policy where
buffers are only allowed to move to memory types that were specified
at creation time.

The simplest fix for this is to force the creation-time memory type for
the lifetime of the push buffer.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-01-07 13:15:28 +10:00
Maxime Villard baf0a7daaf libkms: return -EINVAL on fstat error
On error fstat return -1, instead return -EINVAL to caller

Signed-off-by: Maxime Villard <rustyBSD@gmx.fr>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2013-01-02 10:57:07 -05:00
Maxime Villard 1f4b5e11e6 libkms: fix memory leak in error path
Signed-off-by: Maxime Villard <rustyBSD@gmx.fr>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2013-01-02 10:55:50 -05:00
Jerome Glisse 0980633afd drm/radeon: track global bo name and always return the same
To avoid kernel rejecting cs if we return different global name
for same bo keep track of global name and always return the same.
Seems to fix issue with suspend/resume failing and repeatly printing
following message :
[drm:radeon_cs_ioctl] *ERROR* Failed to parse relocation -35!

There might still be way for a rogue program to trigger this issue.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2012-11-28 10:41:26 -05:00
Alex Deucher 171666e4b8 radeon: add new SI pci id
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2012-11-21 18:45:14 -05:00
David Shao 7d42b49c0c intel: Fix missing ETIME on BSD operating systems
Originally posted to Free Desktop bug #52549 by David Shao.
Resolves Gentoo Bug #433403.
Commit message by Richard Yao.

Reviewed-by: Richard Yao <ryao@gentoo.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
References: https://bugs.freedesktop.org/show_bug.cgi?id=52549

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-11-10 11:52:38 -08:00
Marek Olšák e01d68f9f3 configure.ac: bump version to 2.4.40 for release 2012-11-06 01:23:53 +01:00
Dave Airlie 2089a0080e fix make distcheck
typo,

Reported-by: mareko on irc
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-11-05 22:21:42 +00:00
Marek Olšák e32fff8e9e radeon: fix tile_split of 128-bit surface formats with 8x MSAA
The calculation led to the number 8192, which is too high.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-10-26 20:00:59 +02:00
Andreas Boll bc494b310d radeon: fix unused-function warning
radeon_cs_gem.c:333:13: warning: 'cs_gem_dump_bof' defined but
not used [-Wunused-function]

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-10-24 18:25:58 +02:00
Alex Deucher a4cb7233a8 radeon: add some new SI pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-10-16 12:58:39 -04:00
Rob Clark e81acf5101 initialize width/height fields in drmModeCrtc
If we have valid timings, we can at least set width/height to
*something*, which is I think at least less confusing than always
seeing width/height of zero.  At least modeprint and modetest
seem to expect width/height to mean something.

Signed-off-by: Rob Clark <rob@ti.com>
2012-10-14 16:56:53 -05:00
Rob Clark 844d75e5a0 update gitignore
Signed-off-by: Rob Clark <rob@ti.com>
2012-10-09 09:49:04 -05:00
Vincent Penquerc'h 28a13f0be7 omap: release lock also on error paths
Signed-off-by: Rob Clark <rob@ti.com>
2012-10-09 09:41:27 -05:00
Daniel Stone 14db948127 configure.ac: Allow forcible disabling of Cairo support
We don't want to build libdrm tests with Cairo support under Poky, since
they're never used and also cause a build loop from libdrm -> cairo ->
mesa-dri -> libdrm.

To avoid variance in build results, introduce a --disable-cairo-tests
switch.

Signed-off-by: Daniel Stone <daniel@fooishbar.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-10-08 15:49:23 +10:00
Chris Wilson a83444c925 intel: Silence a trivial compiler warning
intel_bufmgr_gem.c: In function 'drm_intel_bo_gem_export_to_prime':
intel_bufmgr_gem.c:2477:6: warning: unused variable 'ret' [-Wunused-variable]

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-10-07 10:09:38 +01:00
Chris Wilson 8cf3475eb5 intel: Correct the word decoding for gen2 3DSTATE_LOAD_STATE_IMMEDIATE_1
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-10-07 10:09:38 +01:00
Chris Wilson 75830a0d2c intel: Fix "properly test for HAS_LLC"
commit 92fd0ce4f6
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Fri Aug 31 11:16:53 2012 +0200

    intel: properly test for HAS_LLC

missed slightly and in effect had no effect on the outcome of checking
whether the kernel/chipset supported LLC.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-10-07 10:09:38 +01:00
Marek Olšák 1aebfdc112 radeon: fix stencil miptree allocation of combined ZS buffers on EG and SI
This allows texturing with depth-stencil buffers directly without the copy
to CB. The separate miptree description for stencil is added, because
the stencil mipmap offsets are not really depth offsets/4 (at least
for the texture units).

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-10-06 05:45:56 +02:00
Marek Olšák 77413e77b8 radeon: don't force stencil tile split to 0
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-10-06 05:45:26 +02:00
Marek Olšák b3d90bbc1d radeon: don't take the stencil-specific codepath for buffers without stencil
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-10-03 17:52:44 +02:00
Jesse Barnes 2426a6a711 libdrm: man page infrastructure and a few sample man pages 2012-09-17 08:07:04 -07:00
Kristian Høgsberg 1b7ce582ce intel: Mark bo's exported to prime as not reusable
It's the same situation as flink and we need take the same precautions.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
2012-09-14 22:06:14 -04:00
Jesse Barnes 9d9cb8553c intel: add support for ValleyView
Just some PCI ID stuff to enable the right features.
2012-09-13 11:50:59 -07:00
Marcin Slusarz 9c3c95fc0c libkms: link against libdrm
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
2012-09-08 00:50:22 +02:00
Michel Dänzer b925022a3e radeon: Sampling pitch for non-mipmaps seems padded to slice alignment on SI.
Another corner case that isn't well-explained yet.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2012-09-06 15:25:13 +02:00
Michel Dänzer 45083e6d36 radeon: Memory footprint of SI mipmap base level is padded to powers of two.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2012-09-06 15:24:44 +02:00
Michel Dänzer 8572444fd0 radeon: Fix layout of linear aligned mipmaps on SI.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2012-09-05 18:47:49 +02:00
Daniel Vetter 92fd0ce4f6 intel: properly test for HAS_LLC
If the kernel supports the test, we need to check the param.
Copy&pasta from the above checks that only look at the return value.
Interesting how much one can get such a simple interface wrong.

Issue created in

commit 151cdcfe68
Author: Eugeni Dodonov <eugeni.dodonov@intel.com>
Date:   Tue Jan 17 15:20:19 2012 -0200

    intel: query for LLC support

Patch even claims to have fixed this in v2, but is actually unchanged
from v1.

Reported-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-09-01 11:21:38 +02:00
Jakob Bornecrantz 7080bfdfd9 vmwgfx: No longer experimental
And hasn't been in a long while.

Reviewed-by: Zack Rusin <zackr@vmware.com>
Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
2012-08-24 17:17:43 +02:00
Marek Olšák ae3ac8225f configure: bump version for 2.4.39 release 2012-08-24 17:04:17 +02:00
Marek Olšák 853429b939 radeon: align r600 msaa buffers to a multiple of macrotile size * num samples
I am not sure whether this is needed, but better be safe than sorry.
2012-08-24 16:51:14 +02:00
Marek Olšák 58545722d0 radeon: fix allocation of MSAA surfaces on r600-r700
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-08-24 16:51:14 +02:00
Víctor Manuel Jáquez Leal f215d65137 omap: include omap_drm.h independently
omap_drm.h uses data type defined in stdint.h, but that header was
not included.

omap_drm.h includes drm.h as a local file when it is part of the
compiler c flags.

This two issues are fixed. New code can include omap_drm.h alone.

Signed-off-by: Víctor Manuel Jáquez Leal <vjaquez@igalia.com>
Signed-off-by: Rob Clark <rob@ti.com>
2012-08-23 14:21:01 -05:00
Dave Airlie 3163cfe4db radeon: add prime import/export support
this adds radeon version of the prime import/export support.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-08-14 11:04:56 +10:00
Kenneth Graunke a9412fa9de intel: Use VG_CLEAR on the context destroy ioctl as well.
Otherwise pad appears uninitialized and valgrind grumbles.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-08-12 20:13:50 -07:00
Tobias Klausmann 6fa2b29d22 tests/modetest: Add a forgotten return, needed for opensuse buildservice
Signed-off-by: Marek Olšák <maraeo@gmail.com>
2012-08-12 00:00:43 +02:00
Marek Olšák d1de6831b9 configure: bump version for 2.4.38 release 2012-08-11 20:06:23 +02:00
Marek Olšák 10481fec55 tests/modetest: fix distcheck 2012-08-11 20:02:03 +02:00
Eric Anholt 2607dad20b intel: Add a function for the new register read ioctl.
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2012-08-10 09:48:07 -07:00
Eric Anholt 934ea3b321 intel: Import updated i915_drm.h.
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2012-08-10 09:48:05 -07:00
Eric Anholt 71ebcf4ea3 Drop "-Wunsafe-loop-optimizations".
It warns about totally sensible things done in intel_decode.c.  I've
never seen this warn do anything useful, and apparently I was the one
to introduce it when I added the giant pile of warning flags back in
2008.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2012-08-10 09:48:02 -07:00
Marek Olšák 128803a107 radeon: tweak TILE_SPLIT for MSAA surfaces
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-08-09 22:35:07 +02:00
Marek Olšák e14aedce64 radeon: force 2D tiling for MSAA surfaces
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-08-09 22:33:00 +02:00
Marek Olšák 2337295573 radeon: optimize allocation for depth w/o stencil and stencil w/o depth on EG
If we don't need stencil, don't allocate it.
If we need only stencil (like PIPE_FORMAT_S8_UINT), don't allocate depth.

v2: actually do it correctly

Reviewed-by: Christian König <christian.koenig@amd.com>
2012-08-09 16:37:20 +02:00
Marek Olšák ad66c17209 radeon: simplify ZS buffer checking on r600
Setting those flags has no effect anywhere else.

Reviewed-by: Christian König <christian.koenig@amd.com>
2012-08-09 16:37:20 +02:00
Paulo Zanoni 93fef04b1e intel: add more Haswell PCI IDs
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
2012-08-08 15:38:12 -03:00
Chris Wilson 9a2b57d229 intel: Bail gracefully if we encounter an unknown Intel device
Otherwise we end up with X hitting a fail-loop as the embedded libGL
stacks asserts whilst initialising.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-08-08 19:24:11 +01:00
Alex Deucher 9f823ca236 radeon: add some new SI pci ids
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-06 10:34:59 -04:00
Alex Deucher dd944a0081 radeon: add some missing evergreen pci ids
Noticed by: Harald van Dijk <fdo@gigawatt.nl>

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=53124

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-06 10:33:56 -04:00