Commit Graph

1184 Commits (931b4a84a09e29570dfef1da96acc5b894529bc3)

Author SHA1 Message Date
Ben Skeggs 7281463f8d nouveau/nv40: add some missing pciids. 2007-08-09 10:23:36 +10:00
Matthieu Castet e326acf549 nouveau : nv10, nv20, nv30 : don't save all channel in the same RAMFC entry
This should improve multi fifo
2007-08-08 22:55:32 +02:00
Ben Skeggs 05633ca370 nouveau: Always allocate drm's push buffer in VRAM
Fixes #11868
2007-08-08 16:37:55 +10:00
Ben Skeggs 40f2156356 nouveau: return channel id 2007-08-08 16:12:19 +10:00
Ben Skeggs 296050eee6 nouveau/nv50: hack up initial channel context from current state
We really should be providing static values like the nv40 PGRAPH code does,
however, this will do for now to keep X at least working.
2007-08-08 13:01:29 +10:00
Ben Skeggs 4ad487190d nouveau: enable/disable engine-specific interrupts in _init()/_takedown()
All interrupts are still masked by PMC until init is finished.
2007-08-08 10:49:05 +10:00
Matthieu Castet a4759b8513 nouveau : fix enable irq (in the previous code all irq were masked by engine
init after irq_postinstall)
2007-08-07 23:09:44 +02:00
Ben Skeggs 66f5232d93 nouveau: Init global gpuobj list early, unbreaks sgdma code. 2007-08-07 01:52:49 +10:00
Stephane Marchesin ac24f328ec nouveau: Bump PCI GART to 16MB 2007-08-06 17:16:05 +02:00
Ben Skeggs 8d5a8ebc31 nouveau: ouch, add nouveau_dma.[ch] files.. 2007-08-06 22:32:36 +10:00
Ben Skeggs 7a0a812ea4 nouveau: Remove PGRAPH_SURFACE hack, it wont work now anyway.
Need to find another way of doing this, ideally someone'd hunt down which
object/method controls it!  The Xv blit adaptor is likely now broken on
cards that have pNv->WaitVSyncPossible enabled.
2007-08-06 22:09:15 +10:00
Ben Skeggs cf04641bc6 nouveau: Give DRM its own gpu channel
If your card doesn't have working context switching, it is now broken.
2007-08-06 22:05:31 +10:00
Ben Skeggs 51f24be578 nouveau: Determine trapped channel id from active grctx on >=NV40 2007-08-06 21:46:55 +10:00
Ben Skeggs 97770db720 nouveau: Various internal and external API changes
1. DRM_NOUVEAU_GPUOBJ_FREE
	Used to free GPU objects.  The obvious usage case is for Gr objects,
	but notifiers can also be destroyed in the same way.

	GPU objects gain a destructor method and private data fields with
	this change, so other specialised cases (like notifiers) can be
	implemented on top of gpuobjs.

2. DRM_NOUVEAU_CHANNEL_FREE

3. DRM_NOUVEAU_CARD_INIT
	Ideally we'd do init during module load, but this isn't currently
	possible.  Doing init during firstopen() is bad as X has a love of
	opening/closing the DRM many times during startup.  Once the
	modesetting-101 branch is merged this can go away.

	IRQs are enabled in nouveau_card_init() now, rather than having the
	X server call drmCtlInstHandler().  We'll need this for when we give
	the kernel module its own channel.

4. DRM_NOUVEAU_GETPARAM
	Add CHIPSET_ID value, which will return the chipset id derived
	from NV_PMC_BOOT_0.

4. Use list_* in a few places, rather than home-brewed stuff.
2007-08-06 21:45:18 +10:00
Ben Skeggs beaa0c9a28 nouveau: Pass channel struct around instead of channel id. 2007-08-06 03:40:43 +10:00
Patrice Mandin 2453ba19b6 nouveau:nv10: fill and use load,save graph context functions 2007-08-03 23:06:39 +02:00
Arthur Huillet f01026eae6 nouveau: creating notifier in PCI memory for PCIGART 2007-07-27 15:48:04 +02:00
Ian Romanick c561cb4650 Merge branch 'master' of ssh+git://git.freedesktop.org/git/mesa/drm into xgi-0-0-2
Conflicts:

	linux-core/drmP.h
	linux-core/drm_scatter.c
2007-07-26 16:58:28 -07:00
Eric Anholt cf2d569dac Replace NO_MOVE/NO_EVICT flags to buffer objects with an ioctl to set pinning.
This cleans up the create/validate interfaces for this very uncommon path, and
makes pinned object creation much easier to use for the X Server.
2007-07-26 10:15:11 -07:00
Ian Romanick 887cb31ee9 Fix bug preventing X server from restarting.
The core DRM lastclose routine automatically destroys all mappings and
releases SG memory.  XP10 DRM and DDX assumed this data stayed around
until module unload.  xgi_bootstrap was reworked to recreate all these
mappings.  In addition, the drm_addmap for the GART backing store was
moved into the kernel.  This causes a change to the ioctl protocol and
a version bump.
2007-07-24 13:27:44 -07:00
Ian Romanick 877296ade0 xgi_mem_alloc::offset is a hardware offset, so it should be u32, not long. 2007-07-21 21:36:11 -07:00
Ian Romanick 5d6fdd9d79 Clean up xgi_cmd_info and associated code.
There were numerous unnecessary fields in xgi_cmd_info.  The remaining
fields had pretty crummy names.  Cut out the cruft, and rename the
rest.  As a result, the unused parameter "triggerCounter" to
triggerHWCommandList can be removed.
2007-07-21 20:34:56 -07:00
Eric Anholt 5b38e13416 Replace DRM_IOCTL_ARGS with (dev, data, file_priv) and remove DRM_DEVICE.
The data is now in kernel space, copied in/out as appropriate according to the
This results in DRM_COPY_{TO,FROM}_USER going away, and error paths to deal
with those failures.  This also means that XFree86 4.2.0 support for i810 DRM
is lost.
2007-07-20 18:16:42 -07:00
Eric Anholt c1119b1b09 Replace filp in ioctl arguments with drm_file *file_priv.
As a fallout, replace filp storage with file_priv storage for "unique
identifier of a client" all over the DRM.  There is a 1:1 mapping, so this
should be a noop.  This could be a minor performance improvement, as everything
on Linux dereferenced filp to get file_priv anyway, while only the mmap ioctls
went the other direction.
2007-07-20 13:39:45 -07:00
Eric Anholt e39286eb5e Remove DRM_ERR OS macro.
This was used to make all ioctl handlers return -errno on linux and errno on
*BSD.  Instead, just return -errno in shared code, and flip sign on return from
shared code to *BSD code.
2007-07-20 12:53:52 -07:00
Ian Romanick 5ba94c2ab8 Initial pass at converting driver to DRM infrastructure. 2007-07-19 10:29:18 -07:00
Eric Anholt f4e1c1d05c FreeBSD warnings cleanup. 2007-07-19 06:46:13 -07:00
Eric Anholt 05204b9c8d Merge branch 'origin' 2007-07-19 06:31:26 -07:00
Ben Skeggs 0c95d489ab nouveau/nv50: get non-default push buffer sizes working. 2007-07-19 16:43:37 +10:00
Eric Anholt 33a50412c2 Add dry-coded DRM drawable private information storage for FreeBSD.
With this, all modules build again.
2007-07-18 14:22:49 -07:00
Pekka Paalanen af4cfa624a nouveau: Make nouveau_wait_for_idle() read PTIMER.
Following my nv28 kmmio dumps, nouveau_wait_for_idle() is modified to
read PTIMER and NV03_PMC_ENABLE. Also a timeout based on PTIMER value is
added, so wait_for_idle() cannot stall indefinitely (unless PTIMER is
halted). The timeout was selected as 1 giga-ticks, which for me is 1s.
2007-07-18 14:23:41 +03:00
Pekka Paalanen 696bee093f nouveau: Add read() method to Engine.timer.
This is not called from anywhere, yet.
2007-07-18 14:12:26 +03:00
Pekka Paalanen 0c77f5abea nouveau: Add bitfield names for NSOURCE and NSTATUS.
Name strings and pretty-printing in nouveau_graph_dump_trap_info().
2007-07-18 14:00:04 +03:00
Pekka Paalanen 14ecf8d6c2 nouveau: Replace 0x00400104 and 0x00400108 with names.
NV03_PGRAPH_NSTATUS and NV03_PGRAPH_NSOURCE.
The prefix NV03 is chosen because nv10reg.h had no versioned prefix,
and the code using these registers does not check card_type.
2007-07-18 13:52:39 +03:00
Dave Airlie a64b5d8d37 fix some missing whitespace/tab 2007-07-18 15:49:45 +10:00
Dave Airlie 6ad1df2176 drm: remove drm_u64_t, replace with uint64_t everwhere
This might break something, stdint.h inclusion in drm.h maybe required
but I'm not sure yet what platforms have it what ones don't.
2007-07-18 09:42:06 +10:00
Ian Romanick 8d60bf2f19 Add XP5 and XP10 PCI IDs. 2007-07-16 22:15:41 -07:00
Ian Romanick 2b6ea46513 Eliminate unnecessary structures and defines. 2007-07-16 21:11:22 -07:00
Ben Skeggs 875dd1e538 nouveau: Destroy PGRAPH context table on PGRAPH takedown 2007-07-17 14:06:05 +10:00
Ian Romanick 658ff2daf3 Eliminate several useless ioctls and associated cruft.
The ioctlss XGI_ESC_DEVICE_INFO, XGI_ESC_MEM_COLLECT,
XGI_ESC_PCIE_CHECK, XGI_ESC_GET_SCREEN_INFO, XGI_ESC_PUT_SCREEN_INFO,
XGI_ESC_MMIO_INFO, and XGI_ESC_SAREA_INFO, are completely unnecessary.
The will be doubly useless when the driver is converted to the DRM
infrastructure.
2007-07-16 20:58:43 -07:00
Ben Skeggs ec67c2def9 nouveau: G8x PCIEGART
Actually a NV04-NV50 ttm backend for both PCI and PCIEGART, but PCIGART
support for G8X using the current mm has been hacked on top of it.
2007-07-17 13:51:14 +10:00
Ian Romanick 70a8a60a3e Correct errors in the usage of pci_map_page.
With these changes the driver no longer instantly hard-locks a 6600LE
on a PowerPC G5.  I haven't tested any 3D apps yet.
2007-07-16 10:56:43 -07:00
Eric Anholt 3f04fe7890 Fix FreeBSD build. 2007-07-16 01:53:06 -07:00
Dave Airlie 24311d5d82 drm: remove drm_buf_t 2007-07-16 13:42:11 +10:00
Dave Airlie be85ad0333 drm: detypedef ttm/bo/fence code 2007-07-16 13:37:02 +10:00
Dave Airlie 6dce9e0735 drm: remove hashtab/sman and object typedefs 2007-07-16 12:48:44 +10:00
Dave Airlie 21ee6fbfb8 drm: remove drmP.h internal typedefs 2007-07-16 12:32:51 +10:00
Dave Airlie 1a07256d60 drm: remove ttm userspace typedefs 2007-07-16 11:30:53 +10:00
Dave Airlie b95ac8b7b3 drm: detypedef drm.h and fixup all problems 2007-07-16 11:22:15 +10:00
Dave Airlie f174f835ff drm: remove typedefs in drm.h to their own section 2007-07-16 10:13:58 +10:00
Dave Airlie 2134193af6 Merge branch 'drm-ttm-cleanup-branch' 2007-07-16 10:05:20 +10:00
Patrice Mandin bc7d6c76fa nouveau: nv10 and nv11/15 are different 2007-07-14 18:32:11 +02:00
Arthur Huillet aa6d9199fa applied patch from Ian Romanick fixing PCI DMA object creation code 2007-07-13 20:51:52 +02:00
Arthur Huillet 5ae3ad4f01 now attempting to create PCI object only when there is a pci_heap 2007-07-13 16:00:03 +02:00
Ben Skeggs 0029713451 nouveau: nuke internal typedefs, and drm_device_t use. 2007-07-13 15:09:31 +10:00
Ian Romanick 5522136b7f Merge branch 'master' into xgi-0-0-2 2007-07-12 15:28:17 -07:00
Ben Skeggs 851c950d98 nouveau: unbreak AGP 2007-07-13 02:18:59 +10:00
Ben Skeggs af317f1cc7 nouveau: mem_alloc() returns offsets, not absolute addresses now. 2007-07-12 11:55:47 +10:00
Ben Skeggs 522a0c868c nouveau: nuke left over debug message 2007-07-12 11:39:45 +10:00
Ben Skeggs 750371cb6e nouveau: separate region_offset into map_handle and offset. 2007-07-12 10:46:57 +10:00
Arthur Huillet 5fbdf9da8b fixed object creation code to not Oops on 64bits, worked around memalloc not working on 64bit for PCIGART 2007-07-12 02:35:39 +02:00
Arthur Huillet b301a9051b NV50 will not attempt to use PCIGART now 2007-07-11 15:01:37 +02:00
Arthur Huillet d26ae22c2b fixed bug that prevented PCIE cards from actually using PCIGART - NV50 will probably still have a problem 2007-07-11 14:56:27 +02:00
Ben Skeggs 5ccadac9e3 nouveau/nv50: G80 fixes.
Again, no hardware, so no idea if it'll even work yet.  I understand how
the PRAMIN setup works now, un-hardcoding stuff will come "RealSoonNow(tm)".
2007-07-11 14:22:59 +10:00
Ben Skeggs 13e1377044 nouveau: Some checks on userspace object handles. 2007-07-11 12:39:30 +10:00
Dave Airlie 2c9e05cf4c Merge branch 'master' into cleanup
Conflicts:

	libdrm/xf86drm.c
	linux-core/drm_bo.c
	linux-core/drm_fence.c
2007-07-11 11:23:41 +10:00
Arthur Huillet 694e1c5c3f Added support for PCIGART for PCI(E) cards. Bumped DRM interface patchlevel. 2007-07-11 02:35:10 +02:00
Ian Romanick a9c49be6f8 Fix ioctl types.
I had moved code from xgi_drv.h to xgi_drm.h before changing the ioctl
types for XGI_IOCTL_(FB|PCIE)_ALLOC.
2007-07-09 18:52:43 -07:00
Ian Romanick 1f4e24b429 Move types shared with user mode to xgi_drm.h. 2007-07-09 16:33:14 -07:00
Ben Skeggs 023f7d9c00 nouveau: Allocate mappable VRAM for notifiers.. 2007-07-09 23:58:00 +10:00
Ben Skeggs 31e33813e8 nouveau: Don't be so strict on <NV50 2007-07-09 20:02:14 +10:00
Ben Skeggs 3c58195ccd nouveau: Avoid oops
Turns out lastclose() gets called even if firstopen() has never been...
2007-07-09 16:16:44 +10:00
Ben Skeggs c806bba466 nouveau/nv50: Initial channel/object support
Should be OK on G84 for a single channel, multiple channels *almost* work.

Untested on G80.
2007-07-09 16:16:44 +10:00
Ben Skeggs 3324342e42 nouveau: enable reporting for all PFIFO/PGRAPH irqs 2007-07-09 16:16:44 +10:00
Ben Skeggs 163f852612 nouveau: rewrite gpu object code
Allows multiple references to a single object, needed to support PCI(E)GART
scatter-gather DMA objects which would quickly fill PRAMIN if each channel
had its own.

Handle per-channel private instmem areas.  This is needed to support NV50,
but might be something we want to do on earlier chipsets at some point?

Everything that touches PRAMIN is a GPU object.
2007-07-09 16:16:44 +10:00
Michel Dänzer 91990946fa One more spinlock initializer cleanup. 2007-07-03 12:33:51 +02:00
Alan Hourihane 70fd9351ed Move out the code from i915_dma_cleanup to unload to match
existing code.

This needs verifying.
2007-06-29 21:04:17 +01:00
Alan Hourihane adff58223f Bring back code from merge that was accidentally removed. 2007-06-29 20:58:16 +01:00
Alan Hourihane 14c49df06b merge fixes 2007-06-29 20:14:09 +01:00
Alan Hourihane 8a78dead29 Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
Conflicts:

	linux-core/drm_drv.c
	linux-core/drm_fops.c
	linux-core/drm_objects.h
	linux-core/drm_stub.c
	shared-core/i915_dma.c
2007-06-29 20:09:44 +01:00
Ben Skeggs e26ec51146 nouveau: small RAMFC cleanups 2007-06-29 14:20:50 +10:00
Ben Skeggs 1c32fecd6d nouveau: Hack around possible Xv blit adaptor breakage 2007-06-28 21:01:17 +10:00
Ben Skeggs 2dd85772aa nouveau/nv10: Fix earlier NV1x chips
Can't use nv04 code for them, since an extra field was inserted into
RAMFC after DMA_PUT/GET.
2007-06-28 04:23:17 +10:00
Ben Skeggs 68ecf61647 nouveau: never touch PRAMIN with NV_WRITE, cleanup RAMHT code a bit 2007-06-28 03:26:44 +10:00
Ben Skeggs 18a6d1c9c3 nouveau: simplify PRAMIN access 2007-06-28 03:26:44 +10:00
Ben Skeggs 38617b6a26 nouveau: name some regs 2007-06-28 03:26:44 +10:00
Ben Skeggs ce0d528d3c nouveau/nv50: skeletal backend 2007-06-28 03:26:43 +10:00
Ben Skeggs 695599f18d nouveau: Nuke DMA_OBJECT_INIT ioctl (bumps interface to 0.0.7)
For various reasons, this ioctl was a bad idea.

At channel creation we now automatically create DMA objects covering
available VRAM and GART memory, where the client used to do this themselves.

However, there is still a need to be able to create DMA objects pointing at
specific areas of memory (ie. notifiers).  Each channel is now allocated a
small amount of memory from which a client can suballocate things (such as
notifiers), and have a DMA object created which covers the suballocated area.
The NOTIFIER_ALLOC ioctl exposes this functionality.
2007-06-28 03:26:43 +10:00
Ben Skeggs 4f2dd78ff3 nouveau/nv04: Set NV_PFIFO_CACHE1_PUSH1 correctly + small tweaks 2007-06-28 03:04:48 +10:00
Thomas Hellstrom 9b9a127ed0 More 64-bit padding. 2007-06-26 23:25:40 +02:00
Ian Romanick 5c27f8a70e Add support SiS based XGI chips to SiS DRM. 2007-06-26 09:51:55 -07:00
Ben Skeggs 9f617522d9 nouveau: NV49/NV4B PGRAPH setup from jb17bsome and stephan_2303 2007-06-25 01:57:57 +10:00
Ben Skeggs 3dfc13e2da nouveau: kill some dead code 2007-06-24 19:00:44 +10:00
Ben Skeggs 5f05cd7086 nouveau: NV04/NV10/NV20 PGRAPH engtab functions
NV04/NV10 load_context()/save_context() are stubs.  I don't know enough about
how they work to implement them sanely.  The "old" context_switch() code
remains hooked up, so it shouldn't break anything.

NV20 will probably break if load_context() works.  No inital context values
are filled in, so when the first channel is created PGRAPH will probably end
up having its state zeroed.  Some setup from nv20_graph_init() will probably
need to be moved to the per-channel context setup.
2007-06-24 19:00:26 +10:00
Ben Skeggs 5d55b0655c nouveau: NV3X PGRAPH engtab functions 2007-06-24 18:58:38 +10:00
Ben Skeggs 341bc78207 nouveau: NV1X/2X/3X PFIFO engtab functions
Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC
entry size.
2007-06-24 18:58:14 +10:00
Ben Skeggs 05d86d950a nouveau: NV04 PFIFO engtab functions 2007-06-24 18:57:09 +10:00
Ben Skeggs acb710d1a5 nouveau: NV4X PGRAPH engtab functions 2007-06-24 18:56:40 +10:00
Ben Skeggs f2e64d5276 nouveau: NV4X PFIFO engtab functions 2007-06-24 18:56:01 +10:00
Ben Skeggs 0afb3b518e nouveau: split PFIFO/PGRAPH context creation 2007-06-24 18:55:23 +10:00
Ben Skeggs 9dbf322d26 nouveau: (mostly) hook up put_base again 2007-06-24 18:55:06 +10:00
Ben Skeggs 24b71c318a nouveau: prototype PFIFO/PGRAPH engtab API 2007-06-24 18:54:51 +10:00
Ben Skeggs 5c7c07fd49 nouveau: rename engtab functions 2007-06-24 18:54:36 +10:00
Michel Dänzer 068ffc1e1b radeon: Acknowledge all interrupts we're interested in.
Failure to do so was probably the root cause of fd.o bug 11287.
2007-06-22 11:55:26 +02:00
Oliver McFadden 40f6a696cb r300: Synchronized the register defines file; documentation changes. 2007-06-21 14:35:11 +00:00
Oliver McFadden 213732af43 r300: Allow writes to R300_VAP_PVS_WAITIDLE. 2007-06-21 14:32:58 +00:00
Oliver McFadden 215787e429 r300: Registers 0x2220-0x2230 are known as R300_VAP_CLIP_X_0-R300_VAP_CLIP_Y_1. 2007-06-18 08:42:46 +00:00
Oliver McFadden 8038e7b60f r300: Synchronized the register defines file again. 2007-06-18 08:36:50 +00:00
Michel Dänzer 3d5d41fa98 i915: Fix handling of breadcrumb counter wraparounds. 2007-06-15 17:13:11 +02:00
Thomas Hellstrom f984b1b8d1 Fix some obvious bugs. 2007-06-12 12:30:33 +02:00
Thomas Hellstrom b6b5df24b9 Try to make buffer object / fence object ioctl args 64-bit safe.
Introduce tile members for future tiled buffer support.
Allow user-space to explicitly define a fence-class.
Remove the implicit fence-class mechanism.
64-bit wide buffer object flag member.
2007-06-12 12:21:38 +02:00
Oliver McFadden 3181573073 r300: Added the CP maximum fetch size and ring rptr update variables. 2007-06-08 19:40:57 +00:00
Oliver McFadden 39625f9621 r300: Small correction to the previous commit. 2007-06-05 19:19:42 +00:00
Alex Deucher 9e0bd88c61 r300: Document more of the RADEON_RBBM_STATUS register. 2007-06-05 19:05:49 +00:00
Wang Zhenyu 109e2a10f2 Add support for the G33, Q33, and Q35 chipsets.
These require that the status page be referenced by a pointer in GTT, rather
than phsyical memory.  So, we have the X Server allocate that memory and tell
us the address, instead.
2007-06-05 11:15:29 -07:00
Dave Airlie c9dbe0f2c2 invalidate gart tlb on PCIE after table change 2007-06-05 12:38:43 +10:00
Dave Airlie 4294dcc050 complete PCIE backend for ttm
ttm test runs with it at least, needs to do more testing on it
2007-06-05 12:26:06 +10:00
Dave Airlie 07345af838 Merge branch 'origin' into radeon-ttm
Conflicts:

	shared-core/radeon_drv.h
2007-06-05 10:09:11 +10:00
Maurice van der Pot 4327d7f314 nouveau: fix RAMHT wrapping 2007-06-04 10:49:30 +10:00
Dave Airlie a05d4fecd3 radeon: refine irq acking for vbl on crtc 2 2007-06-03 18:30:52 +10:00
root 8d95f4bd91 Revert "move i915 to new drm_wait_on function"
This reverts commit feb6803778.

This was a bad idea, the macro is actually a bit harder to convert
to a static for the other use cases
2007-06-03 18:11:44 +10:00
Dave Airlie 4e9d215bdf radeon: add support for vblank on crtc2
This add support for CRTC2 vblank on radeon similiar to the i915 support
2007-06-03 16:28:21 +10:00
Wang Zhenyu 5c394b309d i915: Add support for 945GME chip 2007-05-31 11:09:15 +01:00
Wang Zhenyu 3917f85c73 i915: Add support for 965GME/GLE chip. 2007-05-31 11:09:07 +01:00
Jung-uk Kim b0c8d885ce Update a bunch of FreeBSD port code.
Tested on r200/r300.  i915 updates still remain to be done.
2007-05-29 15:02:44 -07:00
Thomas Gleixner 2bb7703698 drm: spinlock initializer cleanup 2007-05-26 05:20:59 +10:00
Dave Airlie ad02c536df radeon: add other IGP chipsets 2007-05-26 04:02:55 +10:00
Dave Airlie 58b2ed7832 Revert "drm/ttm: cleanup mm_ioctl ioctls to be separate ioctls."
This reverts commit 3fdef0dc20.

ditto not on master yet
2007-05-26 03:48:08 +10:00
Dave Airlie 375f3f2884 Revert "drm/ttm: cleanup most of fence ioctl split out"
This reverts commit 3dfc1400e9.

this shouldn't have gone on master yet
2007-05-26 03:47:48 +10:00
Dave Airlie ce58e53a01 whitespace fixups from kernel 2007-05-26 03:32:34 +10:00
Dave Airlie 3dfc1400e9 drm/ttm: cleanup most of fence ioctl split out 2007-05-26 03:32:34 +10:00
Dave Airlie 3fdef0dc20 drm/ttm: cleanup mm_ioctl ioctls to be separate ioctls.
This is the first bunch of ioctls
2007-05-26 03:32:34 +10:00
Dave Airlie 7b48f0022a drm: cleanup use of Linux list handling macros
This makes the drms use of the list handling macros a lot cleaner
and more along the lines of how they should be used.
2007-05-26 04:26:24 +10:00
Jesse Barnes 462d5a0dfc Suspend/resume support (incomplete). 2007-05-22 17:49:04 -07:00
Jesse Barnes e918d2b781 Call preallocated space VRAM instead of PRIV0 to be more consistent with
other drivers.
2007-05-22 13:38:58 -07:00
Alan Hourihane 3851600b34 Fix merge problem. 2007-05-18 13:59:46 +01:00
Alan Hourihane 315cf14af8 Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
Conflicts:

	shared-core/i915_dma.c
2007-05-18 13:48:56 +01:00
Jesse Barnes b7bf317f42 Merge branch 'modesetting-101' of git+ssh://git.freedesktop.org/git/mesa/drm into origin/modesetting-101
Conflicts:

	linux-core/drm_crtc.c
	linux-core/drm_fb.c

Lots of changes to merge with alanh's latest stuff:
  o fix use of fb->pitch now that it has the right value
  o add new helper for finding the CRTC given an FB
  o fix new fb_probe/fb_remove functions to take a CRTC
  o fixup callers of new FB routines
  o port drm_fb changes to intel_fb
  o check for errors after creating fb buffer object
  o go back to using cfb_imageblit since the accel stubs aren't ready
2007-05-17 10:35:07 -07:00
Jesse Barnes a18b4befb9 Fix FB pitch value (we had it wrong and were working around it in a few
places).
Add new FB hooks to the drm driver structure and make i915 use them for an
Intel specific FB driver.  This will allow acceleration and better handling
of the command stream.
2007-05-17 09:00:06 -07:00
Oliver McFadden ca725bba84 r300: Added my comments into r300_reg.h. 2007-05-13 16:18:54 +00:00
Oliver McFadden c6ff0caaa3 r300: Synchronized R300 register defines file.
Just moved the indent control comments so that indent doesn't try to change
anything.
2007-05-13 07:53:57 +00:00
Matthieu Castet e9b604ed3f nouveau : nv10 graph move clipping value to per channel init 2007-05-12 15:36:48 +02:00
Matthieu Castet 5d623935c0 nouveau : nv10 graph clipping values were forgoten in ddx to drm commit 2007-05-12 15:36:48 +02:00
Keith Packard e4d163d81a Allow vblank interrupts to remain disabled across VT switch.
i915_driver_irq_postinstall was forcing vblank interrupts to pipe A when
called with vblank interrupts disabled. This caused vblank interrupts to be
accidentally re-enabled when VT switching the X server. Instead, start the
driver with vblank interrupts enabled on pipe A to support older X servers,
but then leave control over the state to the X server if it is able to do so.
2007-05-10 13:15:32 -07:00
Alan Hourihane eba00df120 Just some minor cleanups. 2007-05-10 13:16:05 +01:00
Oliver McFadden e0056c7eb4 r300: Synchronized R300 register defines file. 2007-05-09 18:31:31 +00:00
Oliver McFadden a02b045142 r300: Synchronized R300 register defines file. 2007-05-09 15:22:40 +00:00
Matthieu Castet 59784116bf nouveau : fix fifo context size for nv10 2007-05-08 21:20:25 +02:00
Dave Airlie b2a875ba89 ttm: complete drm buffer object ioctl split
retain the op operation for validate/fence operations
2007-05-08 18:25:15 +10:00
Dave Airlie 25c51f539f drm/ttm: ioctl cleanup for buffer object - user side only
This just cleans up the xf86drm.c to what I want and drm.h,
I need to fix up the kernel internals to suit these changes now.

I've moved to using struct instead of typedefs for the bo and it doesn't look
that bad so I'll do the same thing for mm and fence..
2007-05-08 17:53:58 +10:00
Oliver McFadden 4e858f8811 r300: Synchronize the register file from Mesa. 2007-05-06 12:47:03 +00:00
Oliver McFadden 87ec1fea6c r300: Use the defined names for known registers. 2007-05-06 12:35:16 +00:00
Dave Airlie 6a62941eca drm/ttm: cleanup most of fence ioctl split out 2007-05-06 11:35:11 +10:00
Dave Airlie ee8954cb53 drm/ttm: cleanup mm_ioctl ioctls to be separate ioctls.
This is the first bunch of ioctls
2007-05-06 11:17:30 +10:00
Michel Dänzer f06ad82ecd Fix userspace ABI breakage from 3c384a9ad5. 2007-05-01 17:03:55 +02:00
Dave Airlie 89231953d1 Add support for user defined modes
This allows userspace to specify modes and add them to the modesetting
system and attach modes to outputs
2007-05-01 13:16:29 +10:00
Michel Dänzer ca1cd3257c radeon: Don't mess up page flipping when a file descriptor is closed.
There can still be other contexts that may use page flipping later on, so don't
just unilaterally 'clean it up', which could lead to the wrong page being
displayed, e.g. when running 3D apps with a GLX compositing manager such as
compiz using page flipping.
2007-04-29 12:37:51 +02:00
Dave Airlie feb6803778 move i915 to new drm_wait_on function 2007-04-28 15:07:43 +10:00
Dave Airlie 9f9c19065c remove DRM_GETSAREA and replace with drm_getsarea function 2007-04-28 15:07:43 +10:00
George Sapountzis e88934274a Revert "bug 7092 : add pci ids for mach64 in Dell poweredge 4200"
This reverts commit 255f3e6f76.

Rage IIc does not have a vertex setup engine.
2007-04-26 14:16:51 +03:00
George Sapountzis 942d9be296 freebsd: remove stray apperance of IN_MODULE.
The xserver no longer uses the libc-wrapper.
2007-04-26 14:16:13 +03:00
Jesse Barnes 3c384a9ad5 Add new buffer object type for kernel allocations that don't initially have a user mapping.
(cherry picked from commit 2e21779992)
2007-04-26 16:04:09 +10:00
Dave Airlie b589b846e7 Merge branch 'origin' into modesetting-101 2007-04-26 15:56:21 +10:00
Dave Airlie 34be91fe4e i915: fix vblank pipe setup 2007-04-26 14:50:00 +10:00
Stephane Marchesin 61477d60c4 nouveau: fix wacky pci id 2007-04-23 22:37:36 +02:00
Dave Airlie 0f3c5148f0 fixup vrefresh reporting, it should now be *1000 in userspace 2007-04-23 09:10:46 +10:00
Jesse Barnes eb892fb09d Add a monitor information structure separate from the EDID data for tracking
monitor limits, etc.
2007-04-20 17:59:30 -07:00
Dave Airlie e46e028bd2 Merge branch 'origin' into modesetting-101
Conflicts:

	linux-core/drm_bo.c

Merge in changes from master from Thomas fixiing TTM problems
2007-04-18 14:11:49 +10:00
David Airlie 7c9e19ba55 clean up ring buffer and TTM in i915_driver_unload
I've commented out the framebuffer for now
2007-04-18 10:39:27 +10:00
Jesse Barnes 1c7f895fa6 Merge branch 'modesetting-101' of git+ssh://git.freedesktop.org/git/mesa/drm into origin/modesetting-101
Conflicts:

	shared-core/i915_init.c - reconcile with airlied's new code
2007-04-17 10:14:18 -07:00
Jesse Barnes 4e4d9cbeb3 Move initial framebuffer allocation and configuration to drm_initial_config,
remove i915_driver_load fb related stuff.  Add a small helper for setting up
outputs.
2007-04-17 10:00:37 -07:00
Jesse Barnes eeb5de0594 Cleanup whitespace, rename macro argument. 2007-04-17 09:59:21 -07:00
Alan Hourihane 32b5616cc6 Correct PCI ID for i845 2007-04-17 16:08:26 +01:00
Dave Airlie 79aa1d5474 another large overhaul of interactions with userspace...
We need to keep a list of user created fbs to nuke on master exit.
We also need to use the bo properly.
2007-04-17 18:16:38 +10:00
Thomas Hellstrom e805ca959d via: Make sure we flush write-combining using a follow-up read. 2007-04-17 08:58:23 +02:00
Jesse Barnes 65619cab27 Fix PRIV0 memory initialization (mm_init takes pages, not bytes), align fb
allocation correctly, and use drm_mem_reg_iomap to map ring buffer object.
2007-04-14 15:35:21 -07:00
David Airlie cc471a361f i915/drm: clean up a lot of the i915/drm startup/teardown sequences
When the kernel driver is loaded it sets up a lot of stuff..
it tears down the same stuff on unload.

This add a new map type called DRM_DRIVER which means the driver will clean the mapping up
and fix up the map cleaner
2007-04-13 14:51:16 +10:00
Jesse Barnes e183a091ff Initialize the hw lock waitqueue so we don't hang in drm_lastclose. 2007-04-12 11:40:12 -07:00
Jesse Barnes 2160e267ff Don't use drm_setup, do SAREA allocation and mapping directly instead. 2007-04-12 09:01:53 -07:00
Jesse Barnes e7b97f5523 Merge branch 'modesetting-101' of git+ssh://git.freedesktop.org/git/mesa/drm into origin/modesetting-101 2007-04-12 08:55:51 -07:00
Alan Hourihane 9420ab4b41 Merge remote branch 'origin/modesetting-101' into modesetting-101 2007-04-12 15:10:08 +01:00
Jesse Barnes e8bd9fdf31 Merge branch 'modesetting-101' of git+ssh://git.freedesktop.org/git/mesa/drm into origin/modesetting-101 2007-04-11 20:41:54 -07:00
Jesse Barnes 0430a80fc7 Remove debug statement about buffer objects 2007-04-11 20:41:27 -07:00
Dave Airlie fb6c5aacb9 only initialise modes when fbcon or fbset asks for it 2007-04-12 11:54:49 +10:00
Dave Airlie a81558d8b3 add getfb ioctl 2007-04-12 08:45:40 +10:00
Jesse Barnes 9d7160c43a Use new kernel buffer object type and cleanup agp probing. 2007-04-11 12:52:57 -07:00
Jesse Barnes 2e21779992 Add new buffer object type for kernel allocations that don't initially have a user mapping. 2007-04-11 12:51:52 -07:00
Jesse Barnes 8dd75bd601 Add aperture size and preallocation probing (from intelfb), cleanup load code to be more general. 2007-04-11 11:47:58 -07:00
Jesse Barnes cc7faa4de8 fix modeset cleanup for LVDS and reenable it in i915. 2007-04-11 07:21:24 -07:00
Jesse Barnes 78598fdaa8 Various changes for in-kernel modesetting:
- allow drm_buffer_object_create to be called w/o dev_mapping
  - fixup i915 init code to allocate memory, fb and set modes right
  - pass fb to drm_initial_config for setup
  - change some debug output to make it easier to spot
  - fixup lvds code to use DDC probing correctly
2007-04-11 07:07:54 -07:00
David Airlie a6cc6a778f add support for setting a framebuffer depth 2007-04-11 17:13:45 +10:00
Dave Airlie 32f6a58db2 add initial drm_fb framebuffer
So far I can load fbcon, once I use my miniglx to add a framebuffer.
fbcon doesn't show anything on screen but baby steps and all that.
2007-04-11 16:33:03 +10:00
Dave Airlie add7a928ad comment out unworkable code 2007-04-11 14:43:02 +10:00
Dave Airlie 3dd5dc5728 only init at driver load 2007-04-11 14:34:43 +10:00
Dave Airlie b329f91502 use the baseaddr at least 2007-04-11 14:04:18 +10:00
David Airlie 44be9c9d59 add an fb count + id get to the get resources code path 2007-04-11 13:26:21 +10:00
Matthieu Castet 9b7211dd67 nouveau: nv10 per channel init from ddx 2007-04-10 23:20:13 +02:00
Jesse Barnes 44a8761302 Merge branch 'modesetting-101' of git+ssh://git.freedesktop.org/git/mesa/drm into origin/modesetting-101
Conflicts:

	linux-core/drm_crtc.c - trivial merge
	linux-core/drm_crtc.h - trivial merge
	linux-core/intel_display.c - crtc_config -> mode_config
	shared-core/i915_dma.c - accommodate new init code in i915_init.c
2007-04-10 10:45:55 -07:00
Jesse Barnes b59285d738 Move i915 init code to new file, i915_init.c, and create a new high level
init routine that runs at driver load time.
2007-04-10 10:31:10 -07:00
Jesse Barnes 5130918e25 Add save/restore state for LVDS code, along with a few other LVDS related
items to i915 private structure.
2007-04-10 09:51:17 -07:00
David Airlie 1e39dc4323 export output name to userspace 2007-04-10 16:25:31 +10:00
David Airlie 40bd6dcd86 set the base address of the CRTC correctly 2007-04-10 15:20:50 +10:00
David Airlie 65f465ed5a fixup numerous issues with adding framebuffer support
This still isn't perfect but it fixes a few oopses and cleans up
some of the tabs and bugs in the original fb limit code
2007-04-10 14:49:49 +10:00
Jakob Bornecrantz b50bda002b add addfb/rmfb ioctls
Originally from Jakob, cleaned up by airlied.
2007-04-10 18:44:47 +10:00
Oliver McFadden 059b5d9077 rs480: Renamed some unknown registers. See dri-devel list. 2007-04-09 23:23:40 +00:00
Ben Skeggs 2d7f9f59c3 nouveau: NV46 support 2007-04-09 23:20:26 +10:00
Dave Airlie 29f8fe8046 radeon: bump version for IGPGART support 2007-04-09 22:00:34 +10:00
Dave Airlie a70f8e0ab2 radeon: add support for reverse engineered xpress200m
The IGPGART setup code was traced using mmio-trace on fglrx by myself
and Phillip Ezolt <phillipezolt@gmail.com> on dri-devel.

This code doesn't let the 3D driver work properly as the card has no
vertex shader support.

Thanks to Matthew Garrett + Ubuntu for providing me some hardware to do this
work on.
2007-04-09 21:52:59 +10:00
Dave Airlie 46257c51c1 i915: use breadcrumb macro everywhere 2007-04-06 20:21:44 +10:00
Ben Skeggs 78034c06df nouveau: make a note about a bit that breaks some cards 2007-04-06 03:27:55 +10:00
Ben Skeggs 38f52402a8 nouveau: Power up all card units by default on startup. 2007-04-06 03:26:19 +10:00
Dave Airlie b4094864f1 checkpoint commit: implement SetCrtc so modes can in theory be set from user
This hooks up the userspace mode set it "seems" to work.
2007-04-05 18:01:02 +10:00
Dave Airlie 7bb112feca checkpoint commit: added getresources, crtc and output
This adds the user interfaces from Jakob and hooks them up for 3 ioctls
GetResources, GetCrtc and GetOutput.

I've made the ids for everything fbs, crtcs, outputs and modes go via idr as
per krh's suggestion on irc as it make the code nice and consistent.
2007-04-05 17:06:42 +10:00
Dave Airlie 5bffbd6e27 initial userspace interface to get modes 2007-04-05 13:34:50 +10:00
Dave Airlie 52f9028c84 Initial import of modesetting for intel driver in DRM 2007-04-05 11:21:06 +10:00
Thomas Hellstrom 139e4bbc73 Make sure we ack irqs before we read a breadcrumb so that
breadcrumb updates that occur _AFTER_ we've read the breadcrumb really
generates a new IRQ.
2007-04-03 10:29:15 +02:00
Oliver McFadden 5395a92d40 r300: Synchronize the register header file again.
It's a good idea to keep these synchronized; even though the DRM doesn't use all
the defines, maintaining two different copies is prone to errors when the diff
gets bigger.
2007-04-02 19:45:10 +00:00
Matthieu Castet cbbdbd5e65 nouveau: fix usage of PGRAPH_CTX_CONTROL on nv20+
http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=17985f07d68322519919a7f629a6d2d9bf3916ed could have broken some nvxx_graph code : it rename NV03_PGRAPH_CTX_CONTROL to NV10_PGRAPH_CTX_CONTROL, but forgot to update it in nvxx_graph file.

Also when migrating init stuff in http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=674cefd4fe4b537a20a10edcb4ec5df55facca8e, NV04_PGRAPH_CTX_CONTROL is used everywhere but the old ddx code use NV_PGRAPH_CTX_CONTROL_NV04 or NV_PGRAPH_CTX_CONTROL.
2007-04-01 14:31:41 +02:00
Matthieu Castet 25cedcf76f nouveau : nv10 ctx switch fix
restoring NV10_PGRAPH_CTX_SWITCH1 now works
2007-04-01 14:21:29 +02:00
Dave Airlie bdc5a8b62e radeon: enable buffer manager 2007-04-01 19:09:00 +10:00
Dave Airlie b1f0b2d960 radeon: de-static irq function, fixup fence/buffer 2007-04-01 18:24:23 +10:00
Dave Airlie be5bf1346e copy over some files and reorg radeon to add ttm fencing not working yet 2007-04-01 16:48:38 +10:00
Matthieu Castet 223061e084 nouveau : set the correct PGRAPH_CTX_CONTROL register
"5a072f32        (Stephane Marchesin     2007-02-03 04:57:06 +0100" broke nv10 ctx switch by setting wrong PGRAPH_CTX_CONTROL reg
2007-04-01 00:44:11 +02:00
Eric Anholt ddb1715e06 Merge branch 'crestline-qa', adding support for the 965GM chipset. 2007-03-30 13:11:39 -07:00
Stephane Marchesin bdabc8f998 nouveau: fix nv04 context switches. 2007-03-29 00:54:18 +02:00
Dave Airlie 81b811da37 drm/i915: set the bo up at firstopen time not after DMA init
This is required to use TTM to allocate the ring buffer.
2007-03-27 18:01:31 +10:00
Nian Wu 406a894e52 Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-27 12:53:13 +08:00
Ben Skeggs 674cefd4fe nouveau: move card initialisation into the drm
The PGRAPH init for the various cards will need cleaning up at some point,
a lot of the values written there are per-context state left over from the
all the hardcoding done in the ddx.

It's possible some cards get broken by this commit, let me know.
Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
2007-03-26 20:59:37 +10:00
Nian Wu e7cd5a1e2d Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-23 17:00:41 +08:00
Ben Skeggs 4988fa4886 nouveau: rework nouveau_fifo_alloc() so the drm can create internal FIFOs 2007-03-23 15:25:37 +11:00
Ben Skeggs 2bb9de96d5 nouveau: remove unused cruft 2007-03-23 13:45:29 +11:00
Nian Wu 0467ad4118 Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-21 17:00:43 +08:00
Ben Skeggs e22225416a nouveau: support multiple channels per client (breaks drm interface) 2007-03-21 17:57:47 +11:00
Nian Wu 8398b99d8d Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-19 17:00:31 +08:00
Dave Airlie 26aba875e1 more whitespace issues 2007-03-19 08:56:24 +11:00
Dave Airlie 2463b03cb4 whitespace cleanup pending a kernel merge 2007-03-19 08:23:43 +11:00
Nian Wu df73975980 Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-14 17:00:27 +08:00
Oliver McFadden 93f66af76a r300: Renamed the CACHE_CTLSTAT values to include UNKNOWN in the name; not
enough information is known about them to be sure as to what the values mean.
2007-03-13 14:48:01 +00:00
Nian Wu 80d0018bc0 Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-13 17:00:31 +08:00
Oliver McFadden a90c2854a7 Add defines for the values written to R300_RB3D_ZCACHE_CTLSTAT.
Note that just like the values written to R300_RB3D_DSTCACHE_CTLSTAT these
values are really unknown; ideally more reverse engineering should be done to
determine what these values mean and when they should be set.
2007-03-13 06:25:04 +00:00
Ben Skeggs 90f8c691a5 nouveau: make sure cmdbuf object gets destroyed 2007-03-13 14:55:54 +11:00
Ben Skeggs 1775202cf9 nouveau: associate all created objects with a channel + cleanups 2007-03-13 14:55:54 +11:00
Ben Skeggs 7e2bbe2954 nouveau: s/fifo/channel/ 2007-03-13 14:55:54 +11:00
Oliver McFadden 462a6ea4ca Corrected values written to R300_RB3D_DSTCACHE_CTLSTAT to either
R300_RB3D_DSTCACHE_02 or R300_RB3D_DSTCACHE_0A, rather than hexadecimal values.
2007-03-13 01:19:56 +00:00
Oliver McFadden 5667396e05 Guess another unknown register used for R300 pacification. 2007-03-13 00:50:05 +00:00
Nian Wu ab75d50d6c Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-12 09:03:40 +08:00
Patrice Mandin 0cd5c650d1 nouveau: PUT,GET, not 2xPUT 2007-03-11 14:02:40 +01:00
Nian Wu b369724077 Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-07 16:01:50 -05:00
Thomas Hellstrom 6ffe94f008 Add via CX700. 2007-03-07 09:19:57 +01:00
Nian Wu 0a85c9fa02 Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestline 2007-03-05 09:01:45 -05:00