v2: Fold libpciaccess and libdrm into a single local_shared_libraries
Acked-by: Jan Vesely <jan.vesely@rutgers.edu>
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
After much searching and empricial testing, and reading of
things I've no justifcation for this fix, other than it really
appears this is what the hw is doing or close enough.
It makes sense that each entry in the FMASK corresponds to
an entry in the CMASKm and the CMASK is organised into 128x128
blocks, but I can't find anything in any of the docs/info from AMD.
But I've spent a lot of time on this, and this seems to be the
simplest fix, in that we don't over allocate things too much,
once this fix in place we can nuke the extra multiplier in mesa.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
slice_pt is tileb[0] / tile_split, which isn't directly related to the
pitch.
This caused pitch_bytes to be too large in some cases.
[0] Tile size in bytes
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Autotools is already smart enough to pick the *.pc.in files but it
needs some help with the Android.mk ones.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Will be used to consolidate the required sources lists as well as the
install-able headers. This is turn will help us to avoid the
duplication with the upcoming Android build support.
v2: Rename the headers variable to *_H_FILES.
v3: Rebase on top of symbol visibility patches.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
All the bof_* symbols are now no longer exported.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Some users report hitting a divide by 0 with the tile split in
certain apps. Tile_split shouldn't ever be 0 unless the surface
structure was not properly initialized. I think there may be some
cases where mesa uses an improperly initialized surface struct,
but I haven't had time to track it down.
Bug:
https://bugs.freedesktop.org/show_bug.cgi?id=72425
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bug fixes and simplification by Marek.
We have to use the tile index of 0 for non-MSAA depth-stencil after all.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
This fixes VM protection faults.
I have a new piglit test which can iterate over all possible widths, heights,
and depths (including NPOT) and tests mipmapping with various texture targets.
After this is committed, I'll make a new release of libdrm and bump
the libdrm version requirement in Mesa.
Aligns the IB to 8 DWs. The aligns the IB to the
CP fetch size. r6xx also require at least 4 DW
alignment to avoid a hw bug.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
RADEON_GEM_WAIT_IDLE is declared DRM_IOW but libdrm
uses it with drmCommandWriteRead instead of drmCommandWrite
which leads to the ioctl being unmatched and returning an
error on at least OpenBSD.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
v2: Only writte tile index if flags for it is set
v3: Remove useless allow2d scanout flags
v4: Split radeon_drm.h update to its own patch
v5: update against lastest next tree for radeon
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Very similar to Evergreen, but slightly different rules for tile / slice
alignment. Fortunately, these map quite naturally onto the previous fixes for
linear aligned layout on SI.
2D tiling still needs more work here and possibly in the kernel.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
To avoid kernel rejecting cs if we return different global name
for same bo keep track of global name and always return the same.
Seems to fix issue with suspend/resume failing and repeatly printing
following message :
[drm:radeon_cs_ioctl] *ERROR* Failed to parse relocation -35!
There might still be way for a rogue program to trigger this issue.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
This allows texturing with depth-stencil buffers directly without the copy
to CB. The separate miptree description for stencil is added, because
the stencil mipmap offsets are not really depth offsets/4 (at least
for the texture units).
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Chih-Wei Huang
Dave Airlie
Michel Dänzer
Emil Velikov
Maks Naumov
Alex Deucher
Maarten Lankhorst
Marek Olšák
Thomas Klausner
Samuel Li
Mark Kettenis
Marek Olšák
Jerome Glisse
Alex Deucher
Andreas Boll