e4f29968f4
Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
2008-05-13 14:47:17 -07:00
ee631e1b86
i915: register definition & header file cleanup
...
It would be nice if one day the DRM driver was the canonical source for
register definitions and core macros. To that end, this patch cleans
things up quite a bit, removing redundant definitions (some with
different names referring to the same register) and generally tidying up
the header file.
2008-05-13 14:44:17 -07:00
5be53a0881
i915: execbuf now works without i915_dma_init being called
2008-05-13 09:26:26 +02:00
d32ce7f621
i915: TV hotplug fixes
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In order to avoid recursive ->detect->interrupt->detect->interrupt->...
we need to disable TV hotplug interrupts in
intel_tv.c:intel_tv_detect_type. We also need to enable the TV interrupt
detection and hotplug sequence properly in i915_irq.c.
2008-05-12 15:47:19 -07:00
f650d7240a
[GEM] Typo (and thinking) fixes in drm-gem.txt and doxygen.
2008-05-12 13:17:01 -07:00
7e7ea313c4
[intel] When polling for ring space, sleep for a lot longer (10ms)
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If the ring is full, the engine will surely be running for more than 10ms.
2008-05-12 13:03:16 -07:00
a51e38548c
fix kernel oops when removing fb
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drm_crtc->fb may point to NULL, f.e X server will allocate a new fb
and assign it to the CRTC at startup, when X server exits, it will destroy
the allocated fb, making drm_crtc->fb points to NULL.
2008-05-12 12:31:56 -07:00
f1b9bbe2b8
modeset init code cleanup
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moving modeset init code into one function and correct error
handling druing i915 init
2008-05-12 12:07:04 -07:00
af60d87869
fix G33 hardware status page in modeset
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We need to alloc a hw status page bo for G33 if modeset is enabled since the 2D
driver can't alloc gfx memory when working in drm modeset.
2008-05-12 12:04:02 -07:00
10d754f0a2
RADEON: fix copy/pasto in last commit
2008-05-12 14:49:43 -04:00
75bc739bee
R3/4/5: init pipe setup in drm
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Similar (broken) code in mesa needs to be removed
2008-05-12 09:44:20 -04:00
e16a7101e8
RADEON: cleanup radeon_do_engine_reset()
2008-05-12 09:35:06 -04:00
5532b8d2a0
R300+: fixup pixcache flush
2008-05-12 09:30:47 -04:00
3582e82f14
RS4xx: fix MCIND index mask
2008-05-12 09:24:13 -04:00
d26af273f8
RADEON: write AGP_BASE_2 on chips that support it
2008-05-12 09:21:45 -04:00
c307e50724
R300+: fixup PURGE/FLUSH macros
2008-05-12 09:18:28 -04:00
fb9eaff747
Radeon IGP: merge RS4xx/RS6xx gart setup
2008-05-12 09:13:44 -04:00
68b7f550ba
Radeon IGP: wrap MCIND access
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first step in merging rs4xx/rs6xx gart setup
2008-05-12 09:00:40 -04:00
a34025ce22
Radeon IGP: clean up registers and magic numbers
2008-05-12 08:56:11 -04:00
3f66a0005c
drm: remove root only from a lot of drm ioctls to get stuff running as non-root
2008-05-12 16:29:22 +10:00
ff39db099b
[GEM] Make pread/pwrite manage memory domains. No luck with movnti though.
...
pread and pwrite must update the memory domains to ensure consistency with
the GPU. At some point, it should be possible to avoid clflush through this
path, but that isn't working for me.
2008-05-11 00:10:16 -07:00
1f9eaceb71
Merge commit 'anholt/drm-gem' into drm-gem
2008-05-10 21:05:25 -07:00
a37ac493da
[intel-GEM] Clean up GEM ioctl naming.
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Rename 'validate_entry' to 'exec_object', then clean up some field names in
structures (renaming buffer_offset to just offset, for example).
2008-05-10 21:04:18 -07:00
c5c59eab80
GEM: Separate the LRU into execution list and LRU list.
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Now, the LRU list has objects that are completely done rendering and ready
to kick out, while the execution list has things with active rendering,
which have associated cookies and reference counts on them.
2008-05-09 17:38:32 -07:00
dce3442194
fixup i915 workqueue handling when modeset=1
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Fixup workqueue creation error handling and make sure we destroy the queue on
unload.
2008-05-09 14:29:10 -07:00
12725a37af
i915: add basic VBT support
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Map the VBIOS (and therefore VBT) at init time for use by various output
initialization routines.
2008-05-09 14:19:00 -07:00
1e26ca44c9
[gem] API cleanup. allocate->create unreference->close name->flink
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Make the API names a bit more consistent.
2008-05-09 12:18:09 -07:00
7bcbc443f4
i915: Changed intel_fb to use the new drm_crtc_set_config interface
2008-05-08 20:10:18 +02:00
9af4c49743
[intel-gem] Move domains to relocation records. add set_domain ioctl.
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Domain information is about buffer relationships, not buffer contents. That
means a relocation contains the domain information as it knows how the
source buffer references the target buffer.
This also adds the set_domain ioctl so that user space can move buffers to
the cpu domain.
2008-05-08 10:44:02 -07:00
4466fea7ba
Revert "i915: fix vbl swap for multi-master"
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This reverts commit 2a78ad2264
2008-05-08 17:12:16 +10:00
2a78ad2264
i915: fix vbl swap for multi-master
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patch from F9 tree
2008-05-08 16:14:33 +10:00
ed072ed075
drm_mode: initial replacefb implemenation
2008-05-08 14:02:05 +10:00
ef204fb5c2
Merge remote branch 'origin/master' into modesetting-101
...
Conflicts:
linux-core/Makefile.kernel
shared-core/i915_drv.h
2008-05-08 10:25:01 +10:00
5f5f01ed91
GEM: Extend cache domain stuff for 965.
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One of our MI_FLUSH bits is reserved on 965, being always implied, and there's
a vertex cache that was forgotten.
2008-05-07 12:46:06 -07:00
6a6c37af9e
[intel-GEM] ref count objects in gtt-lru.
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If objects on the lru aren't ref counted, they'll get pulled from the gtt as
soon as they are freed. This change does cause objects to get stuck in the
gtt until they're forced out by new requests. The lru should get cleaned
when the irq occurs.
2008-05-06 21:59:06 -07:00
2b9ef32669
Merge commit 'anholt/drm-gem' into drm-gem
2008-05-06 14:43:56 -07:00
631e86c5c4
Start coding up memory domains
2008-05-06 14:43:49 -07:00
d2373b2a34
GEM: Use irq-based fencing rather than syncing and evicting every exec.
2008-05-06 13:28:26 -07:00
91cba3ae17
Dump last batch buffer when hardware lockup is detected.
2008-05-05 22:10:02 -07:00
ed6657fa8e
Monitor ACTHD register while polling for idle ring.
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When batch buffers are executing, the ring may be stuck for a long time.
Monitor the ACTHD pointer which will show if the execution engine is
actually hung.
2008-05-05 22:09:34 -07:00
d59a9300ec
Remove some debug messages.
2008-05-05 14:32:01 -07:00
4511e6cd80
Correct execbuffer offset. Add memory barrier and chipset flush.
2008-05-05 11:27:06 -07:00
b6f173c430
Add i915_dispatch_gem_execbuffer (broken).
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This function submits a gem-based execbuffer to the ring.
It doesn't work yet.
2008-05-05 10:51:49 -07:00
d015219bd0
r500: add allowed range for us config/pixsize
2008-05-05 17:03:27 +10:00
39e20bcd5f
Add name/open ioctls, separate handle and pointer ref counts.
...
Names are just another unique integer set (from another idr object).
Names are removed when the user refernces (handles) are all destroyed --
this required that handles for objects be counted separately from
internal kernel references (so that we can tell when the handles are all
gone).
2008-05-02 12:29:17 -07:00
49e8e3372a
Remove drm_driver argument to functions taking drm_gem_object.
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Now that drm_gem_object has a drm_driver * in it, functions don't need both
parameters.
2008-05-02 10:36:00 -07:00
5b5b68ffd2
Fix nouveau warning when returning pointers in uint64_t objects.
2008-05-02 10:34:46 -07:00
0d547c9ed9
Add alignment to all aperture allocation requests.
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When pinning buffers, or using execbuffer, allow the application to specify
the necessary aperture allocation alignment constraints.
2008-05-01 20:41:55 -07:00
30efad5113
Fix gem ioctls to be 32/64-bit clean.
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mixed 32/64 bit systems need 'special' help for ioctl where the user-space
and kernel-space datatypes differ. Fixing the datatypes to be the same size,
and align the same way for both 32 and 64-bit ppc and x86 environments will
elimiante the need to have magic 32/64-bit ioctl translation code.
2008-05-01 20:31:16 -07:00
7d5f783eca
Make GEM object handles be nonzero.
2008-05-01 16:38:37 -07:00
d2529d1396
Remove _args from gem ioctl argument structure tags.
2008-05-01 16:27:03 -07:00
793549116e
Add pin/unpin object ioctls for gem.
2008-05-01 15:40:02 -07:00
ccd1bae0f6
checkpoint: relocations support.
2008-05-01 15:22:21 -07:00
5af87acbc2
checkpoint: gtt binding written.
2008-05-01 14:20:44 -07:00
2140e102f9
checkpoint: rename to GEM and a few more i915 bits.
2008-05-01 11:39:20 -07:00
3ac74f3208
nv50: enable 0x400500 bit 0 after PGRAPH exception also
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No solid idea about what these 2 bits do, but nv50 can now survive a few
PGRAPH exceptions just as nv40 does :)
2008-05-02 01:36:30 +10:00
6d8062ac1e
nouveau: guard against channels potentially not having a context, fix nv50
2008-05-02 01:36:08 +10:00
77d20928b3
nouveau: disable all card interrupts when unknown PFIFO IRQ occurs.
...
This is possibly temporary. I can trigger an unending IRQ storm on G8x
in some circumstances, and have no idea how to handle that particular PFIFO
exception correctly yet.
2008-05-02 00:53:42 +10:00
5c4c778c0d
nouveau: restore original NV_PFIFO_CACHES_REASSIGN value in fifo handler
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Doesn't fix any issue I've seen, but is a potential issue if a FIFO IRQ
occurs during channel creation/takedown.
2008-05-02 00:52:21 +10:00
bfbe4ade32
nouveau: gather nsource in trap_info()
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The IRQ handling stuff really is a mess.. On the TODO :)
2008-05-02 00:51:00 +10:00
e317dfdabf
nv50: PGRAPH exception handling completely different from earlier chips
2008-05-02 00:06:22 +10:00
b92efd5956
nv50: I cave... Add nv84 initial context values.
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I swore I'd actually do this properly and not go the horrible route
we did with nv4x, but I won't get around to it just yet with so many
*actually* interesting things to do first.. One day.
Since someone already added nv86, why not!
2008-05-01 23:50:44 +10:00
1a84067950
Hacking towards hooking up execbuffer.
2008-04-30 16:03:15 -07:00
81ba8ded7e
Remove the remainder of the mmfs device.
2008-04-29 13:48:51 -07:00
dabd056bf3
Move mmfs ioctls into the DRM. Untested.
2008-04-29 13:32:52 -07:00
cb33133ef3
i915: fix off by one in VGA save/restore of AR & CR regs
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Turns out it's important to save/restore AR14 in particular.
2008-04-29 12:39:38 -07:00
f31e04a960
nouveau: NV9x cards exist as well.
2008-04-29 19:34:22 +02:00
7f269bec7e
Merge branch 'master' into modesetting-101
...
Conflicts:
linux-core/Makefile.kernel
linux-core/drm_compat.c
linux-core/drm_fops.c
linux-core/drm_lock.c
shared-core/drm.h
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
2008-04-28 12:10:44 +02:00
7f8e406085
Use fixed sized types in new ioctls
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Make both crtc and the command argument 32 bits to avoid any 32-on-64 compat
issues.
2008-04-27 09:42:17 -07:00
b45fe49bcd
Enum-ectomy of vblank modesetting ioctl
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Enum can be of pretty much any size since C leaves the choice of size up to the implementation. So avoid using it in new interfaces like the vblank pre- & post-modeset ioctl. Thanks to hch for spotting this.
2008-04-26 17:11:18 -07:00
8c741ed54e
Add pread/pwrite ioctls to mmfs.
2008-04-23 14:25:54 -07:00
c1fec43b55
Extend the mmfs basic test to do a couple of ioctls.
2008-04-23 11:36:03 -07:00
8665b666c7
Move mmfs.h userland interface to shared-core.
2008-04-23 11:23:40 -07:00
33fa02f2d8
Make radeon_ms compile.
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Remove lock functions and use pci_map_rom() instead of pci_map_rom_copy().
2008-04-23 12:42:26 -04:00
feff72929e
i915: fix for compatibility mode
2008-04-23 17:17:16 +08:00
8dc4d4fa1f
i915: allocate devname at init time
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Since it'll be freed at unload time, we should alloc devname rather than
pointing to the DRIVER_NAME string.
2008-04-22 18:41:28 -07:00
8a390e058f
clear interrupt status before install irq
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On my 865G machine, it seems the CPU will receive interrupt before
irq_postinstall is called. This will cause kernel oops because vblank is not
inited at that time. Clear interrupt status before install seems fixing this
problem.
Signed-off-by: Hong Liu <hong.liu@intel.com>
2008-04-22 18:34:11 -07:00
ce8c842518
i915: gfx hw and i945gme fixes from upstream
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From Jesse and Zhenyu originally.
2008-04-22 16:08:17 +10:00
f0e38f5217
[I915] Handle tiled buffers in vblank tasklet
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The vblank tasklet update code must build 2D blt commands with the
appropriate tiled flags.
2008-04-20 16:10:05 -07:00
21dbba5a22
On I965, use correct 3DSTATE_DRAWING_RECTANGLE command in vblank
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The batchbuffer submission paths were fixed to use the 965-specific command,
but the vblank tasklet was not. When the older version is sent, the 965 will
lock up.
2008-04-20 01:56:02 -07:00
21a93915d8
Porting DVO stuff
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Ported from Xorg intel 2d driver. Changed interfaces definitions, which needed
to be changed later if other device wants to use these DVO stuff.
2008-04-17 11:43:28 -07:00
b986d7d2c9
Save and restore dsparb and d_state regs
2008-04-11 20:31:07 -07:00
6cc2d7e7ae
Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
2008-04-12 00:15:47 +02:00
5891b0bd2a
radeon_ms: rework command submission ioctl & cleanup
2008-04-12 00:15:12 +02:00
386ea38b8e
Add TV out hotplug detection
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Doesn't yet work on my i915 test machine, but most of the necessary bits
should be there.
2008-04-09 14:13:38 -07:00
e3c7a0fcb0
Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
2008-04-08 12:48:41 -07:00
a2edd07f20
Add devname in modeset case
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If the driver is 'modeset' enabled, it'll register it's interrupt
handler at load time. Set the devname in this case so that
/proc/interrupts makes sense.
2008-04-08 12:44:52 -07:00
779e826c1e
radeon_ms: command buffer validation use array of function pointer
2008-04-08 02:18:14 +02:00
060e725a0e
radeon_ms: fix framebuffer code
2008-04-06 19:23:20 +02:00
91bfd69745
radeon_ms: check for NULL fb
2008-04-06 19:01:31 +02:00
1692d30cea
nv50: primitive i2c interrupt handler
2008-04-05 21:02:00 +02:00
dfc8d2b2fe
radeon_ms: add crtc set base callback & fix palette
2008-04-03 03:15:47 +02:00
3fc444a5e8
nv50: primitive display interrupt handler.
2008-04-03 01:13:31 +02:00
9600423458
radeon_ms: small fix & cleanup to command checking
2008-03-31 21:50:02 +02:00
562f95ea96
nouveau: fix return from function..
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dude kernel moduless use kernel errors :)
this fixes an oops on init when this codepath hits.
2008-03-31 11:34:48 +10:00
09e637848a
radeon_ms: initial pass at command buffer validation
2008-03-31 00:55:05 +02:00
cf3c0123a0
nouveau: forgot to add a break
2008-03-30 14:50:41 +02:00
68b83a8813
nouveau: Add ctx values for nv86.
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- Note that this may not work for all nv86.
2008-03-30 14:48:55 +02:00
2d9eccfd05
radeon_ms: add hang debuging helper functions
2008-03-30 12:50:26 +02:00
753a4bdf1b
drm/r300: fix wait interface mixup
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This interface was defined completely wrong, however userspace has only
ever used 4 values from it (0x1, 0x2, 0x3 and 0x6), so fix the interface to do what userspace actually expected but define new defines for new users to use
it properly.
2008-03-30 07:33:39 +10:00
Jesse Barnes
Jakob Bornecrantz
Eric Anholt
Keith Packard
Hong Liu
Alex Deucher
Dave Airlie
Jesse Barnes
Dave Airlie
Ben Skeggs
Jesse Barnes
Maarten Maathuis
Thomas Hellstrom
Jesse Barnes
Kristian Høgsberg
Xiang, Haihao
Jerome Glisse