Jerome Glisse
09e637848a
radeon_ms: initial pass at command buffer validation
2008-03-31 00:55:05 +02:00
Maarten Maathuis
cf3c0123a0
nouveau: forgot to add a break
2008-03-30 14:50:41 +02:00
Maarten Maathuis
68b83a8813
nouveau: Add ctx values for nv86.
...
- Note that this may not work for all nv86.
2008-03-30 14:48:55 +02:00
Jerome Glisse
2d9eccfd05
radeon_ms: add hang debuging helper functions
2008-03-30 12:50:26 +02:00
Dave Airlie
753a4bdf1b
drm/r300: fix wait interface mixup
...
This interface was defined completely wrong, however userspace has only
ever used 4 values from it (0x1, 0x2, 0x3 and 0x6), so fix the interface to do what userspace actually expected but define new defines for new users to use
it properly.
2008-03-30 07:33:39 +10:00
Oliver McFadden
1674d28179
r300: Correctly translate the value for the R300_CMD_WAIT command.
...
Previously, the R300_CMD_WAIT command would write the passed directly to the
hardware. However this is incorrect because the R300_WAIT_* values used are
internal interface values that do not map directly to the hardware.
The new function I have added translates the R300_WAIT_* values into appropriate
values for the hardware before writing the register.
Thanks to John Bridgman for pointing this out. :-)
2008-03-29 17:31:39 +00:00
Jerome Glisse
0da289bafd
radeon_ms: this is a modesetting driver, bring things up to date
2008-03-27 20:08:37 +01:00
Stuart Bennett
a81d07f64d
nouveau: nv20 bios does not initialise PTIMER
...
The wait functions depend on PTIMER, so write the old (incorrect, but working) values for uninitialised hw
2008-03-25 18:32:26 +00:00
Dave Airlie
b0817a42e7
i915: fix oops on agp=off
...
Kernel bug 10289.
2008-03-24 18:52:26 +10:00
Dave Airlie
4323ee3e5b
Merge branch 'r500-fp'
2008-03-24 18:47:50 +10:00
Ben Skeggs
24ba0c9c3b
nv40: voodoo - not quite.
2008-03-24 03:26:34 +11:00
Ben Skeggs
6f4b3de284
nv40: allocate massive amount of PRAMIN for grctx on all chipsets.
...
More or less a workaround for issues on some chipsets where a context
switch results in critical data in PRAMIN being overwritten by the GPU.
The correct fix is known, but may take some time before it's a feasible
option.
2008-03-24 03:26:30 +11:00
Dave Airlie
36e11dd380
r500: fragment program upload is also used to upload constants.
...
Limit frag address to 8 bits
2008-03-21 16:59:52 +10:00
Jerome Glisse
71b66b0043
Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
2008-03-20 17:44:32 +01:00
Jerome Glisse
6ef119abf5
radeon_ms: fix fence
2008-03-20 17:43:43 +01:00
Dave Airlie
316979356f
drm: fixup r500fp submission
2008-03-20 14:20:53 +10:00
Stuart Bennett
1021799b6c
nouveau: do not set on-board timer's numerator/denominator to bad values
2008-03-20 02:57:58 +00:00
Alex Deucher
9e4f908287
RADEON: switch over to new production microcode
...
This needs to be tested thoroughly before pushing to the
kernel.
2008-03-19 15:37:56 -04:00
Alex Deucher
d8af16d2a7
RADEON: production microcode for all radeons, r1xx-r6xx
...
This updated microcode is not in use yet.
2008-03-19 14:57:42 -04:00
Dave Airlie
a3c808d8fe
move some more r300 regs into not allowed on r500
2008-03-19 16:10:37 +10:00
Dave Airlie
d18c2c6842
drm: add new rs690 pci id
2008-03-18 09:07:45 +10:00
Dave Airlie
607964ed9e
drm: add master set/drop protocol
...
this may not survive long - just need something for testing
2008-03-17 16:38:20 +10:00
Dave Airlie
2d0411cb75
i915: safety check the sarea map still exists
2008-03-17 16:38:18 +10:00
Dave Airlie
3add949403
initial r500 RS and FP register and upload code
2008-03-17 11:08:03 +10:00
Dave Airlie
1f96e9a982
drm/pcigart: fix the pci gart to use the drm_pci wrapper.
...
This is the correct fix for the RS690 and hopefully the dma coherent work.
For now we limit everybody to a 32-bit DMA mask but it is possible for
RS690 to use a 40-bit DMA mask for the GART table itself,
and the PCIE cards can use 40-bits for the table entries.
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-03-17 07:05:46 +10:00
Thomas Hellstrom
1a2d8c4bfa
Avoid unnecessary waits for command regulator pause.
2008-03-16 20:07:14 +01:00
Thomas Hellstrom
3a3a9485aa
[via] Remove some leftover vars.
2008-03-16 11:45:58 +01:00
Thomas Hellstrom
7d3d15e67d
[via] The millionth fixup for the millionth-1 attempt to stabilize the AGP
...
DMA command submission. It's worth remembering that all new bright ideas on how
to make this command reader work properly and according to docs
will probably fail :( Bring in some old code.
2008-03-16 11:45:57 +01:00
Thomas Hellstrom
563fe9dcd4
[via] Fix driver after vblank-rework merge.
2008-03-16 11:45:57 +01:00
Dave Airlie
5b1d9263d3
drm/rs690: set AGP_BASE_2 to 0
2008-03-16 14:00:16 +10:00
Dave Airlie
dd9eb923ed
drm: set rs690 gart base completly.
...
The docs state bits 4-11 represent bits 32-39 of a 40-bit address
2008-03-16 12:58:07 +10:00
Alex Deucher
9be916f353
Fix chip family for RV550
2008-03-12 11:16:12 -04:00
Ben Skeggs
1766e1c07b
nv50: force channel vram access through vm
...
If we ever want to be able to use the 3D engine we have no choice. It
appears that the tiling setup (required for 3D on G8x) is in the page tables.
The immediate benefit of this change however is that it's now not possible
for a client to use the GPU to render over the top of important engine setup
tables, which also live in VRAM.
G8x VRAM size is limited to 512MiB at the moment, as we use a 1-1 mapping
of real vram pages to their offset within the start of a channel's VRAM
DMA object and only populate a single PDE for VRAM use.
2008-03-13 00:23:52 +11:00
Thomas Hellstrom
88bd1e4a35
Merge branch 'intel-post-reloc'
...
Conflicts:
linux-core/drm_compat.c
linux-core/drm_compat.h
linux-core/drm_ttm.c
shared-core/i915_dma.c
Bump driver minor to 13 due to introduction of new
relocation type.
2008-03-12 11:34:29 +01:00
Alan Hourihane
b6dc381fab
Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
...
Conflicts:
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
2008-03-12 10:18:33 +00:00
Thomas Hellstrom
8a18d123f5
Avoid large kmallocs.
2008-03-12 09:49:27 +01:00
Alan Hourihane
cf1a2499ed
global hotplug events happen in the pipe A stat register,
...
they are not pipe A specific. Remove pipe B code.
2008-03-11 21:24:29 +00:00
Alan Hourihane
903d9231d6
Add support for monitor hotplug signals/waits
...
Also adjust i915 irq handling as it follows the 16bit'ism's
of the i8xx series.
2008-03-11 20:30:25 +00:00
Stuart Bennett
f13936f7fc
nouveau: move AGP reset to mem_init_agp
...
Also, power cycle PGRAPH when resetting AGP -- it seems to fix problems encountered by p0g on nv25
2008-03-11 16:45:35 +00:00
Dave Airlie
5a7f4b3074
drm: fix oops on unload.
...
if we are unloading the module, there is no master so therefore no lock
2008-03-11 16:05:26 +10:00
Dave Airlie
52748d1792
drm: hopefully fix cursors on 965
2008-03-11 13:23:33 +10:00
Jerome Glisse
a7e6ca62ad
Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
2008-03-10 23:36:27 +01:00
Jerome Glisse
a7dc4d08b9
rradeon_ms: rework fence code and bring radeon ms up to date
2008-03-10 23:35:07 +01:00
Keith Packard
2848f04861
Switch from PIPE_VBLANK to PIPE_EVENT interrupts.
...
My 965GM gets interrupts stuck when using the old PIPE_VBLANK interrupt.
Switch to the PIPE_EVENT interrupt mechanism, and set the PIPE*STAT
registers to use START_VBLANK on 965 and VBLANK on previous chips.
2008-03-08 00:04:30 -08:00
Dave Airlie
ce3733572e
drm/radeon: check sarea_priv exists
2008-03-08 08:30:30 +10:00
Ben Skeggs
1ccccbd4ce
nouveau: redo channel idle detection
...
Will hopefully work a bit better than previous code, which depended on
knowing the channel's most recent PUT value. Some chips always return
0 on reading these regs, and currently userspace is the only other entity
which knows the value.
2008-03-07 15:18:34 +11:00
Ben Skeggs
cd924de029
nouveau: don't touch NV_USER regs on channel destroy.
...
Not only was this entirely pointless, it actually causes my NV30GL to
die randomly when channels are destroyed.
2008-03-07 15:18:34 +11:00
Dave Airlie
cf28ca4212
actually turn the irq off
2008-03-07 13:03:32 +11:00
Dave Airlie
ccae12a837
I really screwed up that merge somehow
2008-03-07 08:58:24 +10:00
Dave Airlie
48a166af14
woah somehow got these upstream
2008-03-07 08:49:27 +10:00
Dave Airlie
44a2209790
Merge branch 'master' of ../../drm into modesetting-101
...
Conflicts:
shared-core/drm.h
2008-03-06 05:39:07 +10:00
Dave Airlie
d5c0101252
ttm: make sure userspace can't destroy kernel create memory managers
...
this adds something to say the kernel initialised the memory region not
the userspace. and blocks userspace from deallocating kernel areas
2008-03-06 05:37:54 +10:00
Dave Airlie
180c9188f4
drm/ttm: add ioctl to get back memory managed area sized
...
taken from modesetting branch but could be useful outside it.
2008-03-06 05:31:50 +10:00
Dave Airlie
e00dea812d
Merge branch 'master' of ../../drm into modesetting-101
...
Conflicts:
linux-core/drmP.h
linux-core/drm_drv.c
linux-core/drm_proc.c
linux-core/drm_stub.c
linux-core/drm_sysfs.c
2008-03-06 05:26:23 +10:00
Dave Airlie
12574590cd
drm: reorganise minor number handling using code from modesetting branch
...
Rip out the whole head thing and replace it with an idr and drm_minor
structure.
2008-03-06 05:21:50 +10:00
Xiang, Haihao
638353103d
i915: Evict if relocatee buffer is CACHED_MAPPED before
...
writting relocations, otherwise the GPU probably sees some
inconsistent data. Fix fd.o bug#14656
2008-03-05 15:09:17 +08:00
Dave Airlie
4dbf447f43
drm: fixup compat with old x.org drivers
2008-03-05 15:28:38 +10:00
Dave Airlie
43891ff2d0
Merge remote branch 'origin/master' into modesetting-101
...
Conflicts:
linux-core/drm_compat.c
2008-03-05 10:37:02 +10:00
Eric Anholt
a6a2f2c8c4
Clarify when WAIT_LAZY is relevant to users.
2008-03-04 13:45:41 -08:00
Eric Anholt
3332a0add6
Remove unused DRM_FENCE_FLAG_WAIT_IGNORE_SIGNALS.
2008-03-04 13:41:30 -08:00
Zou Nan hai
63fd6f284d
[i915] 2D driver may reset Frame count value, this may lead driver
...
to leap it's vblank count a huge value.
This will stall some applications that switch video mode if vblank_mode is set to a non zero value in drirc.
2008-03-03 14:49:49 +08:00
Alan Hourihane
9c5ba9f5d1
Add FENCE registers to MMIO list
2008-03-02 21:48:40 +00:00
Thomas Hellstrom
612c22f131
Working revision.
2008-02-29 15:38:55 +01:00
Thomas Hellstrom
2305100c0f
More post-ioctl work.
2008-02-29 13:25:55 +01:00
Dave Airlie
01dcc47d89
drm: add modesetting as a driver feature.
...
This change adds a driver feature that for i915 is controlled by a module
parameter. You now need to do insmod i915.ko modeset=1 to enable it the
modesetting paths.
It also fixes up lots of X paths. I can run my new DDX driver on this code
with and without modesetting enabled
2008-02-28 16:24:17 +10:00
Thomas Hellstrom
fd595fa4dc
Reinstate buffer idle before applying relocations.
2008-02-27 21:44:40 +01:00
Thomas Hellstrom
72983ff301
Don't wait for buffer idle before applying relocations.
2008-02-27 19:46:28 +01:00
Jerome Glisse
75c9e0d346
radeon: remove TTM from an earlier merge
2008-02-26 23:30:45 +01:00
Alan Hourihane
1e66322633
Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
...
Conflicts:
shared-core/i915_dma.c
2008-02-26 15:42:41 +00:00
Thomas Hellstrom
e87cec1968
[i915] Relocation fixes.
2008-02-26 10:47:05 +01:00
Dave Airlie
b92e343dc4
i915: fix typos
2008-02-26 16:20:27 +10:00
Dave Airlie
35d1b13b4a
i915_mmio: add overlay regs
2008-02-26 16:13:06 +10:00
Thomas Hellstrom
56bb29cf37
Make the execbuffer code reasonably safe against errors.
...
In particular -EAGAINs, which should be common during Xserver operation.
Also handle the fence creation failure case.
2008-02-26 00:05:26 +01:00
Roland Scheidegger
d6098db140
fix texture uploads with large 3d textures (bug 13980)
...
Texture uploads could hit the blitter coordinate limit, adjust the texture
offset when uploading the pieces. Make sure to check the end address of the
upload too.
2008-02-23 11:01:36 +01:00
Maarten Maathuis
0d32015974
nouveau: Remove some random (french) comment.
2008-02-22 19:28:54 +01:00
Maarten Maathuis
7e5f9c8bd3
nouveau: A single define of dma skips is more than enough.
2008-02-22 19:28:54 +01:00
Kristian Høgsberg
b7086e6ae5
Fix one last occurance of struct _drm_i915_batchbuffer.
...
Thanks to Todd Merrill for pointing it out.
2008-02-22 11:22:52 -05:00
Kristian Høgsberg
b0fee67a30
i915: Remove leading underscore from struct tags.
...
This matches the changes in mesa to use the system drm includes
for the definitions of the drm ioctl structs.
2008-02-22 00:12:39 -05:00
Dave Airlie
cdad850ebc
add ioctl to get back memory managed area sized - used for kernel inited areas
2008-02-22 13:49:51 +10:00
Alan Hourihane
9d1061b8cf
fix SAREA
2008-02-20 22:23:31 +00:00
Alan Hourihane
3f6c8f64aa
fix SAREA
2008-02-20 22:22:49 +00:00
Dave Airlie
8844245cfc
drm/fb: get rid of offset from structure use bo offset
2008-02-20 11:27:22 +10:00
Dave Airlie
2c409f9a07
ttm: make sure userspace can't destroy kernel create memory managers
2008-02-20 11:27:22 +10:00
Alan Hourihane
8caf6e9571
Fix up conflicts for DRI2 (untested)
2008-02-19 15:17:24 +00:00
Alan Hourihane
f24ed2ad6c
Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
...
Conflicts:
linux-core/i915_fence.c
linux-core/via_fence.c
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
2008-02-18 22:35:46 +00:00
Keith Packard
5d8c754bc2
[915]: more registers for S3 (DSPCLK_GATE_D, CACHE_MODE_0, MI_ARB_STATE)
...
Failing to preserve the MI_ARB_STATE register was causing FIFO underruns on
the VGA output on my HP 2510p after resume.
2008-02-16 20:14:49 -08:00
Stephane Marchesin
cd87e6352b
nouveau: no GART on ia64 either.
2008-02-16 03:50:29 +01:00
Jesse Barnes
2b1c9cd696
i915: initial (and untested) TV out support
...
Ported from xf86-video-intel. Still need to tie in TV modes somehow, though
preferably w/o using the properties mechanism.
2008-02-15 16:13:21 -08:00
Ben Skeggs
15cbde683f
nv40: actually init all tile regs.
2008-02-16 04:47:02 +11:00
Dave Airlie
8bf8cd63bb
missing bits
2008-02-14 07:37:34 +10:00
Kristian Høgsberg
373dbcf8b2
i915: Add a dri2 init path that gets the lock from the dri2 sarea.
2008-02-13 13:34:02 -05:00
Kristian Høgsberg
db3f03ae35
i915: Only look up dev_priv->mmio_map if it's not already set up
2008-02-13 13:34:02 -05:00
Kristian Høgsberg
ee15459483
i915: Add I915_PARAM_CHIPSET_ID param to get chipset ID.
2008-02-13 13:34:02 -05:00
Kristian Høgsberg
4feb0638f1
i915: Make sarea_priv setup optional.
2008-02-13 13:34:02 -05:00
Jerome Glisse
04257f1a5a
radeon_ms: bring radeon_ms up to date with lastest changes
2008-02-09 18:23:35 +01:00
Jesse Barnes
6f19473191
Fix saveGR array size
...
Make sure we have enough room for all the GR registers or we'll end up
clobbering the AR index register (which should actually be harmless
unless the BIOS is making an assumption about it).
2008-02-07 11:21:09 -08:00
Jesse Barnes
8b6c96dedd
i915: save/restore interrupt state
...
On resume, if the interrupt state isn't restored correctly, we may end
up with a flood of unexpected or ill-timed interrupts, which could cause
the kernel to disable the interrupt or vblank events to happen at the
wrong time. So save/restore them properly.
2008-02-07 10:48:08 -08:00
Jakob Bornecrantz
0618ac8a07
Added kernel part of hotplug ioctl
2008-02-07 19:24:58 +01:00
Jakob Bornecrantz
34b76e0fac
Added hotplug ioctl
2008-02-07 19:23:27 +01:00
Alan Hourihane
53937a189f
build fix for older kernels
2008-02-05 10:12:21 +00:00
Thomas Hellstrom
76748efae2
i915: Re-report breadcrumbs on poll to the fence manager,
...
since a breadcrumb may actually turn up before a corresponding fence object
has been placed on the fence ring.
2008-02-05 10:36:49 +01:00
Stuart Bennett
a0781e7622
nouveau: make nv34 work every time, not just every 2nd time
...
And make nv30_graph_init a bit more like mmio-traces
2008-02-04 16:38:31 +00:00
Maarten Maathuis
733e07663e
nouveau: NV40 can/should now be able to run after the blob.
...
- Moved the fix from the ddx to drm, because it seemed more appropriate.
- Don't be shy, report if it works for you or not.
2008-02-02 12:46:47 +01:00
Thomas Hellstrom
47ee6237fe
i915: Avoid calling drm_fence_flush_old excessively.
2008-01-30 22:14:02 +01:00
Thomas Hellstrom
f1edb7ad91
Simplify the fencing code and differentiate between flushes and
...
waiting types.
Add a "command_stream_barrier" method to the bo driver.
2008-01-30 22:06:02 +01:00
Ben Skeggs
9a7e45858d
nv40: some more nv67 changes
...
With some luck the drm-side will be OK now for this chipset.
2008-01-30 11:50:17 +11:00
Mirko
0744cb153a
Add new RV380 pci id
...
bug 14289
2008-01-29 10:11:27 -05:00
Jakob Bornecrantz
a2254c5a96
Added cursor support
2008-01-28 03:14:56 +01:00
Maciej Cencora
b8755ff7c3
drm: add initial rs690 support for drm.
...
This adds support for configuring the RS690 GART.
2008-01-27 12:50:31 +10:00
George Sapountzis
6bfb9b639a
mach64: fix after vblank-rework
...
don't disable vblank interrupts (similar to r128)
2008-01-25 16:54:29 +02:00
Dave Airlie
fa7b779c91
don't reinit ring if already initialised
2008-01-25 16:32:09 +10:00
Dave Airlie
e7a41d7f5b
Merge remote branch 'origin/master' into modesetting-101
...
Conflicts:
linux-core/drm_bo.c
linux-core/drm_drv.c
shared-core/drm.h
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
shared-core/radeon_irq.c
2008-01-25 15:27:53 +10:00
Jesse Barnes
bfdddd218e
Fixup modeset ioctl number & typedef usage
...
Should be 0x08 rather than 0xa0, and shouldn't use typedefs.
2008-01-24 21:13:33 -08:00
Eric Anholt
e3c42f0004
Merge commit 'airlied/i915-ttm-cfu'
...
This requires updated Mesa to handle the new relocation format.
2008-01-24 12:44:19 -08:00
Jesse Barnes
c7ee6cc269
Remove broken 'in vblank' accounting
...
We need to return an accurate vblank count to the callers of
->get_vblank_counter, and in the Intel case the actual frame count
register isn't udpated until the next active line is displayed, so we
need to return one more than the frame count register if we're currently
in a vblank period.
However, none of the various ways of doing this is working yet, so
disable the logic for now. This may result in a few missed events, but
should fix the hangs some people have seen due to the current code
tripping the wraparound logic in drm_update_vblank_count.
2008-01-24 08:57:04 -08:00
Dave Airlie
5b99306452
i915: fix missing header when copying data from userspace
2008-01-24 15:18:09 +10:00
Dave Airlie
34b71eb451
i915 make relocs use copy from user
...
Switch relocs to using copy from user and remove index and pass buffer
handles in instead.
2008-01-24 14:37:40 +10:00
Jesse Barnes
b5a34f5da5
Fix thinko in get_vblank_counter
...
Should use vtotal not htotal to figure out if we're in a vblank period.
2008-01-23 08:39:57 -08:00
Jesse Barnes
cb91784371
Fix IS_I915G macro
...
One to many parantheses...
2008-01-23 08:38:01 -08:00
Maarten Maathuis
7c726086dd
nouveau: Fix warning in nouveau_mem.c
2008-01-23 16:40:19 +01:00
Dave Airlie
2f19fe4498
drm/i915: add support for E7221
2008-01-23 16:44:51 +10:00
Jesse Barnes
531f25cfe9
Correct vblank count value
...
The frame count registers don't increment until the start of the next
frame, so make sure we return an incremented count if called during the
actual vblank period.
2008-01-22 15:16:01 -08:00
Jesse Barnes
893e311999
i915 irq fixes
...
Ack the IRQs correctly (PIPExSTAT first followed by IIR). Don't read
vblank counter registers on disabled pipes (might hang otherwise). And
deal with flipped pipe/plane mappings if present.
2008-01-22 13:11:29 -08:00
Jesse Barnes
0cd4cbc9a6
Merge branch 'master' into vblank-rework, including mach64 support
...
Conflicts:
linux-core/drmP.h
linux-core/drm_drv.c
shared-core/i915_drv.h
shared-core/i915_irq.c
shared-core/mga_irq.c
shared-core/radeon_irq.c
shared-core/via_irq.c
Mostly trivial conflicts.
mach64 support from Mathieu Bérard.
2008-01-22 09:42:37 -08:00
Dave Airlie
5231a524f5
Revert "Fix pipe<->plane mapping vs. vblank handling (again)"
...
This reverts commit bfc29606e4
.
This regresses i915 here for me I can't get greater than 0.333 fps with gears
2008-01-22 14:42:48 +11:00
Stephane Marchesin
616cef5ec8
nouveau: don't forget NV80.
2008-01-21 21:11:47 +01:00
Stephane Marchesin
641c9a2ecc
nouveau: new card family for old card designs.
2008-01-21 21:01:28 +01:00
Eric Anholt
44a9fa8cc6
Add additional explanation of DRM_BO_FLAG_CACHED_MAPPED before I forget again.
2008-01-17 16:55:43 -08:00
Zhenyu Wang
ac6b3780c8
i915: Add chipset id for Intel Integrated Graphics Device
...
This adds new chipset id in drm.
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-01-15 13:06:09 -05:00
Jerome Glisse
6ba979ea46
radeon_ms: use radeon connector type insted of drm
2008-01-15 16:01:39 +01:00
Jerome Glisse
20a8e2d30e
radeon_ms: cope with lastest drm modesetting change
2008-01-15 14:30:40 +01:00
Jerome Glisse
f1f934c8c9
radeon_ms: add rom parsing & adapt code
...
Add rom (only combios for now) parsing and use informations
retrieve instead of hardcoded table. Shuffle code around a
bit.
2008-01-15 14:17:05 +01:00
Thomas Hellstrom
88c511e49d
Properly propagate the user-space fence flags.
...
This avoids a sync flush when user-space has already programmed
and MI_FLUSH in the batchbuffer.
2008-01-15 10:03:41 +01:00
Stephane Marchesin
269d518008
nouveau: make mem alloc debug a little more verbose.
2008-01-14 03:16:42 +01:00
Ben Skeggs
f0b7c45653
nv05: enable ctx/op methods, and ignore patch valid failures.
...
Yes, I'm quite aware "real" nv04 doesn't support this, hopefully the GPU
will just ignore those PGRAPH_DEBUG_3 bits on that hw.
2008-01-11 12:51:08 +11:00
Stuart Bennett
5f15f317fb
nouveau: AGP reset correction - don't touch FW bit
2008-01-08 20:30:21 +00:00
Ben Skeggs
0bfd09f719
nv50: more small changes
2008-01-07 18:56:44 +11:00
Ben Skeggs
942b500e24
nv50: oops, lost some state saving along the way somewhere.
...
xf86-video-nv will now work again after nouveau.
2008-01-07 18:19:16 +11:00
Ben Skeggs
3d248cd7e4
nv50: hook up timer funcs...
2008-01-07 17:23:31 +11:00
Ben Skeggs
7a4ba7273c
nv50: abort on chips without ctx ucode
2008-01-07 17:13:22 +11:00
Ben Skeggs
15f8fd34df
nv50: some needed ctx vals
2008-01-07 17:09:00 +11:00
Ben Skeggs
3d3d509dca
nv50: some cleanups + small changes
2008-01-07 17:08:59 +11:00
Stephane Marchesin
cd19dcef4f
Nouveau: ppc oops.
2008-01-07 06:11:33 +01:00
Stephane Marchesin
de522ae742
Nouveau: move PPC bios copy to firstopen.
2008-01-07 05:54:37 +01:00
Jeremy Kolb
bd5d760a10
nouveau: Add ctx_voodoo for NV86
2008-01-06 10:09:47 -05:00
Xavier Bachelot
30fba69a68
via: add P4M900 pci id.
...
bug 12108
2008-01-04 16:29:04 +10:00
Dave Airlie
10937cf20b
drm: move drm_head to drm_minor and fix up users
2008-01-04 16:12:24 +11:00
Stuart Bennett
71adbfc874
[PATCH] nouveau: reset AGP on init for < nv40
...
This is necessary for AGP to work after running bios init scripts on nv3x, and
is seen in mmio traces of all cards (nv04-nv4x)
I'm not making the equivalent change to nv40_mc.c, as early cards (6200, 6800gt)
use the 0x000018XX PBUS and later cards use the 0x000880XX PBUS and I don't know
the effects of using the wrong one
2008-01-04 05:08:15 +01:00
Stuart Bennett
381724a35b
[PATCH] nouveau: Fix nv20/30 context loading
...
Don't set the context as valid until it has been loaded
2008-01-04 05:07:35 +01:00
Dave Airlie
78d6649069
mach64: some more minor cleanups
2008-01-03 17:44:04 +10:00
Dave Airlie
97b8c9591c
mach64: cleanup some of the macro formatting
2008-01-03 17:10:30 +10:00
Márton Németh
9ab620d661
drm: cleanup DRM_DEBUG() parameters
...
As DRM_DEBUG macro already prints out the __FUNCTION__ string (see
drivers/char/drm/drmP.h), it is not worth doing this again. At some
other places the ending "\n" was added.
airlied:- I cleaned up a few that this patch missed also
2008-01-03 16:56:04 +10:00
Dave Airlie
5e99b42b04
Merge branch 'r500-support'
2008-01-03 16:05:13 +10:00
Dave Airlie
96a00054be
remove duplicate pciids
2008-01-03 16:03:05 +10:00
Keith Packard
d1187641d6
Rename inappropriately named 'mask' fields to 'proposed_flags' instead.
...
Flags pending validation were stored in a misleadingly named field, 'mask'.
As 'mask' is already used to indicate pieces of a flags field which are
changing, it seems better to use a name reflecting the actual purpose of
this field. I chose 'proposed_flags' as they may not actually end up in
'flags', and in an case will be modified when they are moved over.
This affects the API, but not ABI of the user-mode interface.
2007-12-21 12:16:29 -08:00
Jerome Glisse
21b01cd4b5
radeon_ms: update to follow lastest modesetting change
2007-12-20 12:35:54 +01:00
Jerome Glisse
d8c94a84b7
radeon_ms: add sarea & install header
2007-12-19 18:27:38 +01:00
Dave Airlie
629231c626
Merge branch 'modesetting-airlied' into modesetting-101
2007-12-18 19:18:21 +11:00
Dave Airlie
b13dc383df
remove output names
2007-12-18 17:41:20 +11:00
Jakob Bornecrantz
ea915c77e1
Fixed build
2007-12-18 02:52:09 +01:00
Jakob Bornecrantz
bdbc34e297
Fix and cleanup of Hotplug
2007-12-18 02:21:08 +01:00
Jakob Bornecrantz
e239882b1e
Modesetting Hotplug
2007-12-18 02:21:08 +01:00
Li Zefan
2db6400396
drm: don't cast a pointer to pointer of list_head
...
The casting is safe only when the list_head member is the first member of
the structure.
2007-12-17 09:50:45 +10:00
Jesper Juhl
6180dbda20
While reading some code I stumbled across the use of 'err' in
...
drivers/char/drm/mga_dma.c::mga_do_cleanup_dma() and I think there's a small
problem.
The variable is only used inside #if __OS_HAS_AGP which is fine, but all
that
ever happens is an assignment to the variable - it is never actually used
for
anything. The variable is nicely initialized to zero which is also what the
return statement at the end of function returns (always at the moment).
It looks to me like that function should be returning 'err' instead of
always
just returning 0. Here's a patch to do that.
Signed-off-by: Jesper Juhl <jesper.juhl@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-12-17 09:45:03 +10:00
Keith Packard
5f23519b14
Document drm_bo_handle_validate. Match drm_bo_do_validate parameter order.
...
Document parameters and usage for drm_bo_handle_validate. Change parameter
order to match drm_bo_do_validate (fence_class has been moved to after
flags, hint and mask values). Existing users of this function have been
changed, but out-of-tree users must be modified separately.
2007-12-15 12:10:42 -08:00
Keith Packard
b5181d2506
Document drm_bo_do_validate. Remove spurious 'do_wait' parameter.
...
Add comments about the parameters to drm_bo_do_validate, along
with comments for the DRM_BO_HINT options. Remove the 'do_wait'
parameter as it is duplicated by DRM_BO_HINT_DONT_BLOCK.
2007-12-15 12:10:42 -08:00
Patrice Mandin
449a3b19ff
Revert "nouveau: nv30: missing ramin init, does it brake other hw?"
...
This reverts commit 46235ea459
.
2007-12-15 10:25:13 +01:00
Alan Hourihane
f62a300547
Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
2007-12-13 10:41:23 +00:00
Keith Packard
7dcaf0cdbb
Make relocation validate client computed values when debugging
2007-12-11 20:23:00 -08:00
Keith Packard
4ec8f58d04
i915: wait for buffer idle before writing relocations
...
When writing a relocation entry, make sure the target buffer is idle,
otherwise the GPU may see inconsistent data.
2007-12-11 20:23:00 -08:00
Keith Packard
9ee511d786
Bump driver minor for relocation optimzations
2007-12-11 20:23:00 -08:00
Keith Packard
57b9a54eb6
Allow relocation to be skipped when buffers don't move.
...
One of the costs of superioctl has been the need to perform relocations
inside the kernel. The cost of mapping the buffers to the CPU and writing
data is fairly high, especially if those buffers have been mapped and read
by the GPU.
If we assume that buffers don't move around very often, we can have the
client compute the relocations itself using the previous GPU address. When
that object doesn't move, the kernel can skip computing and writing the
updated data.
Here's a patch which adds a new field to struct drm_bo_info_req called
'presumed_offset', and a new DRM_BO_HINT_PRESUMED_OFFSET that is set when
this field has been filled in by the client.
There are two separate optimizations performed when the presumed_offset is
correct:
1. i915_exec_reloc checks to see if all previous buffer offsets were guessed
correctly. If so, there's no need for it to look at *any* of the
relocations for a buffer. When this happens, it skips the whole
relocation process, simply returning success.
2. i915_apply_reloc checks to see if the target buffer offset was guessed
correctly. If so, it skips mapping the relocatee, computing the
relocation and writing the value. If no relocations are needed, the
relocatee should never be mapped to the CPU, and so the kernel shouldn't
need to wait for any fences to pass.
2007-12-11 20:23:00 -08:00
Dave Airlie
8d2da20233
Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
...
Conflicts:
linux-core/drm_drv.c
shared-core/drm.h
shared-core/i915_dma.c
2007-12-11 16:58:00 +10:00
Dave Airlie
f99dea7db0
modesetting: fixup property setting and add connector property
2007-12-11 15:56:48 +10:00
Dave Airlie
3b6786e3e6
modesetting: add dpms property and initial settable property ioctl
2007-12-11 14:46:51 +10:00
Dave Airlie
814f695135
Merge branch 'master' into r500-support
2007-12-10 15:53:59 +10:00
José Fonseca
7d08b816b7
mach64: comment bus master / ring buffer behavior and security
2007-12-08 19:23:18 +00:00
Jerome Glisse
9d064966d8
radeon_ms: fix pll computation to follow hw constraint
2007-12-08 00:45:33 +01:00
Jesse Barnes
bfc29606e4
Fix pipe<->plane mapping vs. vblank handling (again)
...
If drmMinor >= 6, the intel DDX driver will enable vblank events on both
pipes. If drmMinor >= 10 on pre-965 chipsets, the intel DDX driver will
swap the pipe<->plane mapping to allow for framebuffer compression on
laptop screens. This means the secondary vblank counter (corresponding
to pipe B) will be incremented when vblank interrupts occur.
Now Mesa waits for vblank events on whichever plane has a greater
portion of the displayed window. So it will happly ask to wait for the
primary counter even though that one won't increment.
So we can fix this in either the DDX driver, Mesa or the kernel (though
I thought we already had several times).
Since current (and previous) userspace assumes it's talking about a pipe
== plane situation and now uses planes when talking to the kernel, we
should probably just hide the mapping details there (indeed they already
are hidden there for vblank swaps), which this patch does.
So as far as userland is concerned, whether we call things planes or
pipes is irrelevant, as long as kernel developers understand that
userland hands them planes and they have to figure out which pipe that
corresponds to (which will typically be the same on 965+ hardware and
reversed on pre-965 mobile chips).
2007-12-07 14:24:45 -08:00
Jerome Glisse
a39560e767
radeon_ms: update to lastest fb change
2007-12-06 23:19:52 +01:00
Jerome Glisse
931b4a84a0
Merge commit 'origin/modesetting-101' into modesetting-radeon
2007-12-06 22:42:17 +01:00
Jerome Glisse
3a51a8077b
radeon_ms: avoid to unintialize things which haven't been initialized
2007-12-06 22:38:44 +01:00
Dave Airlie
67f6eb1eb8
add property blobs and edid reporting support
2007-12-06 10:44:51 +10:00
José Fonseca
a64a4373e8
mach64: make buffer emission macros normal functions
2007-12-05 22:54:10 +00:00
José Fonseca
46ecd12c07
mach64: use utf-8
2007-12-05 22:54:10 +00:00
Kristian Høgsberg
e38749ebe5
Remove references to the sarea_priv perf_boxes field.
...
This field isn't touched or read by any other code in the stack so it's
time to retire these last few references.
2007-12-05 14:43:22 -05:00
Dave Airlie
c9cda51af5
more WIP on blobs..
...
I'm going to pass back a list of blob ids and lengths in the getproperty.
will need another ioctl to return the blob data as it is variable length.
2007-12-05 16:31:35 +10:00
Dave Airlie
1a6c95ef71
arrgggh.. make all ioctl structs 32/64-bit compatible hopefully.
...
This also starts to add blob property support.
someone needs to check this work for other things like ppc/x86 alignment diffs
2007-12-05 16:03:05 +10:00
Jerome Glisse
34797ff67c
radeon_ms: radeon modesetting first commit.
...
This should work on all radeon but there is still many things todo:
- add crtc2
- tmds
- lvds
- add bios data table so we don't need to hardcode dac/crtc infos
- separate clock control to make power saving easier & cleaner
- tiling (warning tiling shouldn't be enable in double scan or interlace)
- surface reg manager (this goes along with tiling)
- suspend/resume hook
- avivo & r500 family support
- atom bios support (for posting card mostly)
- finish superioctl skeleton
- what else ? :)
2007-12-04 23:03:12 +01:00
Dave Airlie
96df9b11ad
finish of mode add/remove, just have attach/detach modes
2007-12-03 15:30:05 +10:00
Dave Airlie
91cd3e3c09
modesetting API change for removing mode ids and making modes per output.
...
so really want to get a list of modes per output not the global hammer list.
also we remove the mode ids and let the user pass back the full mode description
need to fix up add/remove mode for user modes now
2007-12-03 15:30:05 +10:00
Robert Noland
690dd04d1b
bsd: Replace other occurrences of msleep with mtx_sleep
2007-12-02 01:45:09 -05:00
Robert Noland
b2f8368b57
Clarify order of operations
2007-12-01 14:44:30 -05:00
Robert Noland
453a295c82
DRM_DEBUG already prints the function name.
2007-12-01 14:44:29 -05:00
Robert Noland
d6295cc9ff
drm: Add _DRM_DRIVER map flag.
...
This flag indicates that the driver is responsible for the map.
2007-12-01 02:40:13 -05:00
Maarten Maathuis
887b920a7f
nouveau: Properly identify NV40 and NV44 generation.
2007-11-30 22:50:34 +01:00
Jiri Slaby
309b2c4c05
Beside the emitted warning, the added cast (u64 -> unsigned) strips out
...
part of address on 64 bit. Cast to unsigned long instead.
Signed-off-by: Jiri Slaby <jirislaby@gmail.com>
2007-11-29 09:55:38 +10:00
Dave Airlie
dc338921f9
drm: more cleanups
2007-11-29 09:38:21 +10:00
Dave Airlie
e9fa8fe734
i965: oops force mi batchbuffer start
2007-11-28 22:46:06 +10:00
Dave Airlie
b3af2b59a7
drm/modesetting: add initial gettable properites code.
...
This allow the user to retrieve a list of properties for an output.
Properties can either be 32-bit values or an enum with an associated name.
Range properties are to be supported.
This API is probably not all correct, I may make properties part of the general
resource get when I think about it some more.
So basically you can create properties and attached them to whatever outputs you want,
so it should be possible to create some generics and just attach them to every output.
2007-11-27 14:31:02 +10:00
Dave Airlie
e51b3c8ff4
r500: add a bunch of all r5xx pci ids..
...
fix up a range that may be needed for r500 mesa
2007-11-27 08:43:14 +10:00
Dave Airlie
a20587e395
Merge branch 'origin' into modesetting-101
...
Conflicts:
linux-core/drmP.h
shared-core/i915_dma.c
shared-core/i915_drm.h
shared-core/radeon_drv.h
2007-11-22 17:17:06 +11:00
Dave Airlie
5dc5c36e62
drm: major whitespace/coding style realignment with kernel
2007-11-22 16:10:36 +10:00
Dave Airlie
6ff4a70a2b
i915: add context handle to superioctl struct
...
This will be used later for lockless operation.
2007-11-22 09:18:28 +10:00
Dave Airlie
66079b91f3
r500: add pci id for X1650
2007-11-22 08:15:12 +10:00
Dave Airlie
5ec64d4a30
r500: suggestion from glisse to not add cliprect offset on r5xx
2007-11-21 13:02:19 +10:00
Dave Airlie
dc0ec76d60
radeon: add initial r5xx support
2007-11-20 08:44:33 +10:00
Eric Anholt
3fc3fc082a
Fix capitalization of __linux__ define.
2007-11-19 08:41:23 -08:00
Robert Noland
a74181ddb2
Bug #13233 : Fix build on FreeBSD.
2007-11-18 22:42:40 -08:00
Dave Airlie
a90510966e
radeon: refactor out the fb/agp location read/write.
...
Add a new get param to get the fb location into userspace. Mesa currently
hits MMIO to do this, but this isn't always possible.
2007-11-18 19:25:31 +10:00
Stephane Marchesin
307fc3c92c
nouveau: also mention the number of succcessfully copied bios bytes.
2007-11-16 15:02:47 +01:00
Stephane Marchesin
baf5d20297
nouveau: be verbose about PPC bios for now.
2007-11-15 20:42:38 +01:00
Stephane Marchesin
9b2a95bc6c
nouveau: revert the nv34 context size change, it was not the culprit after all.
2007-11-15 18:01:26 +01:00
Stephane Marchesin
3c998d8fcb
nouveau: use get_property instead of of_get_property on pre-2.6.22 kernels.
2007-11-15 16:00:54 +01:00
Dave Airlie
2520d3fd99
modes: pass type to userspace for preferred showing
2007-11-15 16:52:04 +11:00
Dave Airlie
f0fe478c15
Merge branch 'master' into modesetting-101
...
Conflicts:
shared-core/i915_dma.c
tests/ttmtest/src/ttmtest.c
2007-11-15 15:04:19 +11:00
Stephane Marchesin
2cf7ad0d9b
nouveau: Copy the PPC bios to RAMIN on init, that lets us do proper output detection in user space.
2007-11-15 03:44:01 +01:00
Dave Airlie
2eee33ace5
intel: add flushing for i8xx chipsets.
...
Add a nut vs hammer style chipset flush for the i8xx chipsets - reenable TTM
code paths
2007-11-15 13:29:55 +11:00
Patrice Mandin
46235ea459
nouveau: nv30: missing ramin init, does it brake other hw?
2007-11-14 23:32:43 +01:00
Kristian Høgsberg
68cdcda1ea
Add new shared header file drm_internal.h.
...
This header file is shared across linux and bsd, but is not installed
for user space to access. It's the place to put prototypes and data
types that aren't platform or chipset specific, but still internal to
the drm.
2007-11-14 14:28:34 -05:00
Stephane Marchesin
448ccf13ba
nouveau: adjust the size of the NV34 context. That fixes mobile PPC cards.
2007-11-14 02:59:00 +01:00
Ben Skeggs
2d7eb4434f
nouveau: Also wait until CACHE1 gets emptied.
2007-11-14 05:36:20 +11:00
Ben Skeggs
7e4bb6099a
Revert "nouveau: stub superioctl"
...
This reverts commit 2370ded79b
.
Err.. didn't mean for that to slip in :)
2007-11-14 05:11:11 +11:00
Ben Skeggs
eb5487b9ca
Merge branch 'fifo-cleanup' into upstream-master
2007-11-14 05:09:07 +11:00
Ben Skeggs
7c1e59fb0c
nouveau: Attempt to wait for channel idle before we destroy it.
2007-11-14 04:26:49 +11:00
Ben Skeggs
53ab6026cf
nouveau: Use "new" NV40 USER control regs.
...
Probably entirely pointless, but a simple change in any case.
2007-11-14 04:15:13 +11:00
Ben Skeggs
7246a33dd1
nouveau: store user control reg offsets in channel struct
2007-11-14 04:09:53 +11:00
Ben Skeggs
d0904f0f2b
nouveau: funcs to determine active channel on PFIFO.
2007-11-14 03:27:37 +11:00
Ben Skeggs
2370ded79b
nouveau: stub superioctl
2007-11-14 03:00:25 +11:00
Dave Airlie
d983ed90cb
i915: cleanup pageflip derefs sarea even if no sarea exists
2007-11-09 11:30:50 +10:00
Dave Airlie
47497abc1e
i915: oops disable TTM is backwards
2007-11-07 23:10:24 +10:00
Thomas Hellstrom
c07dd80269
Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
...
Conflicts:
linux-core/Makefile.kernel
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
2007-11-06 10:01:52 +01:00
Dave Airlie
9280076b67
i915: disable TTM on 8xx chips for now until flushing is solved
2007-11-06 18:13:46 +11:00
Zhenyu Wang
81b7f9b71c
[PATCH] i915: fix missing G33 detect in IS_I9XX
...
G33 detect seems missing with Jesse's suspend/resume patch.
2007-11-06 17:59:14 +11:00
Dave Airlie
9493ce6ca3
i915: cleanup most of the whitespace
2007-11-06 12:16:07 +10:00
Thomas Hellstrom
5ce43a346c
Merge branch 'master' into modesetting-101
...
Conflicts:
linux-core/drm_bufs.c
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
2007-11-05 13:46:06 +01:00
Dave Airlie
7f6bf84c23
drm: remove lots of spurious whitespace.
...
Kernel "cleanfile" script run.
2007-11-05 12:42:22 +10:00
Pekka Paalanen
d81bc78a04
nouveau: more nv20_graph_init.
...
This patch is originally from malc0_, but since it used some NV40_*
regs, I edited them into hex values with a comment.
This seems to correspond quite well with my own mmio-trace,
for the parts I cared to check.
2007-11-04 14:10:00 +02:00
Ben Skeggs
5092865601
nouveau: Use a sw method instead of notify interrupt to signal fence completion.
2007-11-05 05:46:26 +11:00
Ben Skeggs
0a2ab1a900
nouveau: cleanups
2007-11-05 03:53:46 +11:00
Ben Skeggs
c1008104ad
nouveau: only pass annoying messages if irq isn't handled fully.
2007-11-05 02:48:50 +11:00
Ben Skeggs
173a5be28f
nouveau: hook up an inital fence irq handler
2007-11-05 02:20:35 +11:00
Ben Skeggs
9a999e57af
nouveau: crappy ttm mm init, disabled for now.
2007-11-05 01:20:32 +11:00
Jeremy Kolb
2dc2ee7a5a
nouveau: put it all together.
2007-11-02 19:47:48 -04:00
Thomas Hellstrom
9906c7e54b
Merge branch 'master' into modesetting-101
2007-11-02 16:07:36 +01:00
Dave Airlie
bb5f2158db
radeon: set the address to access the aperture on the CPU side correctly
...
This code relied on the CPU and GPU address for the aperture being the same,
On some r5xx hardware I was playing with I noticed that this isn't always true.
I wonder if this will fix some of those r4xx DRI issues we've seen in the past.
2007-11-03 00:39:44 +10:00
Jesse Barnes
629c8b0dbf
Merge branch 'master' into modesetting-101
...
Conflicts:
linux-core/Makefile.kernel
linux-core/drm_stub.c
linux-core/i915_drv.c
shared-core/i915_dma.c
shared-core/i915_drv.h
Fixup suspend/resume conflicts (basically use what's in DRM master for now).
Also fix up a few other conflicts that snuck in (i915_dma changes etc.).
2007-11-01 15:27:55 -07:00
Jesse Barnes
128a8f7ea2
Use unsigned long instead of u64 in drm_modeset_ctl_t
...
A bad idea, ABI-wise, but we're going to be changing this structure anyway
before we merge upstream, so just fix the build for now.
2007-11-01 15:02:26 -07:00
Stephane Marchesin
5766d81074
nouveau: don't use AGP on PPC. It's a hopeless case.
2007-11-01 15:49:10 +01:00
Jeremy Kolb
9416541fb2
Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm
2007-10-31 20:14:48 -04:00
Jeremy Kolb
31847b4b62
nouveau: ttm stubs
2007-10-31 20:13:01 -04:00
Dave Airlie
61cbcb5dbe
drm/ttm: add support for cached un-snooped mappings.
...
This mapping allows cached objects to be mapped in/out of the TT space
with the appropriate flushing calls.
It should put back the old CACHED functionality for snooped mappings
2007-11-01 10:34:53 +11:00
Dave Airlie
17f0882d50
drm: add chipset flushing via agp support
2007-10-31 11:33:34 +11:00
Dave Airlie
2489062a33
i915: add backwards compat chipset flushing code
2007-10-31 11:27:44 +11:00
Jesse Barnes
91aae7e683
Merge branch 'master' into vblank-rework, fixup remaining drivers
...
Conflicts:
linux-core/drmP.h
linux-core/drm_drv.c
linux-core/drm_irq.c
shared-core/i915_drv.h
shared-core/i915_irq.c
shared-core/mga_drv.h
shared-core/mga_irq.c
shared-core/radeon_drv.h
shared-core/radeon_irq.c
Merge in the latest master bits and update the remaining drivers (except
mach64 which math_b is working on). Also remove the 9xx hack from the i915
driver; it seems to be correct.
2007-10-30 12:52:46 -07:00
Stephane Marchesin
79744d730c
Nouveau: add a comment about SKIPS for next API breakage.
2007-10-30 16:55:17 +01:00
Stephane Marchesin
0cebcd43dd
Nouveau: fold some loops.
2007-10-30 16:54:57 +01:00
Dave Airlie
50dec29c80
drm/i915: add driver cache flush entry point
...
Use clflush on Intel hardware to flush cached objects.
2007-10-30 17:52:13 +10:00
Kristian Høgsberg
ff5889f831
Move struct drm_drawable_info out of public header file.
2007-10-29 19:32:46 -04:00
Jesse Barnes
6342e0507b
Remove unused memory save areas
...
These need to be kmalloc'd separately anyway or we may hit kmalloc size
limits.
2007-10-29 10:51:11 -07:00
Stephane Marchesin
cc745fcc3a
nouveau: don't touch PMC_BOOT_1 on x86, it seems to be undefined on some early cards.
2007-10-28 01:59:39 +02:00
Jerome Glisse
90d8f79279
Merge branch 'radeon-ttm' of git://people.freedesktop.org/~airlied/drm into modesetting-101
...
Conflicts:
linux-core/Makefile.kernel
linux-core/drmP.h
shared-core/radeon_cp.c
shared-core/radeon_drv.h
shared-core/radeon_irq.c
modified: linux-core/Makefile.kernel
modified: linux-core/ati_pcigart.c
modified: linux-core/drmP.h
new file: linux-core/radeon_buffer.c
modified: linux-core/radeon_drv.c
new file: linux-core/radeon_fence.c
modified: shared-core/radeon_cp.c
modified: shared-core/radeon_drm.h
modified: shared-core/radeon_drv.h
modified: shared-core/radeon_irq.c
modified: tests/ttmtest/src/ttmtest.c
2007-10-28 00:55:27 +02:00
Jesse Barnes
1e2a2babab
i915: suspend/resume support
...
Add suspend/resume support to the i915 driver. Moves some of the
initialization into the driver load routine, and fixes up places where we
assumed no dev_private existed in some of the cleanup paths. This allows
us to suspend/resume properly even if X isn't running.
2007-10-26 16:10:02 -07:00
Stephane Marchesin
b9d8ddd3ca
nouveau: flip the CHECK_STATE bit off on nv30. This lets you do 8-bit surface destination.
2007-10-26 15:12:04 +02:00
Ian Romanick
7e9ea55a2f
Initial pass at porting MGA to vblank-rework
...
This is currently only compile tested.
2007-10-25 17:14:53 -07:00
Thomas Hellstrom
9adf8c0256
Merge branch 'master' into modesetting-101
...
Conflicts:
linux-core/Makefile.kernel
linux-core/drm_bo.c
linux-core/drm_objects.h
2007-10-25 11:00:45 +02:00
Thomas Hellstrom
b9d9c30474
Tighten permissions on some buffer manager ioctls.
...
Set bo init minor to 0.
Add the version function to header.
2007-10-25 10:29:15 +02:00
Thomas Hellstrom
11f3e5e53f
Buffer manager:
...
Implement a version check IOCTL for drivers that don't use
drmMMInit from user-space.
Remove the minor check from the kernel code. That's really up
to the driver.
Bump major.
2007-10-25 10:12:21 +02:00
Thomas Hellstrom
07706c9b79
Merge branch 'master' into drm-ttm-finalize
2007-10-25 09:24:45 +02:00
Dave Airlie
a70fe82baf
i915: relocate buffers before validation add memory barrier between two
2007-10-25 16:53:18 +10:00
Dave Airlie
c5f158abbe
i915: remove relocatee kernel mapping sooner stops mutex taking during sleep
2007-10-25 16:52:33 +10:00
Eric Anholt
83199c257e
Fix missing \n on some DRM_ERROR in i915_dma.c
2007-10-24 16:27:51 -07:00
Dave Airlie
fd7c24753c
i915: use a drm memory barrier define
2007-10-24 11:13:15 +11:00
Alan Hourihane
d5f2b4b411
Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
2007-10-23 15:34:12 +01:00
Dave Airlie
a294aa724a
i915: require mfence before submitting batchbuffer
2007-10-23 17:54:07 +10:00
Stephane Marchesin
9a115080e8
nouveau: fix IGP
2007-10-23 02:19:17 +02:00
Thomas Hellstrom
919c886b2b
A cmdbuf mutex to implement validate-submit-fence atomicity in the absence
...
of a hardware lock.
2007-10-22 18:59:37 +02:00
Dave Airlie
22883ff26b
i915: split reloc execution into separate function
2007-10-22 11:54:41 +11:00
Thomas Hellstrom
9ddff6d15f
Adapt i915 super-ioctl for lock-free operation.
2007-10-21 12:26:26 +02:00
Thomas Hellstrom
3b19b50cb5
Remove the need for the hardware lock in the buffer manager.
...
Add interface entry cleaning a memory type without touching NO_EVICT buffers.
2007-10-21 12:20:56 +02:00
Thomas Hellstrom
48b5eaf303
Simple replacement for hardware lock in some cases.
...
Fix i915 since last commit.
2007-10-20 16:49:43 +02:00
Thomas Hellstrom
086c058a41
Remove the op ioctl, and replace it with a setuser ioctl.
...
Remove need for lock for now.
May create races when we clean memory areas or on takedown.
Needs to be fixed.
Really do a validate on buffer creation in order to avoid problems with
fixed memory buffers.
2007-10-17 10:59:48 +02:00
Thomas Hellstrom
0d1926d36e
Revert "Replace NO_MOVE/NO_EVICT flags to buffer objects with an ioctl to set pinning."
...
This reverts cf2d569dac
commit.
2007-10-17 10:59:48 +02:00
Thomas Hellstrom
646560d1d1
Revert "Add some more verbosity to drm_bo_set_pin_req comments."
...
This reverts e7bfeb3031
commit.
2007-10-17 10:59:48 +02:00
Alan Hourihane
be2d68914d
Fix a crash on X startup
2007-10-17 09:35:44 +01:00
Dave Airlie
ec1162b212
i915: lock struct mutex about buffer object lookups
2007-10-17 15:36:14 +10:00
Alan Hourihane
90bfc8e611
Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
...
Conflicts:
linux-core/drm_bo.c
linux-core/drm_objects.h
shared-core/i915_dma.c
shared-core/i915_drv.h
2007-10-16 15:28:33 +01:00
Kristian Høgsberg
a69c85fec8
Drop destroy ioctls for fences and buffer objects.
...
We now always create a drm_ref_object for user objects and this is then the only
things that holds a reference to the user object. This way unreference on will
destroy the user object when the last drm_ref_object goes way.
2007-10-16 22:03:05 +11:00
Kristian Høgsberg
dccefba71a
Take bo type argument out of the ioctl interface.
...
The buffer object type is still tracked internally, but it is no longer
part of the user space visible ioctl interface. If the bo create ioctl
specifies a non-NULL buffer address we assume drm_bo_type_user,
otherwise drm_bo_type_dc. Kernel side allocations call
drm_buffer_object_create() directly and can still specify drm_bo_type_kernel.
Not 100% this makes sense either, but with this patch, the buffer type
is no longer exported and we can clean up the internals later on.
2007-10-16 22:03:05 +11:00
[utf-8] Kristian Høgsberg
440fc5113e
Eliminate support for fake buffers.
2007-10-16 21:59:38 +11:00
Ben Skeggs
9fdab5b5c5
nouveau: revert unintended change.
2007-10-16 14:43:57 +11:00
Ben Skeggs
677753047f
nouveau: Cleanup PGRAPH handler, attempt to survive PGRAPH exceptions.
2007-10-16 14:42:26 +11:00
Ben Skeggs
3af053779c
nouveau: Survive PFIFO_CACHE_ERROR.
2007-10-16 13:32:03 +11:00
Ben Skeggs
6398325ba1
nouveau: Handle multiple PFIFO exceptions per irq, cleanup output.
2007-10-16 13:27:27 +11:00
Stephane Marchesin
30353c8efc
nouveau: PPC fixes. These regs are very touchy.
2007-10-14 23:08:36 +02:00
Jeremy Kolb
837e364353
nouveau: fix warning.
2007-10-14 10:56:31 -04:00
Jeremy Kolb
811e43f9e2
nouveau: fix warning.
2007-10-14 10:56:17 -04:00
Dave Airlie
8d3cb7e472
i915: fix vbl_swap allocation
2007-10-14 21:19:13 +10:00
Pekka Paalanen
3ab7627651
nouveau: Fix a typo in nv25_graph_context_init
2007-10-12 23:55:59 +03:00
Stuart Bennett
50deb31e9f
nouveau: Fix typos in nv20_graph_context_init
2007-10-12 23:49:51 +03:00
Pekka Paalanen
0d2554f83e
nouveau: Make notifiers go into PCI memory
...
On some hardware notifers in AGP memory just don't work.
2007-10-12 23:47:14 +03:00
Arthur Huillet
9d779e2c88
nouveau: mandatory "oops I forgot half of the files" commit
2007-10-12 22:40:08 +02:00
Arthur Huillet
74ea019863
nouveau: added support for software methods, and implemented those necessary for NV04 (TNT1) to start X
2007-10-12 22:36:55 +02:00
Dave Airlie
74001c34e5
i915: add superioctl support to i915
...
This adds the initial i915 superioctl interface. The interface should be
sufficent even if the implementation may needs fixes/optimisations internally
in the drm wrt caching etc.
2007-10-12 10:54:38 +10:00
Matthieu Castet
bf126f4925
nouveau : nv10 and nv04 PGRAPH_NSTATUS are different
2007-10-10 21:11:43 +02:00
Maarten Maathuis
d912709a63
nouveau: PMC_BOOT_1 was not mapped.
2007-10-10 16:41:21 +02:00
Stephane Marchesin
9b294bbe0e
nouveau: try to fix big endian.
2007-10-10 01:12:20 +02:00
Maarten Maathuis
20928a2f2b
nouveau: A char is signed, so it may overflow for >NV50.
2007-10-07 19:01:58 +02:00
Matthieu Castet
18952a1670
nouveau : print correct value in nouveau_graph_dump_trap_info for nv04
2007-10-06 12:01:02 +02:00
Dave Airlie
19b7cc3444
Merge branch 'pre-superioctl-branch'
2007-10-05 12:11:43 +10:00
Maarten Maathuis
d351601899
nouveau: Remove excess device classes.
2007-10-04 09:46:16 +02:00
Maarten Maathuis
319436c5cc
nouveau: NV47 context switching voodoo + warning
2007-10-04 09:39:31 +02:00
Maarten Maathuis
b510517d59
nouveau: Switch over to using PMC_BOOT_0 for card detection.
2007-10-04 09:31:46 +02:00
Stephane Marchesin
7fbd10d933
nouveau: nv2a drm context switch support.
2007-10-04 03:44:23 +02:00
Pekka Paalanen
a72eb27fbc
nouveau: nv20 graph_create_context difference
...
nv20 writes the chan->id to a different place than nv28.
This still does not make nv20 run nv10_demo.
2007-10-02 22:18:47 +03:00
Pekka Paalanen
afc57ef1df
nouveau: fix nv25_graph_context_init
...
It was writing 4x the data in a loop.
2007-10-02 22:18:47 +03:00
Stuart Bennett
ffa3173ec4
nouveau: nv20 graph context init
2007-10-02 22:18:46 +03:00
Maarten Maathuis
69fcfb413e
nouveau: Fix dereferencing a NULL pointer when erroring out during initialization.
2007-10-01 22:21:23 +02:00
Stephane Marchesin
e1600646a9
nouveau: flip the ctx switch bit on. it seems to be ignored on nv34 but causes nv30 issues.
2007-10-01 03:28:10 +02:00
Matthieu Castet
75e8f4b5cf
nouveau : nv30 remove harcoded NV20_PGRAPH_CHANNEL_CTX_TABLE
2007-09-30 23:19:39 +02:00
Matthieu Castet
9cd6ece307
nouveau : nv20_graph replace nouveau_graph_wait_idle by nouveau_wait_for_idle
...
Also clean PGRAPH_CHANNEL macros
2007-09-30 23:09:30 +02:00
Pekka Paalanen
aa135ba8e8
nouveau: rename nv30_graph.c to nv20_graph.c
2007-09-30 22:16:01 +03:00
Pekka Paalanen
205403aea8
nouveau: nv30 graph function renames, removed nv20_graph.c
...
All nv30 functions in nv30_graph.c that can be used on nv20 are renamed
as accordingly. nv20 specific parts from nv20_graph.c are moved into
nv30_graph.c.
2007-09-30 22:16:01 +03:00
Pekka Paalanen
a67060c810
nouveau: graph ctx init nv25
...
According to mmio_trace_900XGL.tar.bz2 by Evan Fraser the nv25 init is
exactly the same as nv28 init.
2007-09-30 22:16:01 +03:00
Pekka Paalanen
aa2c337991
nouveau: nv28 graph context init
2007-09-30 22:16:01 +03:00
Pekka Paalanen
8ad605a264
nouveau: let nv20 hardware do ctx switching automatically.
2007-09-30 22:16:01 +03:00
Pekka Paalanen
dc592c8b7b
nouveau: Make nv20 use the nv30 PGRAPH ctx functions.
2007-09-30 22:16:01 +03:00
Pekka Paalanen
88bdb38cea
nouveau: Change couple constants to symbols.
2007-09-30 22:16:01 +03:00
Pekka Paalanen
a45fce7712
nouveau: NV30 should never call nouveau_nv20_context_switch().
2007-09-30 22:16:01 +03:00
Matthieu Castet
fb3ed99fb1
nouveau : pgraph_ctx dynamic alloc for nv04, nv10
2007-09-30 14:50:22 +02:00
Matthieu Castet
c76e04828b
nouveau : nv04 don't use chan->pgraph_ctx array
...
This commit is a first step to dynamic alloc pgraph context on nv04, nv10.
2007-09-30 14:21:47 +02:00
Matthieu Castet
f8f31f0457
nouveau : stop the fifo of the channel we are deleting
2007-09-29 23:07:29 +02:00
Matthieu Castet
097db7a9b0
nouveau : nv1x fix strange corruption
...
that appears when running glxgears and nouveau demo
2007-09-29 23:07:29 +02:00
chaohong guo
f863d23e01
radeon: Commit the ring after each partial texture upload blit.
...
This makes sure each blit starts as early as possible, which may improve
texture upload performance in some cases.
2007-09-29 18:08:04 +02:00
Matthieu Castet
72134e939e
nouveau : clean chan->pgraph_ctx stuff. We now do a static init of the array.
...
This avoid hardcoding pgraph_ctx size and potential buffer overflow.
2007-09-28 21:29:58 +02:00
Jesse Barnes
0bb2395a8b
Revert drm_i915_flip_t braindamage
...
I should not have renamed this field.
I should not have renamed this field.
I should not have renamed this field.
On the plus side, it was at least binary compatible.
2007-09-28 10:10:08 -07:00
Alan Hourihane
bf9bd5671c
Create memory pool for TT memory
2007-09-27 14:21:29 +01:00
Jesse Barnes
972ec4fa25
Hack out i915_mem_takedown
...
We may want to make the old i915 memory manager obsolete eventually, and in the
meantime the takedown causes problems on unload so remove it for now.
2007-09-25 16:18:01 -07:00
Thomas Hellstrom
c4b3a0f602
Merge branch 'master' into pre-superioctl-branch
...
Conflicts:
linux-core/drm_bo.c
linux-core/drm_fence.c
linux-core/drm_objects.h
shared-core/drm.h
2007-09-25 18:03:31 +02:00
Dave Airlie
03c47f1420
drm: use fence_class as name instead of class
2007-09-25 16:17:17 +10:00
Jesse Barnes
0be6e919aa
Add 965GM macro bits
...
Update IS_MOBILE macro to include new IS_I965GM test.
2007-09-24 15:40:55 -07:00
Jesse Barnes
5cc3083179
Merge branch 'master' into modesetting-101 - TTM & typedef removal
...
Conflicts:
linux-core/drmP.h
linux-core/drm_bo.c
linux-core/drm_drv.c
linux-core/drm_objects.h
shared-core/drm.h
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
Mostly removing typedefs that snuck into the modesetting code and
updating to the latest TTM APIs. As of today, the i915 driver builds,
but there are likely to be problems, so debugging and bugfixes will
come next.
2007-09-24 14:41:46 -07:00
Thomas Hellstrom
da63f4ba0f
Add fence error member.
...
Modify the TTM backend bind arguments.
Export a number of functions needed for driver-specific super-ioctls.
Add a function to map buffer objects from the kernel, regardless of where they're
currently placed.
A number of error fixes.
2007-09-22 13:57:13 +02:00
Eric Anholt
24e33627c5
Merge branch 'bo-set-pin'
...
This branch replaces the NO_MOVE/NO_EVICT flags to buffer validation with a
separate privileged ioctl to pin buffers like NO_EVICT meant before. The
functionality that was supposed to be covered by NO_MOVE may be reintroduced
later, possibly in a different way, after the superioctl branch is merged.
2007-09-21 17:12:19 -07:00
Eric Anholt
e7bfeb3031
Add some more verbosity to drm_bo_set_pin_req comments.
2007-09-21 16:14:22 -07:00
Stephane Marchesin
7587e9682c
nouveau: fix ppc and get it right this time.
2007-09-21 22:42:39 +02:00
Stephane Marchesin
dc60c452e6
nouveau: fix notifiers on PPC.
2007-09-21 22:27:53 +02:00
Stephane Marchesin
74c6f2f47a
nouveau: add some checks to the nv04 graph switching code.
2007-09-21 22:04:50 +02:00
Eric Anholt
3d3a96ad4e
Merge branch 'origin' into bo-set-pin
2007-09-19 15:55:58 -07:00
Michel Dänzer
e349b58b4a
i915: Reinstate check that drawable has valid information in i915_vblank_swap.
2007-09-18 21:06:55 +01:00
Michel Dänzer
78d111fa96
i915: Fix scheduled buffer swaps.
...
One instance of unlocking a spinlock was converted incorrectly when this code
was fixed to build on BSD.
2007-09-18 21:06:55 +01:00
Ian Romanick
a3881ad2fe
Add ioc32 compat layer for XGI DRM.
2007-09-18 11:03:49 -07:00
Jesse Barnes
852232fb80
Remove plane->pipe mapping from SAREA private after all
...
We can figure out which pipe a given plane is mapped to by looking at the
display control registers instead of tracking it in a new SAREA private field.
If this becomes a performance problem, we could move to an ioctl based solution
by adding a new parameter for the DDX to set (defaulting to the old behavior if
the param was never set of course).
2007-09-12 08:55:33 -07:00
Jesse Barnes
7fdf98051a
Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/drm
2007-09-11 03:50:17 -07:00
Jesse Barnes
3cb8acd5ab
Disambiguate planes & pipes for swap operations
...
This mod makes the SAREA track plane to pipe mappings and corrects the name of
the plane info variables (they were mislabeled as pipe info since until now all
code assumed a direct mapping between planes and pipes).
It also updates the flip ioctl argument to take a set of planes rather than
pipes, since planes are flipped while pipes generate vblank events.
2007-09-11 03:48:46 -07:00
Patrice Mandin
0bd8752a0c
nouveau: nv10: add combiner registers
2007-09-10 18:53:48 +02:00
Matthieu Castet
00bb534a54
nouveau : nv10 fix NV10_PGRAPH_CTX_USER save/load
2007-09-09 15:49:33 +02:00
Matthieu Castet
b2ee72f440
nouveau : nv10 pipe ctx switch load/save.
...
This fix some issues with more than one 3D fifo, but there still some "corruption" sometimes
2007-09-09 12:13:00 +02:00
Maarten Maathuis
f19d80b046
nouveau: Add Quadro NVS 140 pciid
2007-09-08 22:19:00 +02:00
Ben Skeggs
06bb072595
nouveau: Use nv41 ctxprog/vals on nv42.
2007-09-07 20:07:13 +10:00
Ian Romanick
54c96cbc46
Merge branch 'xgi-0-0-2'
2007-09-06 15:37:52 -07:00
Stephane Marchesin
edf5a86a26
nouveau: fix some nv04 graph switching.
2007-09-06 02:47:06 +02:00
Stephane Marchesin
ff9a019cf0
nouveau: add pure nv30 support.
2007-09-06 02:47:06 +02:00
Maarten Maathuis
ef4944de85
Add context init voodoo and context switch code for NV41.
2007-09-04 18:51:57 +02:00
Ian Romanick
fee49e2071
Merge branch 'master' of ssh+git://git.freedesktop.org/git/mesa/drm into xgi-0-0-2
2007-08-31 10:54:55 -07:00
Stephane Marchesin
bac3f49daa
nouveau: nv04 context switching support. Works for starting X up at least.
2007-08-31 01:40:00 +02:00
Stephane Marchesin
69b11f44f0
nouveau: give nv03 the last cut.
2007-08-31 01:40:00 +02:00
Keith Packard
c78e610fa4
Add register defines for hw binning
2007-08-28 12:23:51 -07:00
Dave Airlie
589707b765
drm: remove XFREE86_VERSION macros
2007-08-28 15:17:36 +10:00
Matthieu Castet
a331d2e352
nouveau : add NV04_PGRAPH_TRAPPED_ADDR definition
...
- fix offset for nv04
- use it in nv10 graph ctx switch for getting next channel
- dump NV10_PGRAPH_TRAPPED_DATA_HIGH on nv10+
2007-08-26 20:48:32 +02:00
Matthieu Castet
4182fce408
nouveau : nv1x graph reworks
...
- add forgotten init value
- use the same PGRAPH_DEBUG than the blob
- remove init of ddx reg : it should be done with object
- better handle of channel destruction
hope I didn't break anything ;)
2007-08-25 22:10:45 +02:00
Patrice Mandin
502bbdbe14
nouveau: nv10: output a warning if last channel invalid, and switch to next
2007-08-25 00:12:58 +02:00
Patrice Mandin
9875011196
nouveau: nv10: check some NULL pointers inside context switch
2007-08-23 10:20:44 +02:00
Matthieu Castet
8645dac895
nouveau : fix some potential crashes with objects causing hash collision
2007-08-22 23:20:14 +02:00
Ben Skeggs
11c46afe75
nouveau/nv40: Preserve other bits in 0x400304/0x400310 like NVIDIA do.
2007-08-22 13:23:49 +10:00
Ben Skeggs
a654c0341a
nouveau/nv40: Dump extra info on ucode state if ctx switch fails.
2007-08-22 13:19:21 +10:00
Ben Skeggs
81eaff44c4
nouveau: NV4c ctx ucode.
...
Seems we already have a nv4c_ctx_init() somehow, a quick check shows the
ucode matches it still.
2007-08-22 13:09:27 +10:00
Ben Skeggs
ae883c97ad
nouveau/nv50: Correct thinko for 8800 chips + cleanup a bit.
2007-08-22 12:54:26 +10:00
Stephane Marchesin
c8ee6a6cab
nouveau: redo nv30_graph.c. Should work better, but we still lack a couple of cards.
2007-08-22 04:20:50 +02:00
Stephane Marchesin
76337bdb19
nouveau: fix the comment and debug message for PCIGART size
2007-08-22 04:20:50 +02:00
Ben Skeggs
03c0490129
nouveau: Add NV44 ctx ucode. Patch from stillunknown.
...
Microcode is similar enough to the NV4A one that it should be able to use
the same initial PGRAPH context. One day this mess will go away, honest..
2007-08-21 02:23:21 +10:00
Ben Skeggs
216f1b0573
nouveau: Poke 0x2230 on NV47 also.
...
Makes 0x2220 work the same way as on NV40.
2007-08-21 02:18:27 +10:00
Patrice Mandin
c8760c7999
Check also for Linux, as it's not supported on different OS
2007-08-19 18:45:01 +02:00
Patrice Mandin
a122e7dabf
Function pci_get_bus_and_slot needs 2.6.19 or later
2007-08-19 18:41:18 +02:00
Eric Anholt
0055fd5c35
Merge branch 'master' into bo-set-pin
2007-08-16 09:23:09 -07:00
Ben Skeggs
8a4d7f34d9
nouveau: Detect memory on NFORCE/NFORCE2 correctly.
2007-08-17 01:12:46 +10:00
Ben Skeggs
10f9b7bd0b
nouveau: Use count parameter in nouveau_notifier_alloc().
2007-08-15 14:14:23 +10:00
Ben Skeggs
a615d2fde7
nouveau: Turn some messages into DRM_DEBUGs..
2007-08-15 14:01:35 +10:00
Ben Skeggs
c3faa589b0
nouveau: Allow GART notifiers when using sgdma code.
2007-08-15 13:36:54 +10:00
Ben Skeggs
ee01d3755a
nouveau: Workaround mysterious PRAMIN clobbering by the card.
2007-08-15 13:34:57 +10:00
Ian Romanick
f563a50d14
Eliminate unused / useless ioctls.
2007-08-14 13:44:51 -07:00
Ben Skeggs
a6ea60c77e
nouveau: Catch all NV4x chips instead of just NV_40.
2007-08-15 01:40:46 +10:00
Ben Skeggs
02c4e0e757
nouveau/nv40: Fix channel scheduling.
...
Ensure NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLE gets set, otherwise channels
will appear to "freeze" in some circumstances.
2007-08-15 01:04:41 +10:00
Dave Airlie
da27986870
i915: i965 non-secure batchbuffer bit has moved.
2007-08-11 08:57:53 +10:00
Ben Skeggs
a46104674f
nouveau/nv50: demagic instmem setup.
2007-08-10 14:22:50 +10:00
Ben Skeggs
39907f613b
nouveau: Allow creation of gpuobjs before any other init has taken place.
2007-08-10 13:53:10 +10:00
Ian Romanick
aea6b4dea9
Unify alloc and free ioctls.
...
The DRM_XGI_PCIE_ALLOC and DRM_XGI_FB_ALLOC ioctls (and the matching
free ioctls) are unified to DRM_XGI_ALLOC. The desired memory region
is selected by xgi_mem_alloc::location. The region is magically
encoded in xgi_mem_alloc::index, which is used to release the memory.
Bump to version 0.11.0. This update requires a new DDX.
2007-08-09 15:30:36 -07:00
Ben Skeggs
7784e8c6e7
nouveau: silence irq handler a bit
2007-08-09 11:12:13 +10:00
Ben Skeggs
7281463f8d
nouveau/nv40: add some missing pciids.
2007-08-09 10:23:36 +10:00
Matthieu Castet
e326acf549
nouveau : nv10, nv20, nv30 : don't save all channel in the same RAMFC entry
...
This should improve multi fifo
2007-08-08 22:55:32 +02:00