1aafbb83d9
radeon: r345xx fixe hard lockup
...
This patch should fixe hard lockup and convert them in
softlockup (ie you can ssh the box but the gpu is busted
and we are waiting in loop for it to come back to reason).
2008-06-13 09:54:05 +02:00
cc74ac3590
Don't clear USER_INTERRUPT if we're not handling it.
...
This fixes a regression from commit d434b64f6a
2008-06-12 10:56:37 -07:00
4a2e29bf99
Use GEM in modesetting
...
Use GEM for ring buffer setup and framebuffer allocation. This means reworking
the hardware status page stuff a bit (just use the basic range allocator for
vram for now) and #ifdef'ing out the TTM & DRI2 code. Works well enough to
load/unload several times and display fbcon on my T61 (though there's still
some unexplained console corruption).
2008-06-11 15:59:01 -07:00
846d792ac1
[gem] Another round of cleanups from checkpatch.pl
2008-06-11 15:51:17 -07:00
a07c82183a
RADEON: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTAT
...
According to the hw guys, you should use DSTCACHE_CTLSTAT to flush
the 2D dst cache rather than RB2D_DSTCACHE_CTLSTAT.
2008-06-11 18:25:47 -04:00
2655005762
[gem] Move potentially device-specific ioctls to the intel driver.
...
This is the create (may want location flags), pread/pwrite/mmap
(performance tuning hints), and set_domain (will 32 bits be enough for
everyone?) ioctls. Left in the generic set are just flink/open/close.
The 2D driver must be updated for this change, and API but not ABI is broken
for 3D. The driver version is bumped to mark this.
2008-06-11 14:42:40 -07:00
f5412a944f
Merge commit 'origin/drm-gem' into modesetting-gem
...
Use new GEM based ring buffer initialization. Still need to init GEM & use it
for framebuffer allocation etc.
Conflicts:
shared-core/i915_dma.c
shared-core/i915_drv.h
2008-06-11 10:25:45 -07:00
62a3be962f
[intel] Fix BUG_ON trigger in irq masking if you did on/off with irqs disabled.
2008-06-10 23:11:09 -07:00
2150da5d1a
[gem] Manage the ringbuffer from the kernel in the GEM case.
...
This requires that the X Server use the execbuf interface for buffer
submission, as it no longer has direct access to the ring. This is
therefore a flag day for the gem interface.
This also adds enter/leavevt ioctls for use by the X Server. These would
get stubbed out in a modesetting implementation, but are required while
in an environment where the device's state is only managed by the DRM while
X has the VT.
2008-06-10 22:57:07 -07:00
b535567ee9
xgixp: Remove dependency on TTM fences
2008-06-10 22:18:14 -07:00
a1d9600724
Merge commit 'origin/drm-gem' into modesetting-gem
...
Passed the compile test; it's ready to ship.
Conflicts:
libdrm/Makefile.am
linux-core/Makefile.kernel
linux-core/drmP.h
linux-core/drm_memrange.c
linux-core/drm_stub.c
shared-core/drm.h
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
2008-06-10 17:31:54 -07:00
4b8aecbde8
RADEON: Add untested support for RS400 chips
...
GART setup appears to work the same as RS480 chips.
Also RC4xx chips are actually RS400 based, not RS480 based.
2008-06-09 16:58:06 -04:00
f6982b54c9
RADEON: switch IGP gart to use radeon_write_agp_base()
2008-06-09 16:28:35 -04:00
63eb58040d
Fix typo in i915_suspend
...
Reported by vehemens
2008-06-08 23:46:14 -04:00
116870a908
I915 suspend/resume for FreeBSD
2008-06-08 13:56:14 -04:00
d43f3cb097
r300/r500: add hier-z regs
2008-06-09 05:32:41 +10:00
c2fc142ea7
[intel] remove settable use_mi_batchbuffer_start
...
The driver can know what hardware requires MI_BATCH_BUFFER vs
MI_BATCH_BUFFER_START; there's no reason to let user mode configure this.
2008-06-06 21:54:38 +01:00
6cd0ef06a6
[intel] remove settable use_mi_batchbuffer_start
...
The driver can know what hardware requires MI_BATCH_BUFFER vs
MI_BATCH_BUFFER_START; there's no reason to let user mode configure this.
2008-06-06 13:26:03 -07:00
9f46c6935d
[intel-gem] Use timers to retire requests periodically.
...
Without the user IRQ running constantly, there's no wakeup when the ring
empties to go retire requests and free buffers. Use a 1 second timer to make
that happen more often.
2008-06-06 13:00:47 -07:00
a708106c77
[intel] free the hardware status page at driver_unload
...
This goes with the other hardware status page patch.
2008-06-06 13:00:46 -07:00
56a96841d0
[intel-gem] Add explicit throttle ioctl
...
Instead of throttling and execbuffer time, have the application ask to
throttle explicitly. This allows the throttle to happen less often, and
without holding the DRM lock.
2008-06-06 13:00:46 -07:00
5f5badb26f
[intel] Allocate hardware status page at driver load time
...
I couldn't get the re-allocated HWS to work on my 965GM, so I just gave up
and made it persist across the lifetime of the driver instead.
2008-06-06 13:00:46 -07:00
84162ccb7d
Ignore X server provided mmio address
2008-06-06 13:00:46 -07:00
25c1bb334f
drm/intel: make hotplug just be an event
2008-06-06 10:39:58 +10:00
6905c7a29d
radeon: Restore software interrupt on resume.
...
Fixes performance drop after suspend/resume on some systems.
2008-06-05 18:23:37 +02:00
967bd21911
modesetting: initial attempt at debonging fb
2008-06-05 11:11:22 +10:00
382aa3ceeb
drm: introduce generation counter to interface.
...
Idea being if you want to add new crtc/output/encoder dynamically later,
you just increase the generation counter and userspace should re-read
all the resources
2008-06-04 13:50:51 +10:00
d5ae19ebcf
drm: sg alloc should write back the handle to userspace
2008-06-03 12:44:06 +10:00
4e7b246398
drm: add functions to get/set gamma ramps
2008-06-02 14:04:41 +10:00
e439e74776
drm/modesetting: another re-org of some internals.
...
Move dpms into the helper functions.
Move crtc into the encoder.
Move disable unused functions into the helper.
2008-06-02 10:05:54 +10:00
a12cbf8aa5
RADEON: fix typo in last commit
2008-05-30 18:20:01 -04:00
461bfa3da6
Merge commit 'origin/master' into drm-gem
...
Conflicts:
linux-core/Makefile.kernel
shared-core/i915_drv.h
shared-core/nouveau_state.c
2008-05-30 14:42:08 -07:00
6e8a2cff66
r500: attempt to make AGP work by programming agp base in the MC correctly
2008-05-30 20:27:31 +10:00
5d47185eb6
drm: switch possible crtc/clones over to encoders
2008-05-30 15:32:58 +10:00
9d38448ed3
modesetting: the great renaming.
...
Okay we have crtc, encoder and connectors.
No more outputs exposed beyond driver internals
I've broken intel tv connector stuff.
Really for TV we should have one TV connector, with a sub property for the
type of signal been driven over it
2008-05-30 15:10:04 +10:00
6aeef92c0c
drm: attach an encoder.
...
Time to do some renaming on the connectors I think
2008-05-30 13:57:27 +10:00
fae2c17b31
drm: add more encoder interfaces
2008-05-30 12:14:44 +10:00
98c5cf7f6f
modesetting: reorganise out crtc/outputs are allocated.
...
Use subclassing from the drivers to allocate the objects. This saves
two objects being allocated for each crtc/output and generally makes
exit paths cleaner.
2008-05-30 11:25:41 +10:00
df8cd54286
modesetting: reorganise code into core and helper functions.
...
This splits a lot of the core modesetting code out into a file of
helper functions, that are only called from themselves and/or the driver.
The driver gets called into more often or can call these functions from itself
if it is a helper using driver.
I've broken framebuffer resize doing this but I didn't like the API for that
in any case.
2008-05-29 14:02:14 +10:00
3a3f39d144
Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
...
Conflicts:
shared-core/i915_dma.c
shared-core/i915_drv.h
2008-05-28 21:01:18 +01:00
5b86823fa3
radeon: split microcode out into a separate header file.
2008-05-28 11:12:57 +10:00
e10502002f
[intel-gem] Replace idlelock usage with real lock acquisition.
2008-05-27 18:03:18 -07:00
0c8a8db1b6
i915: fix BSD bh, DRI2 not uses anywhere else
2008-05-28 10:28:13 +10:00
c06096d34f
radeon: bump release date/version for r500 3D support
2008-05-28 10:02:20 +10:00
59c953245c
RADEON: add get_param for number of GB pipes
2008-05-27 18:34:33 -04:00
e45f95a03b
[i915] Fix typo in (unused) START_ADDR definition.
2008-05-27 14:55:01 -07:00
8cd045079e
[FreeBSD] Add vblank-rework support and get drivers building.
...
The i915 driver now works again.
2008-05-27 14:25:20 -07:00
d434b64f6a
[i915] leave interrupts masked off when not in use.
...
The interrupt enable register cannot be used to temporarily disable
interrupts, instead use the interrupt mask register.
Note that this change means that a pile of buffers will be left stuck on the
chip as the final interrupts will not be recognized to come and drain things.
2008-05-26 03:25:16 -07:00
7cf3fd29fe
[intel-gem] Add DRM_I915_GEM_BUSY ioctl to check for idle buffers.
...
This new ioctl returns whether re-using the buffer would force a wait.
2008-05-25 20:45:20 -07:00
9fc4ea5c00
i915: do a better job of parsing VBIOS data
...
Add code to get panel modes from the VBIOS if present and check whether certain
outputs exist. Should make our display detection code a little more robust.
2008-05-23 18:42:47 -07:00
a51c3a76ff
[intel] Add debug code to verify the cached ring tail pointer.
...
Recording the tail pointer in a local variable improves performance, but if
someone messes up and fails to reload at the right time, the driver will
write commands to the wrong part of the ring and scramble execution badly.
This change (available by setting I915_RING_VALIDATE to 1) checks to make
sure the cached tail pointer matches the hardware tail pointer at each ring
buffer addition, calling BUG_ON when that's not true.
2008-05-22 22:00:21 -07:00
5e662f90d1
[gem] Release GEM buffers from work task scheduled from IRQ.
...
There are now 3 lists. Active is buffers currently in the ringbuffer.
Flushing is not in the ringbuffer, but needs a flush before unbinding.
Inactive is as before. This prevents object_free → unbind →
wait_rendering → object_reference and a kernel oops about weird refcounting.
This also avoids an synchronous extra flush and wait when freeing a buffer
which had a write_domain set (such as a temporary rendered to and then from
using the 2d engine). It will sit around on the flushing list until the
appropriate flush gets emitted, or we need the GTT space for another
operation.
2008-05-22 22:00:21 -07:00
49075b678f
r500: add two more register ranges for mesa driver to setup
2008-05-23 09:40:26 +10:00
74a9ea896e
drm: fix nouveau warning
2008-05-23 09:40:26 +10:00
e8320a716d
i915: init bo mm at driver init only when modeset=1
...
To avoid bo memory manager being inited twice, it will be called
at firstopen when modeset is not enabled.
2008-05-22 10:34:08 -07:00
d6f7968577
[gem] Replace ring throttling hack with actual time measurement.
2008-05-21 16:40:14 -07:00
91c6c4b240
rs690/r500: vblank support.
...
The new display controller has the vblank interrupts in a different place.
Add support for vbl interrupts for these chips
2008-05-21 21:27:33 +10:00
af8e087157
[gem] Use a separate sequence number field from classic/ttm
...
This lets us get some qualities we desire, such as using the full 32-bit
range (except zero), avoiding DRM_WAIT_ON, and a 1:1 mapping of active
sequence numbers to request structs, which will be used soon for throttling
and interrupt-driven list cleanup.
2008-05-20 14:16:26 -07:00
ab36a6f983
[gem] Rename sequence numbers from "cookie" to "seqno"
2008-05-20 10:53:10 -07:00
6c3ac484b0
[gem] Clean up active/inactive list handling using helper functions.
...
Additionally, a boolean active field is added to indicate which list an
object is on, rather than smashing last_rendering_cookie to 0 to show
inactive. This will help with flush-reduction later on, and makes the code
clearer.
2008-05-20 10:52:39 -07:00
8399656106
r500: add more register ranges for Mesa driver
2008-05-17 10:22:12 +10:00
7dced2f33a
[gem] Hold dev->struct_mutex to protect structure data.
2008-05-15 18:45:23 -07:00
3ab152da66
[gem] Rename the GTT LRU lists to active (executing) and inactive (idle).
2008-05-15 11:59:58 -07:00
caace3692f
RS4xx: separate out RS400 and RS480 IGP chips
...
RS400 (intel based IGP) and RS480 (AMD based IGP) have
different MC and GART setups. Currently we only support
RS480.
2008-05-13 21:02:17 -04:00
e4f29968f4
Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
2008-05-13 14:47:17 -07:00
ee631e1b86
i915: register definition & header file cleanup
...
It would be nice if one day the DRM driver was the canonical source for
register definitions and core macros. To that end, this patch cleans
things up quite a bit, removing redundant definitions (some with
different names referring to the same register) and generally tidying up
the header file.
2008-05-13 14:44:17 -07:00
5be53a0881
i915: execbuf now works without i915_dma_init being called
2008-05-13 09:26:26 +02:00
d32ce7f621
i915: TV hotplug fixes
...
In order to avoid recursive ->detect->interrupt->detect->interrupt->...
we need to disable TV hotplug interrupts in
intel_tv.c:intel_tv_detect_type. We also need to enable the TV interrupt
detection and hotplug sequence properly in i915_irq.c.
2008-05-12 15:47:19 -07:00
f650d7240a
[GEM] Typo (and thinking) fixes in drm-gem.txt and doxygen.
2008-05-12 13:17:01 -07:00
7e7ea313c4
[intel] When polling for ring space, sleep for a lot longer (10ms)
...
If the ring is full, the engine will surely be running for more than 10ms.
2008-05-12 13:03:16 -07:00
a51e38548c
fix kernel oops when removing fb
...
drm_crtc->fb may point to NULL, f.e X server will allocate a new fb
and assign it to the CRTC at startup, when X server exits, it will destroy
the allocated fb, making drm_crtc->fb points to NULL.
2008-05-12 12:31:56 -07:00
f1b9bbe2b8
modeset init code cleanup
...
moving modeset init code into one function and correct error
handling druing i915 init
2008-05-12 12:07:04 -07:00
af60d87869
fix G33 hardware status page in modeset
...
We need to alloc a hw status page bo for G33 if modeset is enabled since the 2D
driver can't alloc gfx memory when working in drm modeset.
2008-05-12 12:04:02 -07:00
10d754f0a2
RADEON: fix copy/pasto in last commit
2008-05-12 14:49:43 -04:00
75bc739bee
R3/4/5: init pipe setup in drm
...
Similar (broken) code in mesa needs to be removed
2008-05-12 09:44:20 -04:00
e16a7101e8
RADEON: cleanup radeon_do_engine_reset()
2008-05-12 09:35:06 -04:00
5532b8d2a0
R300+: fixup pixcache flush
2008-05-12 09:30:47 -04:00
3582e82f14
RS4xx: fix MCIND index mask
2008-05-12 09:24:13 -04:00
d26af273f8
RADEON: write AGP_BASE_2 on chips that support it
2008-05-12 09:21:45 -04:00
c307e50724
R300+: fixup PURGE/FLUSH macros
2008-05-12 09:18:28 -04:00
fb9eaff747
Radeon IGP: merge RS4xx/RS6xx gart setup
2008-05-12 09:13:44 -04:00
68b7f550ba
Radeon IGP: wrap MCIND access
...
first step in merging rs4xx/rs6xx gart setup
2008-05-12 09:00:40 -04:00
a34025ce22
Radeon IGP: clean up registers and magic numbers
2008-05-12 08:56:11 -04:00
3f66a0005c
drm: remove root only from a lot of drm ioctls to get stuff running as non-root
2008-05-12 16:29:22 +10:00
ff39db099b
[GEM] Make pread/pwrite manage memory domains. No luck with movnti though.
...
pread and pwrite must update the memory domains to ensure consistency with
the GPU. At some point, it should be possible to avoid clflush through this
path, but that isn't working for me.
2008-05-11 00:10:16 -07:00
1f9eaceb71
Merge commit 'anholt/drm-gem' into drm-gem
2008-05-10 21:05:25 -07:00
a37ac493da
[intel-GEM] Clean up GEM ioctl naming.
...
Rename 'validate_entry' to 'exec_object', then clean up some field names in
structures (renaming buffer_offset to just offset, for example).
2008-05-10 21:04:18 -07:00
c5c59eab80
GEM: Separate the LRU into execution list and LRU list.
...
Now, the LRU list has objects that are completely done rendering and ready
to kick out, while the execution list has things with active rendering,
which have associated cookies and reference counts on them.
2008-05-09 17:38:32 -07:00
dce3442194
fixup i915 workqueue handling when modeset=1
...
Fixup workqueue creation error handling and make sure we destroy the queue on
unload.
2008-05-09 14:29:10 -07:00
12725a37af
i915: add basic VBT support
...
Map the VBIOS (and therefore VBT) at init time for use by various output
initialization routines.
2008-05-09 14:19:00 -07:00
1e26ca44c9
[gem] API cleanup. allocate->create unreference->close name->flink
...
Make the API names a bit more consistent.
2008-05-09 12:18:09 -07:00
7bcbc443f4
i915: Changed intel_fb to use the new drm_crtc_set_config interface
2008-05-08 20:10:18 +02:00
9af4c49743
[intel-gem] Move domains to relocation records. add set_domain ioctl.
...
Domain information is about buffer relationships, not buffer contents. That
means a relocation contains the domain information as it knows how the
source buffer references the target buffer.
This also adds the set_domain ioctl so that user space can move buffers to
the cpu domain.
2008-05-08 10:44:02 -07:00
4466fea7ba
Revert "i915: fix vbl swap for multi-master"
...
This reverts commit 2a78ad2264
2008-05-08 17:12:16 +10:00
2a78ad2264
i915: fix vbl swap for multi-master
...
patch from F9 tree
2008-05-08 16:14:33 +10:00
ed072ed075
drm_mode: initial replacefb implemenation
2008-05-08 14:02:05 +10:00
ef204fb5c2
Merge remote branch 'origin/master' into modesetting-101
...
Conflicts:
linux-core/Makefile.kernel
shared-core/i915_drv.h
2008-05-08 10:25:01 +10:00
5f5f01ed91
GEM: Extend cache domain stuff for 965.
...
One of our MI_FLUSH bits is reserved on 965, being always implied, and there's
a vertex cache that was forgotten.
2008-05-07 12:46:06 -07:00
6a6c37af9e
[intel-GEM] ref count objects in gtt-lru.
...
If objects on the lru aren't ref counted, they'll get pulled from the gtt as
soon as they are freed. This change does cause objects to get stuck in the
gtt until they're forced out by new requests. The lru should get cleaned
when the irq occurs.
2008-05-06 21:59:06 -07:00
2b9ef32669
Merge commit 'anholt/drm-gem' into drm-gem
2008-05-06 14:43:56 -07:00
631e86c5c4
Start coding up memory domains
2008-05-06 14:43:49 -07:00
d2373b2a34
GEM: Use irq-based fencing rather than syncing and evicting every exec.
2008-05-06 13:28:26 -07:00
91cba3ae17
Dump last batch buffer when hardware lockup is detected.
2008-05-05 22:10:02 -07:00
ed6657fa8e
Monitor ACTHD register while polling for idle ring.
...
When batch buffers are executing, the ring may be stuck for a long time.
Monitor the ACTHD pointer which will show if the execution engine is
actually hung.
2008-05-05 22:09:34 -07:00
d59a9300ec
Remove some debug messages.
2008-05-05 14:32:01 -07:00
4511e6cd80
Correct execbuffer offset. Add memory barrier and chipset flush.
2008-05-05 11:27:06 -07:00
b6f173c430
Add i915_dispatch_gem_execbuffer (broken).
...
This function submits a gem-based execbuffer to the ring.
It doesn't work yet.
2008-05-05 10:51:49 -07:00
d015219bd0
r500: add allowed range for us config/pixsize
2008-05-05 17:03:27 +10:00
39e20bcd5f
Add name/open ioctls, separate handle and pointer ref counts.
...
Names are just another unique integer set (from another idr object).
Names are removed when the user refernces (handles) are all destroyed --
this required that handles for objects be counted separately from
internal kernel references (so that we can tell when the handles are all
gone).
2008-05-02 12:29:17 -07:00
49e8e3372a
Remove drm_driver argument to functions taking drm_gem_object.
...
Now that drm_gem_object has a drm_driver * in it, functions don't need both
parameters.
2008-05-02 10:36:00 -07:00
5b5b68ffd2
Fix nouveau warning when returning pointers in uint64_t objects.
2008-05-02 10:34:46 -07:00
0d547c9ed9
Add alignment to all aperture allocation requests.
...
When pinning buffers, or using execbuffer, allow the application to specify
the necessary aperture allocation alignment constraints.
2008-05-01 20:41:55 -07:00
30efad5113
Fix gem ioctls to be 32/64-bit clean.
...
mixed 32/64 bit systems need 'special' help for ioctl where the user-space
and kernel-space datatypes differ. Fixing the datatypes to be the same size,
and align the same way for both 32 and 64-bit ppc and x86 environments will
elimiante the need to have magic 32/64-bit ioctl translation code.
2008-05-01 20:31:16 -07:00
7d5f783eca
Make GEM object handles be nonzero.
2008-05-01 16:38:37 -07:00
d2529d1396
Remove _args from gem ioctl argument structure tags.
2008-05-01 16:27:03 -07:00
793549116e
Add pin/unpin object ioctls for gem.
2008-05-01 15:40:02 -07:00
ccd1bae0f6
checkpoint: relocations support.
2008-05-01 15:22:21 -07:00
5af87acbc2
checkpoint: gtt binding written.
2008-05-01 14:20:44 -07:00
2140e102f9
checkpoint: rename to GEM and a few more i915 bits.
2008-05-01 11:39:20 -07:00
3ac74f3208
nv50: enable 0x400500 bit 0 after PGRAPH exception also
...
No solid idea about what these 2 bits do, but nv50 can now survive a few
PGRAPH exceptions just as nv40 does :)
2008-05-02 01:36:30 +10:00
6d8062ac1e
nouveau: guard against channels potentially not having a context, fix nv50
2008-05-02 01:36:08 +10:00
77d20928b3
nouveau: disable all card interrupts when unknown PFIFO IRQ occurs.
...
This is possibly temporary. I can trigger an unending IRQ storm on G8x
in some circumstances, and have no idea how to handle that particular PFIFO
exception correctly yet.
2008-05-02 00:53:42 +10:00
5c4c778c0d
nouveau: restore original NV_PFIFO_CACHES_REASSIGN value in fifo handler
...
Doesn't fix any issue I've seen, but is a potential issue if a FIFO IRQ
occurs during channel creation/takedown.
2008-05-02 00:52:21 +10:00
bfbe4ade32
nouveau: gather nsource in trap_info()
...
The IRQ handling stuff really is a mess.. On the TODO :)
2008-05-02 00:51:00 +10:00
e317dfdabf
nv50: PGRAPH exception handling completely different from earlier chips
2008-05-02 00:06:22 +10:00
b92efd5956
nv50: I cave... Add nv84 initial context values.
...
I swore I'd actually do this properly and not go the horrible route
we did with nv4x, but I won't get around to it just yet with so many
*actually* interesting things to do first.. One day.
Since someone already added nv86, why not!
2008-05-01 23:50:44 +10:00
1a84067950
Hacking towards hooking up execbuffer.
2008-04-30 16:03:15 -07:00
81ba8ded7e
Remove the remainder of the mmfs device.
2008-04-29 13:48:51 -07:00
dabd056bf3
Move mmfs ioctls into the DRM. Untested.
2008-04-29 13:32:52 -07:00
cb33133ef3
i915: fix off by one in VGA save/restore of AR & CR regs
...
Turns out it's important to save/restore AR14 in particular.
2008-04-29 12:39:38 -07:00
f31e04a960
nouveau: NV9x cards exist as well.
2008-04-29 19:34:22 +02:00
7f269bec7e
Merge branch 'master' into modesetting-101
...
Conflicts:
linux-core/Makefile.kernel
linux-core/drm_compat.c
linux-core/drm_fops.c
linux-core/drm_lock.c
shared-core/drm.h
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
2008-04-28 12:10:44 +02:00
7f8e406085
Use fixed sized types in new ioctls
...
Make both crtc and the command argument 32 bits to avoid any 32-on-64 compat
issues.
2008-04-27 09:42:17 -07:00
b45fe49bcd
Enum-ectomy of vblank modesetting ioctl
...
Enum can be of pretty much any size since C leaves the choice of size up to the implementation. So avoid using it in new interfaces like the vblank pre- & post-modeset ioctl. Thanks to hch for spotting this.
2008-04-26 17:11:18 -07:00
8c741ed54e
Add pread/pwrite ioctls to mmfs.
2008-04-23 14:25:54 -07:00
c1fec43b55
Extend the mmfs basic test to do a couple of ioctls.
2008-04-23 11:36:03 -07:00
8665b666c7
Move mmfs.h userland interface to shared-core.
2008-04-23 11:23:40 -07:00
33fa02f2d8
Make radeon_ms compile.
...
Remove lock functions and use pci_map_rom() instead of pci_map_rom_copy().
2008-04-23 12:42:26 -04:00
feff72929e
i915: fix for compatibility mode
2008-04-23 17:17:16 +08:00
8dc4d4fa1f
i915: allocate devname at init time
...
Since it'll be freed at unload time, we should alloc devname rather than
pointing to the DRIVER_NAME string.
2008-04-22 18:41:28 -07:00
8a390e058f
clear interrupt status before install irq
...
On my 865G machine, it seems the CPU will receive interrupt before
irq_postinstall is called. This will cause kernel oops because vblank is not
inited at that time. Clear interrupt status before install seems fixing this
problem.
Signed-off-by: Hong Liu <hong.liu@intel.com>
2008-04-22 18:34:11 -07:00
ce8c842518
i915: gfx hw and i945gme fixes from upstream
...
From Jesse and Zhenyu originally.
2008-04-22 16:08:17 +10:00
f0e38f5217
[I915] Handle tiled buffers in vblank tasklet
...
The vblank tasklet update code must build 2D blt commands with the
appropriate tiled flags.
2008-04-20 16:10:05 -07:00
21dbba5a22
On I965, use correct 3DSTATE_DRAWING_RECTANGLE command in vblank
...
The batchbuffer submission paths were fixed to use the 965-specific command,
but the vblank tasklet was not. When the older version is sent, the 965 will
lock up.
2008-04-20 01:56:02 -07:00
21a93915d8
Porting DVO stuff
...
Ported from Xorg intel 2d driver. Changed interfaces definitions, which needed
to be changed later if other device wants to use these DVO stuff.
2008-04-17 11:43:28 -07:00
b986d7d2c9
Save and restore dsparb and d_state regs
2008-04-11 20:31:07 -07:00
6cc2d7e7ae
Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
2008-04-12 00:15:47 +02:00
5891b0bd2a
radeon_ms: rework command submission ioctl & cleanup
2008-04-12 00:15:12 +02:00
386ea38b8e
Add TV out hotplug detection
...
Doesn't yet work on my i915 test machine, but most of the necessary bits
should be there.
2008-04-09 14:13:38 -07:00
e3c7a0fcb0
Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
2008-04-08 12:48:41 -07:00
a2edd07f20
Add devname in modeset case
...
If the driver is 'modeset' enabled, it'll register it's interrupt
handler at load time. Set the devname in this case so that
/proc/interrupts makes sense.
2008-04-08 12:44:52 -07:00
779e826c1e
radeon_ms: command buffer validation use array of function pointer
2008-04-08 02:18:14 +02:00
060e725a0e
radeon_ms: fix framebuffer code
2008-04-06 19:23:20 +02:00
91bfd69745
radeon_ms: check for NULL fb
2008-04-06 19:01:31 +02:00
1692d30cea
nv50: primitive i2c interrupt handler
2008-04-05 21:02:00 +02:00
dfc8d2b2fe
radeon_ms: add crtc set base callback & fix palette
2008-04-03 03:15:47 +02:00
3fc444a5e8
nv50: primitive display interrupt handler.
2008-04-03 01:13:31 +02:00
9600423458
radeon_ms: small fix & cleanup to command checking
2008-03-31 21:50:02 +02:00
562f95ea96
nouveau: fix return from function..
...
dude kernel moduless use kernel errors :)
this fixes an oops on init when this codepath hits.
2008-03-31 11:34:48 +10:00
09e637848a
radeon_ms: initial pass at command buffer validation
2008-03-31 00:55:05 +02:00
cf3c0123a0
nouveau: forgot to add a break
2008-03-30 14:50:41 +02:00
68b83a8813
nouveau: Add ctx values for nv86.
...
- Note that this may not work for all nv86.
2008-03-30 14:48:55 +02:00
2d9eccfd05
radeon_ms: add hang debuging helper functions
2008-03-30 12:50:26 +02:00
753a4bdf1b
drm/r300: fix wait interface mixup
...
This interface was defined completely wrong, however userspace has only
ever used 4 values from it (0x1, 0x2, 0x3 and 0x6), so fix the interface to do what userspace actually expected but define new defines for new users to use
it properly.
2008-03-30 07:33:39 +10:00
1674d28179
r300: Correctly translate the value for the R300_CMD_WAIT command.
...
Previously, the R300_CMD_WAIT command would write the passed directly to the
hardware. However this is incorrect because the R300_WAIT_* values used are
internal interface values that do not map directly to the hardware.
The new function I have added translates the R300_WAIT_* values into appropriate
values for the hardware before writing the register.
Thanks to John Bridgman for pointing this out. :-)
2008-03-29 17:31:39 +00:00
0da289bafd
radeon_ms: this is a modesetting driver, bring things up to date
2008-03-27 20:08:37 +01:00
a81d07f64d
nouveau: nv20 bios does not initialise PTIMER
...
The wait functions depend on PTIMER, so write the old (incorrect, but working) values for uninitialised hw
2008-03-25 18:32:26 +00:00
b0817a42e7
i915: fix oops on agp=off
...
Kernel bug 10289.
2008-03-24 18:52:26 +10:00
4323ee3e5b
Merge branch 'r500-fp'
2008-03-24 18:47:50 +10:00
24ba0c9c3b
nv40: voodoo - not quite.
2008-03-24 03:26:34 +11:00
6f4b3de284
nv40: allocate massive amount of PRAMIN for grctx on all chipsets.
...
More or less a workaround for issues on some chipsets where a context
switch results in critical data in PRAMIN being overwritten by the GPU.
The correct fix is known, but may take some time before it's a feasible
option.
2008-03-24 03:26:30 +11:00
36e11dd380
r500: fragment program upload is also used to upload constants.
...
Limit frag address to 8 bits
2008-03-21 16:59:52 +10:00
71b66b0043
Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
2008-03-20 17:44:32 +01:00
6ef119abf5
radeon_ms: fix fence
2008-03-20 17:43:43 +01:00
316979356f
drm: fixup r500fp submission
2008-03-20 14:20:53 +10:00
1021799b6c
nouveau: do not set on-board timer's numerator/denominator to bad values
2008-03-20 02:57:58 +00:00
9e4f908287
RADEON: switch over to new production microcode
...
This needs to be tested thoroughly before pushing to the
kernel.
2008-03-19 15:37:56 -04:00
d8af16d2a7
RADEON: production microcode for all radeons, r1xx-r6xx
...
This updated microcode is not in use yet.
2008-03-19 14:57:42 -04:00
a3c808d8fe
move some more r300 regs into not allowed on r500
2008-03-19 16:10:37 +10:00
d18c2c6842
drm: add new rs690 pci id
2008-03-18 09:07:45 +10:00
607964ed9e
drm: add master set/drop protocol
...
this may not survive long - just need something for testing
2008-03-17 16:38:20 +10:00
2d0411cb75
i915: safety check the sarea map still exists
2008-03-17 16:38:18 +10:00
3add949403
initial r500 RS and FP register and upload code
2008-03-17 11:08:03 +10:00
1f96e9a982
drm/pcigart: fix the pci gart to use the drm_pci wrapper.
...
This is the correct fix for the RS690 and hopefully the dma coherent work.
For now we limit everybody to a 32-bit DMA mask but it is possible for
RS690 to use a 40-bit DMA mask for the GART table itself,
and the PCIE cards can use 40-bits for the table entries.
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-03-17 07:05:46 +10:00
1a2d8c4bfa
Avoid unnecessary waits for command regulator pause.
2008-03-16 20:07:14 +01:00
3a3a9485aa
[via] Remove some leftover vars.
2008-03-16 11:45:58 +01:00
7d3d15e67d
[via] The millionth fixup for the millionth-1 attempt to stabilize the AGP
...
DMA command submission. It's worth remembering that all new bright ideas on how
to make this command reader work properly and according to docs
will probably fail :( Bring in some old code.
2008-03-16 11:45:57 +01:00
563fe9dcd4
[via] Fix driver after vblank-rework merge.
2008-03-16 11:45:57 +01:00
5b1d9263d3
drm/rs690: set AGP_BASE_2 to 0
2008-03-16 14:00:16 +10:00
dd9eb923ed
drm: set rs690 gart base completly.
...
The docs state bits 4-11 represent bits 32-39 of a 40-bit address
2008-03-16 12:58:07 +10:00
9be916f353
Fix chip family for RV550
2008-03-12 11:16:12 -04:00
1766e1c07b
nv50: force channel vram access through vm
...
If we ever want to be able to use the 3D engine we have no choice. It
appears that the tiling setup (required for 3D on G8x) is in the page tables.
The immediate benefit of this change however is that it's now not possible
for a client to use the GPU to render over the top of important engine setup
tables, which also live in VRAM.
G8x VRAM size is limited to 512MiB at the moment, as we use a 1-1 mapping
of real vram pages to their offset within the start of a channel's VRAM
DMA object and only populate a single PDE for VRAM use.
2008-03-13 00:23:52 +11:00
88bd1e4a35
Merge branch 'intel-post-reloc'
...
Conflicts:
linux-core/drm_compat.c
linux-core/drm_compat.h
linux-core/drm_ttm.c
shared-core/i915_dma.c
Bump driver minor to 13 due to introduction of new
relocation type.
2008-03-12 11:34:29 +01:00
b6dc381fab
Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
...
Conflicts:
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
2008-03-12 10:18:33 +00:00
8a18d123f5
Avoid large kmallocs.
2008-03-12 09:49:27 +01:00
cf1a2499ed
global hotplug events happen in the pipe A stat register,
...
they are not pipe A specific. Remove pipe B code.
2008-03-11 21:24:29 +00:00
903d9231d6
Add support for monitor hotplug signals/waits
...
Also adjust i915 irq handling as it follows the 16bit'ism's
of the i8xx series.
2008-03-11 20:30:25 +00:00
f13936f7fc
nouveau: move AGP reset to mem_init_agp
...
Also, power cycle PGRAPH when resetting AGP -- it seems to fix problems encountered by p0g on nv25
2008-03-11 16:45:35 +00:00
5a7f4b3074
drm: fix oops on unload.
...
if we are unloading the module, there is no master so therefore no lock
2008-03-11 16:05:26 +10:00
52748d1792
drm: hopefully fix cursors on 965
2008-03-11 13:23:33 +10:00
a7e6ca62ad
Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
2008-03-10 23:36:27 +01:00
a7dc4d08b9
rradeon_ms: rework fence code and bring radeon ms up to date
2008-03-10 23:35:07 +01:00
2848f04861
Switch from PIPE_VBLANK to PIPE_EVENT interrupts.
...
My 965GM gets interrupts stuck when using the old PIPE_VBLANK interrupt.
Switch to the PIPE_EVENT interrupt mechanism, and set the PIPE*STAT
registers to use START_VBLANK on 965 and VBLANK on previous chips.
2008-03-08 00:04:30 -08:00
ce3733572e
drm/radeon: check sarea_priv exists
2008-03-08 08:30:30 +10:00
1ccccbd4ce
nouveau: redo channel idle detection
...
Will hopefully work a bit better than previous code, which depended on
knowing the channel's most recent PUT value. Some chips always return
0 on reading these regs, and currently userspace is the only other entity
which knows the value.
2008-03-07 15:18:34 +11:00
cd924de029
nouveau: don't touch NV_USER regs on channel destroy.
...
Not only was this entirely pointless, it actually causes my NV30GL to
die randomly when channels are destroyed.
2008-03-07 15:18:34 +11:00
cf28ca4212
actually turn the irq off
2008-03-07 13:03:32 +11:00
ccae12a837
I really screwed up that merge somehow
2008-03-07 08:58:24 +10:00
48a166af14
woah somehow got these upstream
2008-03-07 08:49:27 +10:00
44a2209790
Merge branch 'master' of ../../drm into modesetting-101
...
Conflicts:
shared-core/drm.h
2008-03-06 05:39:07 +10:00
d5c0101252
ttm: make sure userspace can't destroy kernel create memory managers
...
this adds something to say the kernel initialised the memory region not
the userspace. and blocks userspace from deallocating kernel areas
2008-03-06 05:37:54 +10:00
180c9188f4
drm/ttm: add ioctl to get back memory managed area sized
...
taken from modesetting branch but could be useful outside it.
2008-03-06 05:31:50 +10:00
e00dea812d
Merge branch 'master' of ../../drm into modesetting-101
...
Conflicts:
linux-core/drmP.h
linux-core/drm_drv.c
linux-core/drm_proc.c
linux-core/drm_stub.c
linux-core/drm_sysfs.c
2008-03-06 05:26:23 +10:00
12574590cd
drm: reorganise minor number handling using code from modesetting branch
...
Rip out the whole head thing and replace it with an idr and drm_minor
structure.
2008-03-06 05:21:50 +10:00
638353103d
i915: Evict if relocatee buffer is CACHED_MAPPED before
...
writting relocations, otherwise the GPU probably sees some
inconsistent data. Fix fd.o bug#14656
2008-03-05 15:09:17 +08:00
4dbf447f43
drm: fixup compat with old x.org drivers
2008-03-05 15:28:38 +10:00
43891ff2d0
Merge remote branch 'origin/master' into modesetting-101
...
Conflicts:
linux-core/drm_compat.c
2008-03-05 10:37:02 +10:00
a6a2f2c8c4
Clarify when WAIT_LAZY is relevant to users.
2008-03-04 13:45:41 -08:00
3332a0add6
Remove unused DRM_FENCE_FLAG_WAIT_IGNORE_SIGNALS.
2008-03-04 13:41:30 -08:00
63fd6f284d
[i915] 2D driver may reset Frame count value, this may lead driver
...
to leap it's vblank count a huge value.
This will stall some applications that switch video mode if vblank_mode is set to a non zero value in drirc.
2008-03-03 14:49:49 +08:00
9c5ba9f5d1
Add FENCE registers to MMIO list
2008-03-02 21:48:40 +00:00
612c22f131
Working revision.
2008-02-29 15:38:55 +01:00
2305100c0f
More post-ioctl work.
2008-02-29 13:25:55 +01:00
01dcc47d89
drm: add modesetting as a driver feature.
...
This change adds a driver feature that for i915 is controlled by a module
parameter. You now need to do insmod i915.ko modeset=1 to enable it the
modesetting paths.
It also fixes up lots of X paths. I can run my new DDX driver on this code
with and without modesetting enabled
2008-02-28 16:24:17 +10:00
fd595fa4dc
Reinstate buffer idle before applying relocations.
2008-02-27 21:44:40 +01:00
72983ff301
Don't wait for buffer idle before applying relocations.
2008-02-27 19:46:28 +01:00
75c9e0d346
radeon: remove TTM from an earlier merge
2008-02-26 23:30:45 +01:00
1e66322633
Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
...
Conflicts:
shared-core/i915_dma.c
2008-02-26 15:42:41 +00:00
e87cec1968
[i915] Relocation fixes.
2008-02-26 10:47:05 +01:00
b92e343dc4
i915: fix typos
2008-02-26 16:20:27 +10:00
35d1b13b4a
i915_mmio: add overlay regs
2008-02-26 16:13:06 +10:00
56bb29cf37
Make the execbuffer code reasonably safe against errors.
...
In particular -EAGAINs, which should be common during Xserver operation.
Also handle the fence creation failure case.
2008-02-26 00:05:26 +01:00
d6098db140
fix texture uploads with large 3d textures (bug 13980)
...
Texture uploads could hit the blitter coordinate limit, adjust the texture
offset when uploading the pieces. Make sure to check the end address of the
upload too.
2008-02-23 11:01:36 +01:00
0d32015974
nouveau: Remove some random (french) comment.
2008-02-22 19:28:54 +01:00
7e5f9c8bd3
nouveau: A single define of dma skips is more than enough.
2008-02-22 19:28:54 +01:00
b7086e6ae5
Fix one last occurance of struct _drm_i915_batchbuffer.
...
Thanks to Todd Merrill for pointing it out.
2008-02-22 11:22:52 -05:00
b0fee67a30
i915: Remove leading underscore from struct tags.
...
This matches the changes in mesa to use the system drm includes
for the definitions of the drm ioctl structs.
2008-02-22 00:12:39 -05:00
cdad850ebc
add ioctl to get back memory managed area sized - used for kernel inited areas
2008-02-22 13:49:51 +10:00
9d1061b8cf
fix SAREA
2008-02-20 22:23:31 +00:00
3f6c8f64aa
fix SAREA
2008-02-20 22:22:49 +00:00
8844245cfc
drm/fb: get rid of offset from structure use bo offset
2008-02-20 11:27:22 +10:00
2c409f9a07
ttm: make sure userspace can't destroy kernel create memory managers
2008-02-20 11:27:22 +10:00
8caf6e9571
Fix up conflicts for DRI2 (untested)
2008-02-19 15:17:24 +00:00
f24ed2ad6c
Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
...
Conflicts:
linux-core/i915_fence.c
linux-core/via_fence.c
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
2008-02-18 22:35:46 +00:00
5d8c754bc2
[915]: more registers for S3 (DSPCLK_GATE_D, CACHE_MODE_0, MI_ARB_STATE)
...
Failing to preserve the MI_ARB_STATE register was causing FIFO underruns on
the VGA output on my HP 2510p after resume.
2008-02-16 20:14:49 -08:00
cd87e6352b
nouveau: no GART on ia64 either.
2008-02-16 03:50:29 +01:00
2b1c9cd696
i915: initial (and untested) TV out support
...
Ported from xf86-video-intel. Still need to tie in TV modes somehow, though
preferably w/o using the properties mechanism.
2008-02-15 16:13:21 -08:00
15cbde683f
nv40: actually init all tile regs.
2008-02-16 04:47:02 +11:00
8bf8cd63bb
missing bits
2008-02-14 07:37:34 +10:00
373dbcf8b2
i915: Add a dri2 init path that gets the lock from the dri2 sarea.
2008-02-13 13:34:02 -05:00
db3f03ae35
i915: Only look up dev_priv->mmio_map if it's not already set up
2008-02-13 13:34:02 -05:00
ee15459483
i915: Add I915_PARAM_CHIPSET_ID param to get chipset ID.
2008-02-13 13:34:02 -05:00
4feb0638f1
i915: Make sarea_priv setup optional.
2008-02-13 13:34:02 -05:00
04257f1a5a
radeon_ms: bring radeon_ms up to date with lastest changes
2008-02-09 18:23:35 +01:00
6f19473191
Fix saveGR array size
...
Make sure we have enough room for all the GR registers or we'll end up
clobbering the AR index register (which should actually be harmless
unless the BIOS is making an assumption about it).
2008-02-07 11:21:09 -08:00
8b6c96dedd
i915: save/restore interrupt state
...
On resume, if the interrupt state isn't restored correctly, we may end
up with a flood of unexpected or ill-timed interrupts, which could cause
the kernel to disable the interrupt or vblank events to happen at the
wrong time. So save/restore them properly.
2008-02-07 10:48:08 -08:00
0618ac8a07
Added kernel part of hotplug ioctl
2008-02-07 19:24:58 +01:00
34b76e0fac
Added hotplug ioctl
2008-02-07 19:23:27 +01:00
53937a189f
build fix for older kernels
2008-02-05 10:12:21 +00:00
76748efae2
i915: Re-report breadcrumbs on poll to the fence manager,
...
since a breadcrumb may actually turn up before a corresponding fence object
has been placed on the fence ring.
2008-02-05 10:36:49 +01:00
a0781e7622
nouveau: make nv34 work every time, not just every 2nd time
...
And make nv30_graph_init a bit more like mmio-traces
2008-02-04 16:38:31 +00:00
733e07663e
nouveau: NV40 can/should now be able to run after the blob.
...
- Moved the fix from the ddx to drm, because it seemed more appropriate.
- Don't be shy, report if it works for you or not.
2008-02-02 12:46:47 +01:00
47ee6237fe
i915: Avoid calling drm_fence_flush_old excessively.
2008-01-30 22:14:02 +01:00
f1edb7ad91
Simplify the fencing code and differentiate between flushes and
...
waiting types.
Add a "command_stream_barrier" method to the bo driver.
2008-01-30 22:06:02 +01:00
9a7e45858d
nv40: some more nv67 changes
...
With some luck the drm-side will be OK now for this chipset.
2008-01-30 11:50:17 +11:00
0744cb153a
Add new RV380 pci id
...
bug 14289
2008-01-29 10:11:27 -05:00
a2254c5a96
Added cursor support
2008-01-28 03:14:56 +01:00
b8755ff7c3
drm: add initial rs690 support for drm.
...
This adds support for configuring the RS690 GART.
2008-01-27 12:50:31 +10:00
6bfb9b639a
mach64: fix after vblank-rework
...
don't disable vblank interrupts (similar to r128)
2008-01-25 16:54:29 +02:00
fa7b779c91
don't reinit ring if already initialised
2008-01-25 16:32:09 +10:00
e7a41d7f5b
Merge remote branch 'origin/master' into modesetting-101
...
Conflicts:
linux-core/drm_bo.c
linux-core/drm_drv.c
shared-core/drm.h
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
shared-core/radeon_irq.c
2008-01-25 15:27:53 +10:00
bfdddd218e
Fixup modeset ioctl number & typedef usage
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Should be 0x08 rather than 0xa0, and shouldn't use typedefs.
2008-01-24 21:13:33 -08:00
e3c42f0004
Merge commit 'airlied/i915-ttm-cfu'
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This requires updated Mesa to handle the new relocation format.
2008-01-24 12:44:19 -08:00
c7ee6cc269
Remove broken 'in vblank' accounting
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We need to return an accurate vblank count to the callers of
->get_vblank_counter, and in the Intel case the actual frame count
register isn't udpated until the next active line is displayed, so we
need to return one more than the frame count register if we're currently
in a vblank period.
However, none of the various ways of doing this is working yet, so
disable the logic for now. This may result in a few missed events, but
should fix the hangs some people have seen due to the current code
tripping the wraparound logic in drm_update_vblank_count.
2008-01-24 08:57:04 -08:00
5b99306452
i915: fix missing header when copying data from userspace
2008-01-24 15:18:09 +10:00
34b71eb451
i915 make relocs use copy from user
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Switch relocs to using copy from user and remove index and pass buffer
handles in instead.
2008-01-24 14:37:40 +10:00
b5a34f5da5
Fix thinko in get_vblank_counter
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Should use vtotal not htotal to figure out if we're in a vblank period.
2008-01-23 08:39:57 -08:00
cb91784371
Fix IS_I915G macro
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One to many parantheses...
2008-01-23 08:38:01 -08:00
7c726086dd
nouveau: Fix warning in nouveau_mem.c
2008-01-23 16:40:19 +01:00
2f19fe4498
drm/i915: add support for E7221
2008-01-23 16:44:51 +10:00
531f25cfe9
Correct vblank count value
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The frame count registers don't increment until the start of the next
frame, so make sure we return an incremented count if called during the
actual vblank period.
2008-01-22 15:16:01 -08:00
893e311999
i915 irq fixes
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Ack the IRQs correctly (PIPExSTAT first followed by IIR). Don't read
vblank counter registers on disabled pipes (might hang otherwise). And
deal with flipped pipe/plane mappings if present.
2008-01-22 13:11:29 -08:00
0cd4cbc9a6
Merge branch 'master' into vblank-rework, including mach64 support
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Conflicts:
linux-core/drmP.h
linux-core/drm_drv.c
shared-core/i915_drv.h
shared-core/i915_irq.c
shared-core/mga_irq.c
shared-core/radeon_irq.c
shared-core/via_irq.c
Mostly trivial conflicts.
mach64 support from Mathieu Bérard.
2008-01-22 09:42:37 -08:00
5231a524f5
Revert "Fix pipe<->plane mapping vs. vblank handling (again)"
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This reverts commit bfc29606e4
2008-01-22 14:42:48 +11:00
616cef5ec8
nouveau: don't forget NV80.
2008-01-21 21:11:47 +01:00
641c9a2ecc
nouveau: new card family for old card designs.
2008-01-21 21:01:28 +01:00
44a9fa8cc6
Add additional explanation of DRM_BO_FLAG_CACHED_MAPPED before I forget again.
2008-01-17 16:55:43 -08:00
ac6b3780c8
i915: Add chipset id for Intel Integrated Graphics Device
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This adds new chipset id in drm.
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-01-15 13:06:09 -05:00
6ba979ea46
radeon_ms: use radeon connector type insted of drm
2008-01-15 16:01:39 +01:00
20a8e2d30e
radeon_ms: cope with lastest drm modesetting change
2008-01-15 14:30:40 +01:00
f1f934c8c9
radeon_ms: add rom parsing & adapt code
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Add rom (only combios for now) parsing and use informations
retrieve instead of hardcoded table. Shuffle code around a
bit.
2008-01-15 14:17:05 +01:00
88c511e49d
Properly propagate the user-space fence flags.
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This avoids a sync flush when user-space has already programmed
and MI_FLUSH in the batchbuffer.
2008-01-15 10:03:41 +01:00
269d518008
nouveau: make mem alloc debug a little more verbose.
2008-01-14 03:16:42 +01:00
f0b7c45653
nv05: enable ctx/op methods, and ignore patch valid failures.
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Yes, I'm quite aware "real" nv04 doesn't support this, hopefully the GPU
will just ignore those PGRAPH_DEBUG_3 bits on that hw.
2008-01-11 12:51:08 +11:00
5f15f317fb
nouveau: AGP reset correction - don't touch FW bit
2008-01-08 20:30:21 +00:00
0bfd09f719
nv50: more small changes
2008-01-07 18:56:44 +11:00
942b500e24
nv50: oops, lost some state saving along the way somewhere.
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xf86-video-nv will now work again after nouveau.
2008-01-07 18:19:16 +11:00
3d248cd7e4
nv50: hook up timer funcs...
2008-01-07 17:23:31 +11:00
7a4ba7273c
nv50: abort on chips without ctx ucode
2008-01-07 17:13:22 +11:00
15f8fd34df
nv50: some needed ctx vals
2008-01-07 17:09:00 +11:00
Jerome Glisse
Eric Anholt
Jesse Barnes
Alex Deucher
Ian Romanick
Jesse Barnes
Robert Noland
Dave Airlie
Keith Packard
Dennis Kasprzyk
Dave Airlie
Alan Hourihane
Alex Deucher
Jie Luo
Robert Noland
Hong Liu
Alex Deucher
Jesse Barnes
Jakob Bornecrantz
Ben Skeggs
Jesse Barnes
Maarten Maathuis
Thomas Hellstrom
Jesse Barnes
Kristian Høgsberg
Xiang, Haihao
Oliver McFadden
Stuart Bennett
Alex Deucher
Dave Airlie
Zou Nan hai
Alan Hourihane
Roland Scheidegger
Stephane Marchesin
Jesse Barnes
Mirko
Maciej Cencora
George Sapountzis
Jesse Barnes
Zhenyu Wang